1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <linux/spinlock.h> 20 #include <asm/x86_init.h> 21 #include <asm/pkru.h> 22 #include <asm/fpu/api.h> 23 #include <asm/coco.h> 24 #include <asm-generic/pgtable_uffd.h> 25 #include <linux/page_table_check.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 struct seq_file; 31 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 32 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 33 bool user); 34 bool ptdump_walk_pgd_level_checkwx(void); 35 #define ptdump_check_wx ptdump_walk_pgd_level_checkwx 36 void ptdump_walk_user_pgd_level_checkwx(void); 37 38 /* 39 * Macros to add or remove encryption attribute 40 */ 41 #define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot))) 42 #define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot))) 43 44 #ifdef CONFIG_DEBUG_WX 45 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 46 #else 47 #define debug_checkwx_user() do { } while (0) 48 #endif 49 50 /* 51 * ZERO_PAGE is a global shared page that is always zero: used 52 * for zero-mapped memory areas etc.. 53 */ 54 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 55 __visible; 56 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 57 58 extern spinlock_t pgd_lock; 59 extern struct list_head pgd_list; 60 61 extern struct mm_struct *pgd_page_get_mm(struct page *page); 62 63 extern pmdval_t early_pmd_flags; 64 65 #ifdef CONFIG_PARAVIRT_XXL 66 #include <asm/paravirt.h> 67 #else /* !CONFIG_PARAVIRT_XXL */ 68 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 69 70 #define set_pte_atomic(ptep, pte) \ 71 native_set_pte_atomic(ptep, pte) 72 73 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 74 75 #ifndef __PAGETABLE_P4D_FOLDED 76 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 77 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 78 #endif 79 80 #ifndef set_p4d 81 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 82 #endif 83 84 #ifndef __PAGETABLE_PUD_FOLDED 85 #define p4d_clear(p4d) native_p4d_clear(p4d) 86 #endif 87 88 #ifndef set_pud 89 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 90 #endif 91 92 #ifndef __PAGETABLE_PUD_FOLDED 93 #define pud_clear(pud) native_pud_clear(pud) 94 #endif 95 96 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 97 #define pmd_clear(pmd) native_pmd_clear(pmd) 98 99 #define pgd_val(x) native_pgd_val(x) 100 #define __pgd(x) native_make_pgd(x) 101 102 #ifndef __PAGETABLE_P4D_FOLDED 103 #define p4d_val(x) native_p4d_val(x) 104 #define __p4d(x) native_make_p4d(x) 105 #endif 106 107 #ifndef __PAGETABLE_PUD_FOLDED 108 #define pud_val(x) native_pud_val(x) 109 #define __pud(x) native_make_pud(x) 110 #endif 111 112 #ifndef __PAGETABLE_PMD_FOLDED 113 #define pmd_val(x) native_pmd_val(x) 114 #define __pmd(x) native_make_pmd(x) 115 #endif 116 117 #define pte_val(x) native_pte_val(x) 118 #define __pte(x) native_make_pte(x) 119 120 #define arch_end_context_switch(prev) do {} while(0) 121 #endif /* CONFIG_PARAVIRT_XXL */ 122 123 /* 124 * The following only work if pte_present() is true. 125 * Undefined behaviour if not.. 126 */ 127 static inline bool pte_dirty(pte_t pte) 128 { 129 return pte_flags(pte) & _PAGE_DIRTY_BITS; 130 } 131 132 static inline bool pte_shstk(pte_t pte) 133 { 134 return cpu_feature_enabled(X86_FEATURE_SHSTK) && 135 (pte_flags(pte) & (_PAGE_RW | _PAGE_DIRTY)) == _PAGE_DIRTY; 136 } 137 138 static inline int pte_young(pte_t pte) 139 { 140 return pte_flags(pte) & _PAGE_ACCESSED; 141 } 142 143 static inline bool pte_decrypted(pte_t pte) 144 { 145 return cc_mkdec(pte_val(pte)) == pte_val(pte); 146 } 147 148 #define pmd_dirty pmd_dirty 149 static inline bool pmd_dirty(pmd_t pmd) 150 { 151 return pmd_flags(pmd) & _PAGE_DIRTY_BITS; 152 } 153 154 static inline bool pmd_shstk(pmd_t pmd) 155 { 156 return cpu_feature_enabled(X86_FEATURE_SHSTK) && 157 (pmd_flags(pmd) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) == 158 (_PAGE_DIRTY | _PAGE_PSE); 159 } 160 161 #define pmd_young pmd_young 162 static inline int pmd_young(pmd_t pmd) 163 { 164 return pmd_flags(pmd) & _PAGE_ACCESSED; 165 } 166 167 static inline bool pud_dirty(pud_t pud) 168 { 169 return pud_flags(pud) & _PAGE_DIRTY_BITS; 170 } 171 172 static inline int pud_young(pud_t pud) 173 { 174 return pud_flags(pud) & _PAGE_ACCESSED; 175 } 176 177 static inline int pte_write(pte_t pte) 178 { 179 /* 180 * Shadow stack pages are logically writable, but do not have 181 * _PAGE_RW. Check for them separately from _PAGE_RW itself. 182 */ 183 return (pte_flags(pte) & _PAGE_RW) || pte_shstk(pte); 184 } 185 186 #define pmd_write pmd_write 187 static inline int pmd_write(pmd_t pmd) 188 { 189 /* 190 * Shadow stack pages are logically writable, but do not have 191 * _PAGE_RW. Check for them separately from _PAGE_RW itself. 192 */ 193 return (pmd_flags(pmd) & _PAGE_RW) || pmd_shstk(pmd); 194 } 195 196 #define pud_write pud_write 197 static inline int pud_write(pud_t pud) 198 { 199 return pud_flags(pud) & _PAGE_RW; 200 } 201 202 static inline int pte_huge(pte_t pte) 203 { 204 return pte_flags(pte) & _PAGE_PSE; 205 } 206 207 static inline int pte_global(pte_t pte) 208 { 209 return pte_flags(pte) & _PAGE_GLOBAL; 210 } 211 212 static inline int pte_exec(pte_t pte) 213 { 214 return !(pte_flags(pte) & _PAGE_NX); 215 } 216 217 static inline int pte_special(pte_t pte) 218 { 219 return pte_flags(pte) & _PAGE_SPECIAL; 220 } 221 222 /* Entries that were set to PROT_NONE are inverted */ 223 224 static inline u64 protnone_mask(u64 val); 225 226 #define PFN_PTE_SHIFT PAGE_SHIFT 227 228 static inline unsigned long pte_pfn(pte_t pte) 229 { 230 phys_addr_t pfn = pte_val(pte); 231 pfn ^= protnone_mask(pfn); 232 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 233 } 234 235 static inline unsigned long pmd_pfn(pmd_t pmd) 236 { 237 phys_addr_t pfn = pmd_val(pmd); 238 pfn ^= protnone_mask(pfn); 239 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 240 } 241 242 #define pud_pfn pud_pfn 243 static inline unsigned long pud_pfn(pud_t pud) 244 { 245 phys_addr_t pfn = pud_val(pud); 246 pfn ^= protnone_mask(pfn); 247 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 248 } 249 250 static inline unsigned long p4d_pfn(p4d_t p4d) 251 { 252 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 253 } 254 255 static inline unsigned long pgd_pfn(pgd_t pgd) 256 { 257 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 258 } 259 260 #define p4d_leaf p4d_leaf 261 static inline bool p4d_leaf(p4d_t p4d) 262 { 263 /* No 512 GiB pages yet */ 264 return 0; 265 } 266 267 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 268 269 #define pmd_leaf pmd_leaf 270 static inline bool pmd_leaf(pmd_t pte) 271 { 272 return pmd_flags(pte) & _PAGE_PSE; 273 } 274 275 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 276 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_leaf */ 277 static inline int pmd_trans_huge(pmd_t pmd) 278 { 279 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 280 } 281 282 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 283 static inline int pud_trans_huge(pud_t pud) 284 { 285 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 286 } 287 #endif 288 289 #define has_transparent_hugepage has_transparent_hugepage 290 static inline int has_transparent_hugepage(void) 291 { 292 return boot_cpu_has(X86_FEATURE_PSE); 293 } 294 295 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 296 static inline int pmd_devmap(pmd_t pmd) 297 { 298 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 299 } 300 301 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 302 static inline int pud_devmap(pud_t pud) 303 { 304 return !!(pud_val(pud) & _PAGE_DEVMAP); 305 } 306 #else 307 static inline int pud_devmap(pud_t pud) 308 { 309 return 0; 310 } 311 #endif 312 313 static inline int pgd_devmap(pgd_t pgd) 314 { 315 return 0; 316 } 317 #endif 318 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 319 320 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 321 { 322 pteval_t v = native_pte_val(pte); 323 324 return native_make_pte(v | set); 325 } 326 327 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 328 { 329 pteval_t v = native_pte_val(pte); 330 331 return native_make_pte(v & ~clear); 332 } 333 334 /* 335 * Write protection operations can result in Dirty=1,Write=0 PTEs. But in the 336 * case of X86_FEATURE_USER_SHSTK, these PTEs denote shadow stack memory. So 337 * when creating dirty, write-protected memory, a software bit is used: 338 * _PAGE_BIT_SAVED_DIRTY. The following functions take a PTE and transition the 339 * Dirty bit to SavedDirty, and vice-vesra. 340 * 341 * This shifting is only done if needed. In the case of shifting 342 * Dirty->SavedDirty, the condition is if the PTE is Write=0. In the case of 343 * shifting SavedDirty->Dirty, the condition is Write=1. 344 */ 345 static inline pgprotval_t mksaveddirty_shift(pgprotval_t v) 346 { 347 pgprotval_t cond = (~v >> _PAGE_BIT_RW) & 1; 348 349 v |= ((v >> _PAGE_BIT_DIRTY) & cond) << _PAGE_BIT_SAVED_DIRTY; 350 v &= ~(cond << _PAGE_BIT_DIRTY); 351 352 return v; 353 } 354 355 static inline pgprotval_t clear_saveddirty_shift(pgprotval_t v) 356 { 357 pgprotval_t cond = (v >> _PAGE_BIT_RW) & 1; 358 359 v |= ((v >> _PAGE_BIT_SAVED_DIRTY) & cond) << _PAGE_BIT_DIRTY; 360 v &= ~(cond << _PAGE_BIT_SAVED_DIRTY); 361 362 return v; 363 } 364 365 static inline pte_t pte_mksaveddirty(pte_t pte) 366 { 367 pteval_t v = native_pte_val(pte); 368 369 v = mksaveddirty_shift(v); 370 return native_make_pte(v); 371 } 372 373 static inline pte_t pte_clear_saveddirty(pte_t pte) 374 { 375 pteval_t v = native_pte_val(pte); 376 377 v = clear_saveddirty_shift(v); 378 return native_make_pte(v); 379 } 380 381 static inline pte_t pte_wrprotect(pte_t pte) 382 { 383 pte = pte_clear_flags(pte, _PAGE_RW); 384 385 /* 386 * Blindly clearing _PAGE_RW might accidentally create 387 * a shadow stack PTE (Write=0,Dirty=1). Move the hardware 388 * dirty value to the software bit, if present. 389 */ 390 return pte_mksaveddirty(pte); 391 } 392 393 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 394 static inline int pte_uffd_wp(pte_t pte) 395 { 396 return pte_flags(pte) & _PAGE_UFFD_WP; 397 } 398 399 static inline pte_t pte_mkuffd_wp(pte_t pte) 400 { 401 return pte_wrprotect(pte_set_flags(pte, _PAGE_UFFD_WP)); 402 } 403 404 static inline pte_t pte_clear_uffd_wp(pte_t pte) 405 { 406 return pte_clear_flags(pte, _PAGE_UFFD_WP); 407 } 408 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 409 410 static inline pte_t pte_mkclean(pte_t pte) 411 { 412 return pte_clear_flags(pte, _PAGE_DIRTY_BITS); 413 } 414 415 static inline pte_t pte_mkold(pte_t pte) 416 { 417 return pte_clear_flags(pte, _PAGE_ACCESSED); 418 } 419 420 static inline pte_t pte_mkexec(pte_t pte) 421 { 422 return pte_clear_flags(pte, _PAGE_NX); 423 } 424 425 static inline pte_t pte_mkdirty(pte_t pte) 426 { 427 pte = pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 428 429 return pte_mksaveddirty(pte); 430 } 431 432 static inline pte_t pte_mkwrite_shstk(pte_t pte) 433 { 434 pte = pte_clear_flags(pte, _PAGE_RW); 435 436 return pte_set_flags(pte, _PAGE_DIRTY); 437 } 438 439 static inline pte_t pte_mkyoung(pte_t pte) 440 { 441 return pte_set_flags(pte, _PAGE_ACCESSED); 442 } 443 444 static inline pte_t pte_mkwrite_novma(pte_t pte) 445 { 446 return pte_set_flags(pte, _PAGE_RW); 447 } 448 449 struct vm_area_struct; 450 pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma); 451 #define pte_mkwrite pte_mkwrite 452 453 static inline pte_t pte_mkhuge(pte_t pte) 454 { 455 return pte_set_flags(pte, _PAGE_PSE); 456 } 457 458 static inline pte_t pte_clrhuge(pte_t pte) 459 { 460 return pte_clear_flags(pte, _PAGE_PSE); 461 } 462 463 static inline pte_t pte_mkglobal(pte_t pte) 464 { 465 return pte_set_flags(pte, _PAGE_GLOBAL); 466 } 467 468 static inline pte_t pte_clrglobal(pte_t pte) 469 { 470 return pte_clear_flags(pte, _PAGE_GLOBAL); 471 } 472 473 static inline pte_t pte_mkspecial(pte_t pte) 474 { 475 return pte_set_flags(pte, _PAGE_SPECIAL); 476 } 477 478 static inline pte_t pte_mkdevmap(pte_t pte) 479 { 480 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 481 } 482 483 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 484 { 485 pmdval_t v = native_pmd_val(pmd); 486 487 return native_make_pmd(v | set); 488 } 489 490 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 491 { 492 pmdval_t v = native_pmd_val(pmd); 493 494 return native_make_pmd(v & ~clear); 495 } 496 497 /* See comments above mksaveddirty_shift() */ 498 static inline pmd_t pmd_mksaveddirty(pmd_t pmd) 499 { 500 pmdval_t v = native_pmd_val(pmd); 501 502 v = mksaveddirty_shift(v); 503 return native_make_pmd(v); 504 } 505 506 /* See comments above mksaveddirty_shift() */ 507 static inline pmd_t pmd_clear_saveddirty(pmd_t pmd) 508 { 509 pmdval_t v = native_pmd_val(pmd); 510 511 v = clear_saveddirty_shift(v); 512 return native_make_pmd(v); 513 } 514 515 static inline pmd_t pmd_wrprotect(pmd_t pmd) 516 { 517 pmd = pmd_clear_flags(pmd, _PAGE_RW); 518 519 /* 520 * Blindly clearing _PAGE_RW might accidentally create 521 * a shadow stack PMD (RW=0, Dirty=1). Move the hardware 522 * dirty value to the software bit. 523 */ 524 return pmd_mksaveddirty(pmd); 525 } 526 527 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 528 static inline int pmd_uffd_wp(pmd_t pmd) 529 { 530 return pmd_flags(pmd) & _PAGE_UFFD_WP; 531 } 532 533 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 534 { 535 return pmd_wrprotect(pmd_set_flags(pmd, _PAGE_UFFD_WP)); 536 } 537 538 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 539 { 540 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 541 } 542 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 543 544 static inline pmd_t pmd_mkold(pmd_t pmd) 545 { 546 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 547 } 548 549 static inline pmd_t pmd_mkclean(pmd_t pmd) 550 { 551 return pmd_clear_flags(pmd, _PAGE_DIRTY_BITS); 552 } 553 554 static inline pmd_t pmd_mkdirty(pmd_t pmd) 555 { 556 pmd = pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 557 558 return pmd_mksaveddirty(pmd); 559 } 560 561 static inline pmd_t pmd_mkwrite_shstk(pmd_t pmd) 562 { 563 pmd = pmd_clear_flags(pmd, _PAGE_RW); 564 565 return pmd_set_flags(pmd, _PAGE_DIRTY); 566 } 567 568 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 569 { 570 return pmd_set_flags(pmd, _PAGE_DEVMAP); 571 } 572 573 static inline pmd_t pmd_mkhuge(pmd_t pmd) 574 { 575 return pmd_set_flags(pmd, _PAGE_PSE); 576 } 577 578 static inline pmd_t pmd_mkyoung(pmd_t pmd) 579 { 580 return pmd_set_flags(pmd, _PAGE_ACCESSED); 581 } 582 583 static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) 584 { 585 return pmd_set_flags(pmd, _PAGE_RW); 586 } 587 588 pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma); 589 #define pmd_mkwrite pmd_mkwrite 590 591 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 592 { 593 pudval_t v = native_pud_val(pud); 594 595 return native_make_pud(v | set); 596 } 597 598 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 599 { 600 pudval_t v = native_pud_val(pud); 601 602 return native_make_pud(v & ~clear); 603 } 604 605 /* See comments above mksaveddirty_shift() */ 606 static inline pud_t pud_mksaveddirty(pud_t pud) 607 { 608 pudval_t v = native_pud_val(pud); 609 610 v = mksaveddirty_shift(v); 611 return native_make_pud(v); 612 } 613 614 /* See comments above mksaveddirty_shift() */ 615 static inline pud_t pud_clear_saveddirty(pud_t pud) 616 { 617 pudval_t v = native_pud_val(pud); 618 619 v = clear_saveddirty_shift(v); 620 return native_make_pud(v); 621 } 622 623 static inline pud_t pud_mkold(pud_t pud) 624 { 625 return pud_clear_flags(pud, _PAGE_ACCESSED); 626 } 627 628 static inline pud_t pud_mkclean(pud_t pud) 629 { 630 return pud_clear_flags(pud, _PAGE_DIRTY_BITS); 631 } 632 633 static inline pud_t pud_wrprotect(pud_t pud) 634 { 635 pud = pud_clear_flags(pud, _PAGE_RW); 636 637 /* 638 * Blindly clearing _PAGE_RW might accidentally create 639 * a shadow stack PUD (RW=0, Dirty=1). Move the hardware 640 * dirty value to the software bit. 641 */ 642 return pud_mksaveddirty(pud); 643 } 644 645 static inline pud_t pud_mkdirty(pud_t pud) 646 { 647 pud = pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 648 649 return pud_mksaveddirty(pud); 650 } 651 652 static inline pud_t pud_mkdevmap(pud_t pud) 653 { 654 return pud_set_flags(pud, _PAGE_DEVMAP); 655 } 656 657 static inline pud_t pud_mkhuge(pud_t pud) 658 { 659 return pud_set_flags(pud, _PAGE_PSE); 660 } 661 662 static inline pud_t pud_mkyoung(pud_t pud) 663 { 664 return pud_set_flags(pud, _PAGE_ACCESSED); 665 } 666 667 static inline pud_t pud_mkwrite(pud_t pud) 668 { 669 pud = pud_set_flags(pud, _PAGE_RW); 670 671 return pud_clear_saveddirty(pud); 672 } 673 674 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 675 static inline int pte_soft_dirty(pte_t pte) 676 { 677 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 678 } 679 680 static inline int pmd_soft_dirty(pmd_t pmd) 681 { 682 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 683 } 684 685 static inline int pud_soft_dirty(pud_t pud) 686 { 687 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 688 } 689 690 static inline pte_t pte_mksoft_dirty(pte_t pte) 691 { 692 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 693 } 694 695 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 696 { 697 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 698 } 699 700 static inline pud_t pud_mksoft_dirty(pud_t pud) 701 { 702 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 703 } 704 705 static inline pte_t pte_clear_soft_dirty(pte_t pte) 706 { 707 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 708 } 709 710 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 711 { 712 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 713 } 714 715 static inline pud_t pud_clear_soft_dirty(pud_t pud) 716 { 717 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 718 } 719 720 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 721 722 /* 723 * Mask out unsupported bits in a present pgprot. Non-present pgprots 724 * can use those bits for other purposes, so leave them be. 725 */ 726 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 727 { 728 pgprotval_t protval = pgprot_val(pgprot); 729 730 if (protval & _PAGE_PRESENT) 731 protval &= __supported_pte_mask; 732 733 return protval; 734 } 735 736 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 737 { 738 pgprotval_t massaged_val = massage_pgprot(pgprot); 739 740 /* mmdebug.h can not be included here because of dependencies */ 741 #ifdef CONFIG_DEBUG_VM 742 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 743 "attempted to set unsupported pgprot: %016llx " 744 "bits: %016llx supported: %016llx\n", 745 (u64)pgprot_val(pgprot), 746 (u64)pgprot_val(pgprot) ^ massaged_val, 747 (u64)__supported_pte_mask); 748 #endif 749 750 return massaged_val; 751 } 752 753 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 754 { 755 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 756 pfn ^= protnone_mask(pgprot_val(pgprot)); 757 pfn &= PTE_PFN_MASK; 758 return __pte(pfn | check_pgprot(pgprot)); 759 } 760 761 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 762 { 763 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 764 pfn ^= protnone_mask(pgprot_val(pgprot)); 765 pfn &= PHYSICAL_PMD_PAGE_MASK; 766 return __pmd(pfn | check_pgprot(pgprot)); 767 } 768 769 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 770 { 771 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 772 pfn ^= protnone_mask(pgprot_val(pgprot)); 773 pfn &= PHYSICAL_PUD_PAGE_MASK; 774 return __pud(pfn | check_pgprot(pgprot)); 775 } 776 777 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 778 { 779 return pfn_pmd(pmd_pfn(pmd), 780 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 781 } 782 783 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 784 785 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 786 { 787 pteval_t val = pte_val(pte), oldval = val; 788 pte_t pte_result; 789 790 /* 791 * Chop off the NX bit (if present), and add the NX portion of 792 * the newprot (if present): 793 */ 794 val &= _PAGE_CHG_MASK; 795 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 796 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 797 798 pte_result = __pte(val); 799 800 /* 801 * To avoid creating Write=0,Dirty=1 PTEs, pte_modify() needs to avoid: 802 * 1. Marking Write=0 PTEs Dirty=1 803 * 2. Marking Dirty=1 PTEs Write=0 804 * 805 * The first case cannot happen because the _PAGE_CHG_MASK will filter 806 * out any Dirty bit passed in newprot. Handle the second case by 807 * going through the mksaveddirty exercise. Only do this if the old 808 * value was Write=1 to avoid doing this on Shadow Stack PTEs. 809 */ 810 if (oldval & _PAGE_RW) 811 pte_result = pte_mksaveddirty(pte_result); 812 else 813 pte_result = pte_clear_saveddirty(pte_result); 814 815 return pte_result; 816 } 817 818 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 819 { 820 pmdval_t val = pmd_val(pmd), oldval = val; 821 pmd_t pmd_result; 822 823 val &= (_HPAGE_CHG_MASK & ~_PAGE_DIRTY); 824 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 825 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 826 827 pmd_result = __pmd(val); 828 829 /* 830 * To avoid creating Write=0,Dirty=1 PMDs, pte_modify() needs to avoid: 831 * 1. Marking Write=0 PMDs Dirty=1 832 * 2. Marking Dirty=1 PMDs Write=0 833 * 834 * The first case cannot happen because the _PAGE_CHG_MASK will filter 835 * out any Dirty bit passed in newprot. Handle the second case by 836 * going through the mksaveddirty exercise. Only do this if the old 837 * value was Write=1 to avoid doing this on Shadow Stack PTEs. 838 */ 839 if (oldval & _PAGE_RW) 840 pmd_result = pmd_mksaveddirty(pmd_result); 841 else 842 pmd_result = pmd_clear_saveddirty(pmd_result); 843 844 return pmd_result; 845 } 846 847 /* 848 * mprotect needs to preserve PAT and encryption bits when updating 849 * vm_page_prot 850 */ 851 #define pgprot_modify pgprot_modify 852 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 853 { 854 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 855 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 856 return __pgprot(preservebits | addbits); 857 } 858 859 #define pte_pgprot(x) __pgprot(pte_flags(x)) 860 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 861 #define pud_pgprot(x) __pgprot(pud_flags(x)) 862 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 863 864 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 865 866 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 867 enum page_cache_mode pcm, 868 enum page_cache_mode new_pcm) 869 { 870 /* 871 * PAT type is always WB for untracked ranges, so no need to check. 872 */ 873 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 874 return 1; 875 876 /* 877 * Certain new memtypes are not allowed with certain 878 * requested memtype: 879 * - request is uncached, return cannot be write-back 880 * - request is write-combine, return cannot be write-back 881 * - request is write-through, return cannot be write-back 882 * - request is write-through, return cannot be write-combine 883 */ 884 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 885 new_pcm == _PAGE_CACHE_MODE_WB) || 886 (pcm == _PAGE_CACHE_MODE_WC && 887 new_pcm == _PAGE_CACHE_MODE_WB) || 888 (pcm == _PAGE_CACHE_MODE_WT && 889 new_pcm == _PAGE_CACHE_MODE_WB) || 890 (pcm == _PAGE_CACHE_MODE_WT && 891 new_pcm == _PAGE_CACHE_MODE_WC)) { 892 return 0; 893 } 894 895 return 1; 896 } 897 898 pmd_t *populate_extra_pmd(unsigned long vaddr); 899 pte_t *populate_extra_pte(unsigned long vaddr); 900 901 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 902 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 903 904 /* 905 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 906 * Populates the user and returns the resulting PGD that must be set in 907 * the kernel copy of the page tables. 908 */ 909 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 910 { 911 if (!static_cpu_has(X86_FEATURE_PTI)) 912 return pgd; 913 return __pti_set_user_pgtbl(pgdp, pgd); 914 } 915 #else /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 916 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 917 { 918 return pgd; 919 } 920 #endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 921 922 #endif /* __ASSEMBLY__ */ 923 924 925 #ifdef CONFIG_X86_32 926 # include <asm/pgtable_32.h> 927 #else 928 # include <asm/pgtable_64.h> 929 #endif 930 931 #ifndef __ASSEMBLY__ 932 #include <linux/mm_types.h> 933 #include <linux/mmdebug.h> 934 #include <linux/log2.h> 935 #include <asm/fixmap.h> 936 937 static inline int pte_none(pte_t pte) 938 { 939 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 940 } 941 942 #define __HAVE_ARCH_PTE_SAME 943 static inline int pte_same(pte_t a, pte_t b) 944 { 945 return a.pte == b.pte; 946 } 947 948 static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr) 949 { 950 if (__pte_needs_invert(pte_val(pte))) 951 return __pte(pte_val(pte) - (nr << PFN_PTE_SHIFT)); 952 return __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT)); 953 } 954 #define pte_advance_pfn pte_advance_pfn 955 956 static inline int pte_present(pte_t a) 957 { 958 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 959 } 960 961 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 962 static inline int pte_devmap(pte_t a) 963 { 964 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 965 } 966 #endif 967 968 #define pte_accessible pte_accessible 969 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 970 { 971 if (pte_flags(a) & _PAGE_PRESENT) 972 return true; 973 974 if ((pte_flags(a) & _PAGE_PROTNONE) && 975 atomic_read(&mm->tlb_flush_pending)) 976 return true; 977 978 return false; 979 } 980 981 static inline int pmd_present(pmd_t pmd) 982 { 983 /* 984 * Checking for _PAGE_PSE is needed too because 985 * split_huge_page will temporarily clear the present bit (but 986 * the _PAGE_PSE flag will remain set at all times while the 987 * _PAGE_PRESENT bit is clear). 988 */ 989 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 990 } 991 992 #ifdef CONFIG_NUMA_BALANCING 993 /* 994 * These work without NUMA balancing but the kernel does not care. See the 995 * comment in include/linux/pgtable.h 996 */ 997 static inline int pte_protnone(pte_t pte) 998 { 999 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 1000 == _PAGE_PROTNONE; 1001 } 1002 1003 static inline int pmd_protnone(pmd_t pmd) 1004 { 1005 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 1006 == _PAGE_PROTNONE; 1007 } 1008 #endif /* CONFIG_NUMA_BALANCING */ 1009 1010 static inline int pmd_none(pmd_t pmd) 1011 { 1012 /* Only check low word on 32-bit platforms, since it might be 1013 out of sync with upper half. */ 1014 unsigned long val = native_pmd_val(pmd); 1015 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 1016 } 1017 1018 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 1019 { 1020 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 1021 } 1022 1023 /* 1024 * Currently stuck as a macro due to indirect forward reference to 1025 * linux/mmzone.h's __section_mem_map_addr() definition: 1026 */ 1027 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 1028 1029 /* 1030 * Conversion functions: convert a page and protection to a page entry, 1031 * and a page entry and page directory to the page they refer to. 1032 * 1033 * (Currently stuck as a macro because of indirect forward reference 1034 * to linux/mm.h:page_to_nid()) 1035 */ 1036 #define mk_pte(page, pgprot) \ 1037 ({ \ 1038 pgprot_t __pgprot = pgprot; \ 1039 \ 1040 WARN_ON_ONCE((pgprot_val(__pgprot) & (_PAGE_DIRTY | _PAGE_RW)) == \ 1041 _PAGE_DIRTY); \ 1042 pfn_pte(page_to_pfn(page), __pgprot); \ 1043 }) 1044 1045 static inline int pmd_bad(pmd_t pmd) 1046 { 1047 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) != 1048 (_KERNPG_TABLE & ~_PAGE_ACCESSED); 1049 } 1050 1051 static inline unsigned long pages_to_mb(unsigned long npg) 1052 { 1053 return npg >> (20 - PAGE_SHIFT); 1054 } 1055 1056 #if CONFIG_PGTABLE_LEVELS > 2 1057 static inline int pud_none(pud_t pud) 1058 { 1059 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 1060 } 1061 1062 static inline int pud_present(pud_t pud) 1063 { 1064 return pud_flags(pud) & _PAGE_PRESENT; 1065 } 1066 1067 static inline pmd_t *pud_pgtable(pud_t pud) 1068 { 1069 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 1070 } 1071 1072 /* 1073 * Currently stuck as a macro due to indirect forward reference to 1074 * linux/mmzone.h's __section_mem_map_addr() definition: 1075 */ 1076 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 1077 1078 #define pud_leaf pud_leaf 1079 static inline bool pud_leaf(pud_t pud) 1080 { 1081 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 1082 (_PAGE_PSE | _PAGE_PRESENT); 1083 } 1084 1085 static inline int pud_bad(pud_t pud) 1086 { 1087 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 1088 } 1089 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 1090 1091 #if CONFIG_PGTABLE_LEVELS > 3 1092 static inline int p4d_none(p4d_t p4d) 1093 { 1094 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 1095 } 1096 1097 static inline int p4d_present(p4d_t p4d) 1098 { 1099 return p4d_flags(p4d) & _PAGE_PRESENT; 1100 } 1101 1102 static inline pud_t *p4d_pgtable(p4d_t p4d) 1103 { 1104 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 1105 } 1106 1107 /* 1108 * Currently stuck as a macro due to indirect forward reference to 1109 * linux/mmzone.h's __section_mem_map_addr() definition: 1110 */ 1111 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 1112 1113 static inline int p4d_bad(p4d_t p4d) 1114 { 1115 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 1116 1117 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) 1118 ignore_flags |= _PAGE_NX; 1119 1120 return (p4d_flags(p4d) & ~ignore_flags) != 0; 1121 } 1122 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 1123 1124 static inline unsigned long p4d_index(unsigned long address) 1125 { 1126 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 1127 } 1128 1129 #if CONFIG_PGTABLE_LEVELS > 4 1130 static inline int pgd_present(pgd_t pgd) 1131 { 1132 if (!pgtable_l5_enabled()) 1133 return 1; 1134 return pgd_flags(pgd) & _PAGE_PRESENT; 1135 } 1136 1137 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 1138 { 1139 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 1140 } 1141 1142 /* 1143 * Currently stuck as a macro due to indirect forward reference to 1144 * linux/mmzone.h's __section_mem_map_addr() definition: 1145 */ 1146 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 1147 1148 /* to find an entry in a page-table-directory. */ 1149 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 1150 { 1151 if (!pgtable_l5_enabled()) 1152 return (p4d_t *)pgd; 1153 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 1154 } 1155 1156 static inline int pgd_bad(pgd_t pgd) 1157 { 1158 unsigned long ignore_flags = _PAGE_USER; 1159 1160 if (!pgtable_l5_enabled()) 1161 return 0; 1162 1163 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)) 1164 ignore_flags |= _PAGE_NX; 1165 1166 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 1167 } 1168 1169 static inline int pgd_none(pgd_t pgd) 1170 { 1171 if (!pgtable_l5_enabled()) 1172 return 0; 1173 /* 1174 * There is no need to do a workaround for the KNL stray 1175 * A/D bit erratum here. PGDs only point to page tables 1176 * except on 32-bit non-PAE which is not supported on 1177 * KNL. 1178 */ 1179 return !native_pgd_val(pgd); 1180 } 1181 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 1182 1183 #endif /* __ASSEMBLY__ */ 1184 1185 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 1186 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 1187 1188 #ifndef __ASSEMBLY__ 1189 1190 extern int direct_gbpages; 1191 void init_mem_mapping(void); 1192 void early_alloc_pgt_buf(void); 1193 void __init poking_init(void); 1194 unsigned long init_memory_mapping(unsigned long start, 1195 unsigned long end, pgprot_t prot); 1196 1197 #ifdef CONFIG_X86_64 1198 extern pgd_t trampoline_pgd_entry; 1199 #endif 1200 1201 /* local pte updates need not use xchg for locking */ 1202 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 1203 { 1204 pte_t res = *ptep; 1205 1206 /* Pure native function needs no input for mm, addr */ 1207 native_pte_clear(NULL, 0, ptep); 1208 return res; 1209 } 1210 1211 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 1212 { 1213 pmd_t res = *pmdp; 1214 1215 native_pmd_clear(pmdp); 1216 return res; 1217 } 1218 1219 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1220 { 1221 pud_t res = *pudp; 1222 1223 native_pud_clear(pudp); 1224 return res; 1225 } 1226 1227 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1228 pmd_t *pmdp, pmd_t pmd) 1229 { 1230 page_table_check_pmd_set(mm, pmdp, pmd); 1231 set_pmd(pmdp, pmd); 1232 } 1233 1234 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1235 pud_t *pudp, pud_t pud) 1236 { 1237 page_table_check_pud_set(mm, pudp, pud); 1238 native_set_pud(pudp, pud); 1239 } 1240 1241 /* 1242 * We only update the dirty/accessed state if we set 1243 * the dirty bit by hand in the kernel, since the hardware 1244 * will do the accessed bit for us, and we don't want to 1245 * race with other CPU's that might be updating the dirty 1246 * bit at the same time. 1247 */ 1248 struct vm_area_struct; 1249 1250 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1251 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1252 unsigned long address, pte_t *ptep, 1253 pte_t entry, int dirty); 1254 1255 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1256 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1257 unsigned long addr, pte_t *ptep); 1258 1259 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1260 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1261 unsigned long address, pte_t *ptep); 1262 1263 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1264 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1265 pte_t *ptep) 1266 { 1267 pte_t pte = native_ptep_get_and_clear(ptep); 1268 page_table_check_pte_clear(mm, pte); 1269 return pte; 1270 } 1271 1272 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1273 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1274 unsigned long addr, pte_t *ptep, 1275 int full) 1276 { 1277 pte_t pte; 1278 if (full) { 1279 /* 1280 * Full address destruction in progress; paravirt does not 1281 * care about updates and native needs no locking 1282 */ 1283 pte = native_local_ptep_get_and_clear(ptep); 1284 page_table_check_pte_clear(mm, pte); 1285 } else { 1286 pte = ptep_get_and_clear(mm, addr, ptep); 1287 } 1288 return pte; 1289 } 1290 1291 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1292 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1293 unsigned long addr, pte_t *ptep) 1294 { 1295 /* 1296 * Avoid accidentally creating shadow stack PTEs 1297 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with 1298 * the hardware setting Dirty=1. 1299 */ 1300 pte_t old_pte, new_pte; 1301 1302 old_pte = READ_ONCE(*ptep); 1303 do { 1304 new_pte = pte_wrprotect(old_pte); 1305 } while (!try_cmpxchg((long *)&ptep->pte, (long *)&old_pte, *(long *)&new_pte)); 1306 } 1307 1308 #define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0) 1309 1310 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1311 1312 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1313 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1314 unsigned long address, pmd_t *pmdp, 1315 pmd_t entry, int dirty); 1316 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1317 unsigned long address, pud_t *pudp, 1318 pud_t entry, int dirty); 1319 1320 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1321 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1322 unsigned long addr, pmd_t *pmdp); 1323 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1324 unsigned long addr, pud_t *pudp); 1325 1326 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1327 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1328 unsigned long address, pmd_t *pmdp); 1329 1330 1331 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1332 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1333 pmd_t *pmdp) 1334 { 1335 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1336 1337 page_table_check_pmd_clear(mm, pmd); 1338 1339 return pmd; 1340 } 1341 1342 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1343 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1344 unsigned long addr, pud_t *pudp) 1345 { 1346 pud_t pud = native_pudp_get_and_clear(pudp); 1347 1348 page_table_check_pud_clear(mm, pud); 1349 1350 return pud; 1351 } 1352 1353 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1354 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1355 unsigned long addr, pmd_t *pmdp) 1356 { 1357 /* 1358 * Avoid accidentally creating shadow stack PTEs 1359 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with 1360 * the hardware setting Dirty=1. 1361 */ 1362 pmd_t old_pmd, new_pmd; 1363 1364 old_pmd = READ_ONCE(*pmdp); 1365 do { 1366 new_pmd = pmd_wrprotect(old_pmd); 1367 } while (!try_cmpxchg((long *)pmdp, (long *)&old_pmd, *(long *)&new_pmd)); 1368 } 1369 1370 #ifndef pmdp_establish 1371 #define pmdp_establish pmdp_establish 1372 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1373 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1374 { 1375 page_table_check_pmd_set(vma->vm_mm, pmdp, pmd); 1376 if (IS_ENABLED(CONFIG_SMP)) { 1377 return xchg(pmdp, pmd); 1378 } else { 1379 pmd_t old = *pmdp; 1380 WRITE_ONCE(*pmdp, pmd); 1381 return old; 1382 } 1383 } 1384 #endif 1385 1386 #define __HAVE_ARCH_PMDP_INVALIDATE_AD 1387 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 1388 unsigned long address, pmd_t *pmdp); 1389 1390 /* 1391 * Page table pages are page-aligned. The lower half of the top 1392 * level is used for userspace and the top half for the kernel. 1393 * 1394 * Returns true for parts of the PGD that map userspace and 1395 * false for the parts that map the kernel. 1396 */ 1397 static inline bool pgdp_maps_userspace(void *__ptr) 1398 { 1399 unsigned long ptr = (unsigned long)__ptr; 1400 1401 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1402 } 1403 1404 #define pgd_leaf pgd_leaf 1405 static inline bool pgd_leaf(pgd_t pgd) { return false; } 1406 1407 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 1408 /* 1409 * All top-level MITIGATION_PAGE_TABLE_ISOLATION page tables are order-1 pages 1410 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1411 * the user one is in the last 4k. To switch between them, you 1412 * just need to flip the 12th bit in their addresses. 1413 */ 1414 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1415 1416 /* 1417 * This generates better code than the inline assembly in 1418 * __set_bit(). 1419 */ 1420 static inline void *ptr_set_bit(void *ptr, int bit) 1421 { 1422 unsigned long __ptr = (unsigned long)ptr; 1423 1424 __ptr |= BIT(bit); 1425 return (void *)__ptr; 1426 } 1427 static inline void *ptr_clear_bit(void *ptr, int bit) 1428 { 1429 unsigned long __ptr = (unsigned long)ptr; 1430 1431 __ptr &= ~BIT(bit); 1432 return (void *)__ptr; 1433 } 1434 1435 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1436 { 1437 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1438 } 1439 1440 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1441 { 1442 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1443 } 1444 1445 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1446 { 1447 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1448 } 1449 1450 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1451 { 1452 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1453 } 1454 #endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */ 1455 1456 /* 1457 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1458 * 1459 * dst - pointer to pgd range anywhere on a pgd page 1460 * src - "" 1461 * count - the number of pgds to copy. 1462 * 1463 * dst and src can be on the same page, but the range must not overlap, 1464 * and must not cross a page boundary. 1465 */ 1466 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1467 { 1468 memcpy(dst, src, count * sizeof(pgd_t)); 1469 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION 1470 if (!static_cpu_has(X86_FEATURE_PTI)) 1471 return; 1472 /* Clone the user space pgd as well */ 1473 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1474 count * sizeof(pgd_t)); 1475 #endif 1476 } 1477 1478 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1479 static inline int page_level_shift(enum pg_level level) 1480 { 1481 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1482 } 1483 static inline unsigned long page_level_size(enum pg_level level) 1484 { 1485 return 1UL << page_level_shift(level); 1486 } 1487 static inline unsigned long page_level_mask(enum pg_level level) 1488 { 1489 return ~(page_level_size(level) - 1); 1490 } 1491 1492 /* 1493 * The x86 doesn't have any external MMU info: the kernel page 1494 * tables contain all the necessary information. 1495 */ 1496 static inline void update_mmu_cache(struct vm_area_struct *vma, 1497 unsigned long addr, pte_t *ptep) 1498 { 1499 } 1500 static inline void update_mmu_cache_range(struct vm_fault *vmf, 1501 struct vm_area_struct *vma, unsigned long addr, 1502 pte_t *ptep, unsigned int nr) 1503 { 1504 } 1505 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1506 unsigned long addr, pmd_t *pmd) 1507 { 1508 } 1509 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1510 unsigned long addr, pud_t *pud) 1511 { 1512 } 1513 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1514 { 1515 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE); 1516 } 1517 1518 static inline int pte_swp_exclusive(pte_t pte) 1519 { 1520 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE; 1521 } 1522 1523 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1524 { 1525 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE); 1526 } 1527 1528 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1529 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1530 { 1531 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1532 } 1533 1534 static inline int pte_swp_soft_dirty(pte_t pte) 1535 { 1536 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1537 } 1538 1539 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1540 { 1541 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1542 } 1543 1544 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1545 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1546 { 1547 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1548 } 1549 1550 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1551 { 1552 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1553 } 1554 1555 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1556 { 1557 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1558 } 1559 #endif 1560 #endif 1561 1562 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1563 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1564 { 1565 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1566 } 1567 1568 static inline int pte_swp_uffd_wp(pte_t pte) 1569 { 1570 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1571 } 1572 1573 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1574 { 1575 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1576 } 1577 1578 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1579 { 1580 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1581 } 1582 1583 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1584 { 1585 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1586 } 1587 1588 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1589 { 1590 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1591 } 1592 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1593 1594 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1595 { 1596 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1597 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1598 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1599 #else 1600 return 0; 1601 #endif 1602 } 1603 1604 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1605 { 1606 u32 pkru = read_pkru(); 1607 1608 if (!__pkru_allows_read(pkru, pkey)) 1609 return false; 1610 if (write && !__pkru_allows_write(pkru, pkey)) 1611 return false; 1612 1613 return true; 1614 } 1615 1616 /* 1617 * 'pteval' can come from a PTE, PMD or PUD. We only check 1618 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1619 * same value on all 3 types. 1620 */ 1621 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1622 { 1623 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1624 1625 /* 1626 * Write=0,Dirty=1 PTEs are shadow stack, which the kernel 1627 * shouldn't generally allow access to, but since they 1628 * are already Write=0, the below logic covers both cases. 1629 */ 1630 if (write) 1631 need_pte_bits |= _PAGE_RW; 1632 1633 if ((pteval & need_pte_bits) != need_pte_bits) 1634 return 0; 1635 1636 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1637 } 1638 1639 #define pte_access_permitted pte_access_permitted 1640 static inline bool pte_access_permitted(pte_t pte, bool write) 1641 { 1642 return __pte_access_permitted(pte_val(pte), write); 1643 } 1644 1645 #define pmd_access_permitted pmd_access_permitted 1646 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1647 { 1648 return __pte_access_permitted(pmd_val(pmd), write); 1649 } 1650 1651 #define pud_access_permitted pud_access_permitted 1652 static inline bool pud_access_permitted(pud_t pud, bool write) 1653 { 1654 return __pte_access_permitted(pud_val(pud), write); 1655 } 1656 1657 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1658 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1659 1660 static inline bool arch_has_pfn_modify_check(void) 1661 { 1662 return boot_cpu_has_bug(X86_BUG_L1TF); 1663 } 1664 1665 #define arch_check_zapped_pte arch_check_zapped_pte 1666 void arch_check_zapped_pte(struct vm_area_struct *vma, pte_t pte); 1667 1668 #define arch_check_zapped_pmd arch_check_zapped_pmd 1669 void arch_check_zapped_pmd(struct vm_area_struct *vma, pmd_t pmd); 1670 1671 #ifdef CONFIG_XEN_PV 1672 #define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young 1673 static inline bool arch_has_hw_nonleaf_pmd_young(void) 1674 { 1675 return !cpu_feature_enabled(X86_FEATURE_XENPV); 1676 } 1677 #endif 1678 1679 #ifdef CONFIG_PAGE_TABLE_CHECK 1680 static inline bool pte_user_accessible_page(pte_t pte) 1681 { 1682 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER); 1683 } 1684 1685 static inline bool pmd_user_accessible_page(pmd_t pmd) 1686 { 1687 return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER); 1688 } 1689 1690 static inline bool pud_user_accessible_page(pud_t pud) 1691 { 1692 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER); 1693 } 1694 #endif 1695 1696 #ifdef CONFIG_X86_SGX 1697 int arch_memory_failure(unsigned long pfn, int flags); 1698 #define arch_memory_failure arch_memory_failure 1699 1700 bool arch_is_platform_page(u64 paddr); 1701 #define arch_is_platform_page arch_is_platform_page 1702 #endif 1703 1704 #endif /* __ASSEMBLY__ */ 1705 1706 #endif /* _ASM_X86_PGTABLE_H */ 1707