1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PERCPU_H 3 #define _ASM_X86_PERCPU_H 4 5 #ifdef CONFIG_X86_64 6 # define __percpu_seg gs 7 # define __percpu_rel (%rip) 8 #else 9 # define __percpu_seg fs 10 # define __percpu_rel 11 #endif 12 13 #ifdef __ASSEMBLER__ 14 15 #ifdef CONFIG_SMP 16 # define __percpu %__percpu_seg: 17 #else 18 # define __percpu 19 #endif 20 21 #define PER_CPU_VAR(var) __percpu(var)__percpu_rel 22 23 #else /* !__ASSEMBLY__: */ 24 25 #include <linux/args.h> 26 #include <linux/build_bug.h> 27 #include <linux/stringify.h> 28 #include <asm/asm.h> 29 30 #ifdef CONFIG_SMP 31 32 #ifdef CONFIG_CC_HAS_NAMED_AS 33 34 #ifdef __CHECKER__ 35 # define __seg_gs __attribute__((address_space(__seg_gs))) 36 # define __seg_fs __attribute__((address_space(__seg_fs))) 37 #endif 38 39 #define __percpu_seg_override CONCATENATE(__seg_, __percpu_seg) 40 #define __percpu_prefix "" 41 42 #else /* !CONFIG_CC_HAS_NAMED_AS: */ 43 44 #define __percpu_seg_override 45 #define __percpu_prefix "%%"__stringify(__percpu_seg)":" 46 47 #endif /* CONFIG_CC_HAS_NAMED_AS */ 48 49 #define __force_percpu_prefix "%%"__stringify(__percpu_seg)":" 50 #define __my_cpu_offset this_cpu_read(this_cpu_off) 51 52 /* 53 * Compared to the generic __my_cpu_offset version, the following 54 * saves one instruction and avoids clobbering a temp register. 55 * 56 * arch_raw_cpu_ptr should not be used in 32-bit VDSO for a 64-bit 57 * kernel, because games are played with CONFIG_X86_64 there and 58 * sizeof(this_cpu_off) becames 4. 59 */ 60 #ifndef BUILD_VDSO32_64 61 #define arch_raw_cpu_ptr(_ptr) \ 62 ({ \ 63 unsigned long tcp_ptr__ = raw_cpu_read_long(this_cpu_off); \ 64 \ 65 tcp_ptr__ += (__force unsigned long)(_ptr); \ 66 (typeof(*(_ptr)) __kernel __force *)tcp_ptr__; \ 67 }) 68 #else 69 #define arch_raw_cpu_ptr(_ptr) ({ BUILD_BUG(); (typeof(_ptr))0; }) 70 #endif 71 72 #define PER_CPU_VAR(var) %__percpu_seg:(var)__percpu_rel 73 74 #else /* !CONFIG_SMP: */ 75 76 #define __percpu_seg_override 77 #define __percpu_prefix "" 78 #define __force_percpu_prefix "" 79 80 #define PER_CPU_VAR(var) (var)__percpu_rel 81 82 #endif /* CONFIG_SMP */ 83 84 #define __my_cpu_type(var) typeof(var) __percpu_seg_override 85 #define __my_cpu_ptr(ptr) (__my_cpu_type(*(ptr))*)(__force uintptr_t)(ptr) 86 #define __my_cpu_var(var) (*__my_cpu_ptr(&(var))) 87 #define __percpu_arg(x) __percpu_prefix "%" #x 88 #define __force_percpu_arg(x) __force_percpu_prefix "%" #x 89 90 /* 91 * For arch-specific code, we can use direct single-insn ops (they 92 * don't give an lvalue though). 93 */ 94 95 #define __pcpu_type_1 u8 96 #define __pcpu_type_2 u16 97 #define __pcpu_type_4 u32 98 #define __pcpu_type_8 u64 99 100 #define __pcpu_cast_1(val) ((u8)(((unsigned long) val) & 0xff)) 101 #define __pcpu_cast_2(val) ((u16)(((unsigned long) val) & 0xffff)) 102 #define __pcpu_cast_4(val) ((u32)(((unsigned long) val) & 0xffffffff)) 103 #define __pcpu_cast_8(val) ((u64)(val)) 104 105 #define __pcpu_op_1(op) op "b " 106 #define __pcpu_op_2(op) op "w " 107 #define __pcpu_op_4(op) op "l " 108 #define __pcpu_op_8(op) op "q " 109 110 #define __pcpu_reg_1(mod, x) mod "q" (x) 111 #define __pcpu_reg_2(mod, x) mod "r" (x) 112 #define __pcpu_reg_4(mod, x) mod "r" (x) 113 #define __pcpu_reg_8(mod, x) mod "r" (x) 114 115 #define __pcpu_reg_imm_1(x) "qi" (x) 116 #define __pcpu_reg_imm_2(x) "ri" (x) 117 #define __pcpu_reg_imm_4(x) "ri" (x) 118 #define __pcpu_reg_imm_8(x) "re" (x) 119 120 #ifdef CONFIG_USE_X86_SEG_SUPPORT 121 122 #define __raw_cpu_read(size, qual, pcp) \ 123 ({ \ 124 *(qual __my_cpu_type(pcp) *)__my_cpu_ptr(&(pcp)); \ 125 }) 126 127 #define __raw_cpu_write(size, qual, pcp, val) \ 128 do { \ 129 *(qual __my_cpu_type(pcp) *)__my_cpu_ptr(&(pcp)) = (val); \ 130 } while (0) 131 132 #define __raw_cpu_read_const(pcp) __raw_cpu_read(, , pcp) 133 134 #else /* !CONFIG_USE_X86_SEG_SUPPORT: */ 135 136 #define __raw_cpu_read(size, qual, _var) \ 137 ({ \ 138 __pcpu_type_##size pfo_val__; \ 139 \ 140 asm qual (__pcpu_op_##size("mov") \ 141 __percpu_arg([var]) ", %[val]" \ 142 : [val] __pcpu_reg_##size("=", pfo_val__) \ 143 : [var] "m" (__my_cpu_var(_var))); \ 144 \ 145 (typeof(_var))(unsigned long) pfo_val__; \ 146 }) 147 148 #define __raw_cpu_write(size, qual, _var, _val) \ 149 do { \ 150 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \ 151 \ 152 if (0) { \ 153 typeof(_var) pto_tmp__; \ 154 pto_tmp__ = (_val); \ 155 (void)pto_tmp__; \ 156 } \ 157 asm qual (__pcpu_op_##size("mov") "%[val], " \ 158 __percpu_arg([var]) \ 159 : [var] "=m" (__my_cpu_var(_var)) \ 160 : [val] __pcpu_reg_imm_##size(pto_val__)); \ 161 } while (0) 162 163 /* 164 * The generic per-CPU infrastrucutre is not suitable for 165 * reading const-qualified variables. 166 */ 167 #define __raw_cpu_read_const(pcp) ({ BUILD_BUG(); (typeof(pcp))0; }) 168 169 #endif /* CONFIG_USE_X86_SEG_SUPPORT */ 170 171 #define __raw_cpu_read_stable(size, _var) \ 172 ({ \ 173 __pcpu_type_##size pfo_val__; \ 174 \ 175 asm(__pcpu_op_##size("mov") \ 176 __force_percpu_arg(a[var]) ", %[val]" \ 177 : [val] __pcpu_reg_##size("=", pfo_val__) \ 178 : [var] "i" (&(_var))); \ 179 \ 180 (typeof(_var))(unsigned long) pfo_val__; \ 181 }) 182 183 #define percpu_unary_op(size, qual, op, _var) \ 184 ({ \ 185 asm qual (__pcpu_op_##size(op) __percpu_arg([var]) \ 186 : [var] "+m" (__my_cpu_var(_var))); \ 187 }) 188 189 #define percpu_binary_op(size, qual, op, _var, _val) \ 190 do { \ 191 __pcpu_type_##size pto_val__ = __pcpu_cast_##size(_val); \ 192 \ 193 if (0) { \ 194 typeof(_var) pto_tmp__; \ 195 pto_tmp__ = (_val); \ 196 (void)pto_tmp__; \ 197 } \ 198 asm qual (__pcpu_op_##size(op) "%[val], " __percpu_arg([var]) \ 199 : [var] "+m" (__my_cpu_var(_var)) \ 200 : [val] __pcpu_reg_imm_##size(pto_val__)); \ 201 } while (0) 202 203 /* 204 * Generate a per-CPU add to memory instruction and optimize code 205 * if one is added or subtracted. 206 */ 207 #define percpu_add_op(size, qual, var, val) \ 208 do { \ 209 const int pao_ID__ = \ 210 (__builtin_constant_p(val) && \ 211 ((val) == 1 || \ 212 (val) == (typeof(val))-1)) ? (int)(val) : 0; \ 213 \ 214 if (0) { \ 215 typeof(var) pao_tmp__; \ 216 pao_tmp__ = (val); \ 217 (void)pao_tmp__; \ 218 } \ 219 if (pao_ID__ == 1) \ 220 percpu_unary_op(size, qual, "inc", var); \ 221 else if (pao_ID__ == -1) \ 222 percpu_unary_op(size, qual, "dec", var); \ 223 else \ 224 percpu_binary_op(size, qual, "add", var, val); \ 225 } while (0) 226 227 /* 228 * Add return operation 229 */ 230 #define percpu_add_return_op(size, qual, _var, _val) \ 231 ({ \ 232 __pcpu_type_##size paro_tmp__ = __pcpu_cast_##size(_val); \ 233 \ 234 asm qual (__pcpu_op_##size("xadd") "%[tmp], " \ 235 __percpu_arg([var]) \ 236 : [tmp] __pcpu_reg_##size("+", paro_tmp__), \ 237 [var] "+m" (__my_cpu_var(_var)) \ 238 : : "memory"); \ 239 (typeof(_var))(unsigned long) (paro_tmp__ + _val); \ 240 }) 241 242 /* 243 * raw_cpu_xchg() can use a load-store since 244 * it is not required to be IRQ-safe. 245 */ 246 #define raw_percpu_xchg_op(_var, _nval) \ 247 ({ \ 248 typeof(_var) pxo_old__ = raw_cpu_read(_var); \ 249 \ 250 raw_cpu_write(_var, _nval); \ 251 \ 252 pxo_old__; \ 253 }) 254 255 /* 256 * this_cpu_xchg() is implemented using CMPXCHG without a LOCK prefix. 257 * XCHG is expensive due to the implied LOCK prefix. The processor 258 * cannot prefetch cachelines if XCHG is used. 259 */ 260 #define this_percpu_xchg_op(_var, _nval) \ 261 ({ \ 262 typeof(_var) pxo_old__ = this_cpu_read(_var); \ 263 \ 264 do { } while (!this_cpu_try_cmpxchg(_var, &pxo_old__, _nval)); \ 265 \ 266 pxo_old__; \ 267 }) 268 269 /* 270 * CMPXCHG has no such implied lock semantics as a result it is much 271 * more efficient for CPU-local operations. 272 */ 273 #define percpu_cmpxchg_op(size, qual, _var, _oval, _nval) \ 274 ({ \ 275 __pcpu_type_##size pco_old__ = __pcpu_cast_##size(_oval); \ 276 __pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval); \ 277 \ 278 asm qual (__pcpu_op_##size("cmpxchg") "%[nval], " \ 279 __percpu_arg([var]) \ 280 : [oval] "+a" (pco_old__), \ 281 [var] "+m" (__my_cpu_var(_var)) \ 282 : [nval] __pcpu_reg_##size(, pco_new__) \ 283 : "memory"); \ 284 \ 285 (typeof(_var))(unsigned long) pco_old__; \ 286 }) 287 288 #define percpu_try_cmpxchg_op(size, qual, _var, _ovalp, _nval) \ 289 ({ \ 290 bool success; \ 291 __pcpu_type_##size *pco_oval__ = (__pcpu_type_##size *)(_ovalp); \ 292 __pcpu_type_##size pco_old__ = *pco_oval__; \ 293 __pcpu_type_##size pco_new__ = __pcpu_cast_##size(_nval); \ 294 \ 295 asm qual (__pcpu_op_##size("cmpxchg") "%[nval], " \ 296 __percpu_arg([var]) \ 297 CC_SET(z) \ 298 : CC_OUT(z) (success), \ 299 [oval] "+a" (pco_old__), \ 300 [var] "+m" (__my_cpu_var(_var)) \ 301 : [nval] __pcpu_reg_##size(, pco_new__) \ 302 : "memory"); \ 303 if (unlikely(!success)) \ 304 *pco_oval__ = pco_old__; \ 305 \ 306 likely(success); \ 307 }) 308 309 #if defined(CONFIG_X86_32) && !defined(CONFIG_UML) 310 311 #define percpu_cmpxchg64_op(size, qual, _var, _oval, _nval) \ 312 ({ \ 313 union { \ 314 u64 var; \ 315 struct { \ 316 u32 low, high; \ 317 }; \ 318 } old__, new__; \ 319 \ 320 old__.var = _oval; \ 321 new__.var = _nval; \ 322 \ 323 asm_inline qual ( \ 324 ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \ 325 "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \ 326 : ALT_OUTPUT_SP([var] "+m" (__my_cpu_var(_var)), \ 327 "+a" (old__.low), "+d" (old__.high)) \ 328 : "b" (new__.low), "c" (new__.high), \ 329 "S" (&(_var)) \ 330 : "memory"); \ 331 \ 332 old__.var; \ 333 }) 334 335 #define raw_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg64_op(8, , pcp, oval, nval) 336 #define this_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg64_op(8, volatile, pcp, oval, nval) 337 338 #define percpu_try_cmpxchg64_op(size, qual, _var, _ovalp, _nval) \ 339 ({ \ 340 bool success; \ 341 u64 *_oval = (u64 *)(_ovalp); \ 342 union { \ 343 u64 var; \ 344 struct { \ 345 u32 low, high; \ 346 }; \ 347 } old__, new__; \ 348 \ 349 old__.var = *_oval; \ 350 new__.var = _nval; \ 351 \ 352 asm_inline qual ( \ 353 ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \ 354 "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \ 355 CC_SET(z) \ 356 : ALT_OUTPUT_SP(CC_OUT(z) (success), \ 357 [var] "+m" (__my_cpu_var(_var)), \ 358 "+a" (old__.low), "+d" (old__.high)) \ 359 : "b" (new__.low), "c" (new__.high), \ 360 "S" (&(_var)) \ 361 : "memory"); \ 362 if (unlikely(!success)) \ 363 *_oval = old__.var; \ 364 \ 365 likely(success); \ 366 }) 367 368 #define raw_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg64_op(8, , pcp, ovalp, nval) 369 #define this_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg64_op(8, volatile, pcp, ovalp, nval) 370 371 #endif /* defined(CONFIG_X86_32) && !defined(CONFIG_UML) */ 372 373 #ifdef CONFIG_X86_64 374 #define raw_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg_op(8, , pcp, oval, nval); 375 #define this_cpu_cmpxchg64(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval); 376 377 #define raw_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, , pcp, ovalp, nval); 378 #define this_cpu_try_cmpxchg64(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, volatile, pcp, ovalp, nval); 379 380 #define percpu_cmpxchg128_op(size, qual, _var, _oval, _nval) \ 381 ({ \ 382 union { \ 383 u128 var; \ 384 struct { \ 385 u64 low, high; \ 386 }; \ 387 } old__, new__; \ 388 \ 389 old__.var = _oval; \ 390 new__.var = _nval; \ 391 \ 392 asm_inline qual ( \ 393 ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \ 394 "cmpxchg16b " __percpu_arg([var]), X86_FEATURE_CX16) \ 395 : ALT_OUTPUT_SP([var] "+m" (__my_cpu_var(_var)), \ 396 "+a" (old__.low), "+d" (old__.high)) \ 397 : "b" (new__.low), "c" (new__.high), \ 398 "S" (&(_var)) \ 399 : "memory"); \ 400 \ 401 old__.var; \ 402 }) 403 404 #define raw_cpu_cmpxchg128(pcp, oval, nval) percpu_cmpxchg128_op(16, , pcp, oval, nval) 405 #define this_cpu_cmpxchg128(pcp, oval, nval) percpu_cmpxchg128_op(16, volatile, pcp, oval, nval) 406 407 #define percpu_try_cmpxchg128_op(size, qual, _var, _ovalp, _nval) \ 408 ({ \ 409 bool success; \ 410 u128 *_oval = (u128 *)(_ovalp); \ 411 union { \ 412 u128 var; \ 413 struct { \ 414 u64 low, high; \ 415 }; \ 416 } old__, new__; \ 417 \ 418 old__.var = *_oval; \ 419 new__.var = _nval; \ 420 \ 421 asm_inline qual ( \ 422 ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \ 423 "cmpxchg16b " __percpu_arg([var]), X86_FEATURE_CX16) \ 424 CC_SET(z) \ 425 : ALT_OUTPUT_SP(CC_OUT(z) (success), \ 426 [var] "+m" (__my_cpu_var(_var)), \ 427 "+a" (old__.low), "+d" (old__.high)) \ 428 : "b" (new__.low), "c" (new__.high), \ 429 "S" (&(_var)) \ 430 : "memory"); \ 431 if (unlikely(!success)) \ 432 *_oval = old__.var; \ 433 \ 434 likely(success); \ 435 }) 436 437 #define raw_cpu_try_cmpxchg128(pcp, ovalp, nval) percpu_try_cmpxchg128_op(16, , pcp, ovalp, nval) 438 #define this_cpu_try_cmpxchg128(pcp, ovalp, nval) percpu_try_cmpxchg128_op(16, volatile, pcp, ovalp, nval) 439 440 #endif /* CONFIG_X86_64 */ 441 442 #define raw_cpu_read_1(pcp) __raw_cpu_read(1, , pcp) 443 #define raw_cpu_read_2(pcp) __raw_cpu_read(2, , pcp) 444 #define raw_cpu_read_4(pcp) __raw_cpu_read(4, , pcp) 445 #define raw_cpu_write_1(pcp, val) __raw_cpu_write(1, , pcp, val) 446 #define raw_cpu_write_2(pcp, val) __raw_cpu_write(2, , pcp, val) 447 #define raw_cpu_write_4(pcp, val) __raw_cpu_write(4, , pcp, val) 448 449 #define this_cpu_read_1(pcp) __raw_cpu_read(1, volatile, pcp) 450 #define this_cpu_read_2(pcp) __raw_cpu_read(2, volatile, pcp) 451 #define this_cpu_read_4(pcp) __raw_cpu_read(4, volatile, pcp) 452 #define this_cpu_write_1(pcp, val) __raw_cpu_write(1, volatile, pcp, val) 453 #define this_cpu_write_2(pcp, val) __raw_cpu_write(2, volatile, pcp, val) 454 #define this_cpu_write_4(pcp, val) __raw_cpu_write(4, volatile, pcp, val) 455 456 #define this_cpu_read_stable_1(pcp) __raw_cpu_read_stable(1, pcp) 457 #define this_cpu_read_stable_2(pcp) __raw_cpu_read_stable(2, pcp) 458 #define this_cpu_read_stable_4(pcp) __raw_cpu_read_stable(4, pcp) 459 460 #define raw_cpu_add_1(pcp, val) percpu_add_op(1, , (pcp), val) 461 #define raw_cpu_add_2(pcp, val) percpu_add_op(2, , (pcp), val) 462 #define raw_cpu_add_4(pcp, val) percpu_add_op(4, , (pcp), val) 463 #define raw_cpu_and_1(pcp, val) percpu_binary_op(1, , "and", (pcp), val) 464 #define raw_cpu_and_2(pcp, val) percpu_binary_op(2, , "and", (pcp), val) 465 #define raw_cpu_and_4(pcp, val) percpu_binary_op(4, , "and", (pcp), val) 466 #define raw_cpu_or_1(pcp, val) percpu_binary_op(1, , "or", (pcp), val) 467 #define raw_cpu_or_2(pcp, val) percpu_binary_op(2, , "or", (pcp), val) 468 #define raw_cpu_or_4(pcp, val) percpu_binary_op(4, , "or", (pcp), val) 469 #define raw_cpu_xchg_1(pcp, val) raw_percpu_xchg_op(pcp, val) 470 #define raw_cpu_xchg_2(pcp, val) raw_percpu_xchg_op(pcp, val) 471 #define raw_cpu_xchg_4(pcp, val) raw_percpu_xchg_op(pcp, val) 472 473 #define this_cpu_add_1(pcp, val) percpu_add_op(1, volatile, (pcp), val) 474 #define this_cpu_add_2(pcp, val) percpu_add_op(2, volatile, (pcp), val) 475 #define this_cpu_add_4(pcp, val) percpu_add_op(4, volatile, (pcp), val) 476 #define this_cpu_and_1(pcp, val) percpu_binary_op(1, volatile, "and", (pcp), val) 477 #define this_cpu_and_2(pcp, val) percpu_binary_op(2, volatile, "and", (pcp), val) 478 #define this_cpu_and_4(pcp, val) percpu_binary_op(4, volatile, "and", (pcp), val) 479 #define this_cpu_or_1(pcp, val) percpu_binary_op(1, volatile, "or", (pcp), val) 480 #define this_cpu_or_2(pcp, val) percpu_binary_op(2, volatile, "or", (pcp), val) 481 #define this_cpu_or_4(pcp, val) percpu_binary_op(4, volatile, "or", (pcp), val) 482 #define this_cpu_xchg_1(pcp, nval) this_percpu_xchg_op(pcp, nval) 483 #define this_cpu_xchg_2(pcp, nval) this_percpu_xchg_op(pcp, nval) 484 #define this_cpu_xchg_4(pcp, nval) this_percpu_xchg_op(pcp, nval) 485 486 #define raw_cpu_add_return_1(pcp, val) percpu_add_return_op(1, , pcp, val) 487 #define raw_cpu_add_return_2(pcp, val) percpu_add_return_op(2, , pcp, val) 488 #define raw_cpu_add_return_4(pcp, val) percpu_add_return_op(4, , pcp, val) 489 #define raw_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, , pcp, oval, nval) 490 #define raw_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, , pcp, oval, nval) 491 #define raw_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, , pcp, oval, nval) 492 #define raw_cpu_try_cmpxchg_1(pcp, ovalp, nval) percpu_try_cmpxchg_op(1, , pcp, ovalp, nval) 493 #define raw_cpu_try_cmpxchg_2(pcp, ovalp, nval) percpu_try_cmpxchg_op(2, , pcp, ovalp, nval) 494 #define raw_cpu_try_cmpxchg_4(pcp, ovalp, nval) percpu_try_cmpxchg_op(4, , pcp, ovalp, nval) 495 496 #define this_cpu_add_return_1(pcp, val) percpu_add_return_op(1, volatile, pcp, val) 497 #define this_cpu_add_return_2(pcp, val) percpu_add_return_op(2, volatile, pcp, val) 498 #define this_cpu_add_return_4(pcp, val) percpu_add_return_op(4, volatile, pcp, val) 499 #define this_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(1, volatile, pcp, oval, nval) 500 #define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(2, volatile, pcp, oval, nval) 501 #define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(4, volatile, pcp, oval, nval) 502 #define this_cpu_try_cmpxchg_1(pcp, ovalp, nval) percpu_try_cmpxchg_op(1, volatile, pcp, ovalp, nval) 503 #define this_cpu_try_cmpxchg_2(pcp, ovalp, nval) percpu_try_cmpxchg_op(2, volatile, pcp, ovalp, nval) 504 #define this_cpu_try_cmpxchg_4(pcp, ovalp, nval) percpu_try_cmpxchg_op(4, volatile, pcp, ovalp, nval) 505 506 /* 507 * Per-CPU atomic 64-bit operations are only available under 64-bit kernels. 508 * 32-bit kernels must fall back to generic operations. 509 */ 510 #ifdef CONFIG_X86_64 511 512 #define raw_cpu_read_8(pcp) __raw_cpu_read(8, , pcp) 513 #define raw_cpu_write_8(pcp, val) __raw_cpu_write(8, , pcp, val) 514 515 #define this_cpu_read_8(pcp) __raw_cpu_read(8, volatile, pcp) 516 #define this_cpu_write_8(pcp, val) __raw_cpu_write(8, volatile, pcp, val) 517 518 #define this_cpu_read_stable_8(pcp) __raw_cpu_read_stable(8, pcp) 519 520 #define raw_cpu_add_8(pcp, val) percpu_add_op(8, , (pcp), val) 521 #define raw_cpu_and_8(pcp, val) percpu_binary_op(8, , "and", (pcp), val) 522 #define raw_cpu_or_8(pcp, val) percpu_binary_op(8, , "or", (pcp), val) 523 #define raw_cpu_add_return_8(pcp, val) percpu_add_return_op(8, , pcp, val) 524 #define raw_cpu_xchg_8(pcp, nval) raw_percpu_xchg_op(pcp, nval) 525 #define raw_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, , pcp, oval, nval) 526 #define raw_cpu_try_cmpxchg_8(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, , pcp, ovalp, nval) 527 528 #define this_cpu_add_8(pcp, val) percpu_add_op(8, volatile, (pcp), val) 529 #define this_cpu_and_8(pcp, val) percpu_binary_op(8, volatile, "and", (pcp), val) 530 #define this_cpu_or_8(pcp, val) percpu_binary_op(8, volatile, "or", (pcp), val) 531 #define this_cpu_add_return_8(pcp, val) percpu_add_return_op(8, volatile, pcp, val) 532 #define this_cpu_xchg_8(pcp, nval) this_percpu_xchg_op(pcp, nval) 533 #define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(8, volatile, pcp, oval, nval) 534 #define this_cpu_try_cmpxchg_8(pcp, ovalp, nval) percpu_try_cmpxchg_op(8, volatile, pcp, ovalp, nval) 535 536 #define raw_cpu_read_long(pcp) raw_cpu_read_8(pcp) 537 538 #else /* !CONFIG_X86_64: */ 539 540 /* There is no generic 64-bit read stable operation for 32-bit targets. */ 541 #define this_cpu_read_stable_8(pcp) ({ BUILD_BUG(); (typeof(pcp))0; }) 542 543 #define raw_cpu_read_long(pcp) raw_cpu_read_4(pcp) 544 545 #endif /* CONFIG_X86_64 */ 546 547 #define this_cpu_read_const(pcp) __raw_cpu_read_const(pcp) 548 549 /* 550 * this_cpu_read() makes the compiler load the per-CPU variable every time 551 * it is accessed while this_cpu_read_stable() allows the value to be cached. 552 * this_cpu_read_stable() is more efficient and can be used if its value 553 * is guaranteed to be valid across CPUs. The current users include 554 * current_task and cpu_current_top_of_stack, both of which are 555 * actually per-thread variables implemented as per-CPU variables and 556 * thus stable for the duration of the respective task. 557 */ 558 #define this_cpu_read_stable(pcp) __pcpu_size_call_return(this_cpu_read_stable_, pcp) 559 560 #define x86_this_cpu_constant_test_bit(_nr, _var) \ 561 ({ \ 562 unsigned long __percpu *addr__ = \ 563 (unsigned long __percpu *)&(_var) + ((_nr) / BITS_PER_LONG); \ 564 \ 565 !!((1UL << ((_nr) % BITS_PER_LONG)) & raw_cpu_read(*addr__)); \ 566 }) 567 568 #define x86_this_cpu_variable_test_bit(_nr, _var) \ 569 ({ \ 570 bool oldbit; \ 571 \ 572 asm volatile("btl %[nr], " __percpu_arg([var]) \ 573 CC_SET(c) \ 574 : CC_OUT(c) (oldbit) \ 575 : [var] "m" (__my_cpu_var(_var)), \ 576 [nr] "rI" (_nr)); \ 577 oldbit; \ 578 }) 579 580 #define x86_this_cpu_test_bit(_nr, _var) \ 581 (__builtin_constant_p(_nr) \ 582 ? x86_this_cpu_constant_test_bit(_nr, _var) \ 583 : x86_this_cpu_variable_test_bit(_nr, _var)) 584 585 586 #include <asm-generic/percpu.h> 587 588 /* We can use this directly for local CPU (faster). */ 589 DECLARE_PER_CPU_CACHE_HOT(unsigned long, this_cpu_off); 590 591 #endif /* !__ASSEMBLER__ */ 592 593 #ifdef CONFIG_SMP 594 595 /* 596 * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu 597 * variables that are initialized and accessed before there are per_cpu 598 * areas allocated. 599 */ 600 601 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ 602 DEFINE_PER_CPU(_type, _name) = _initvalue; \ 603 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \ 604 { [0 ... NR_CPUS-1] = _initvalue }; \ 605 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map 606 607 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ 608 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \ 609 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \ 610 { [0 ... NR_CPUS-1] = _initvalue }; \ 611 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map 612 613 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ 614 EXPORT_PER_CPU_SYMBOL(_name) 615 616 #define DECLARE_EARLY_PER_CPU(_type, _name) \ 617 DECLARE_PER_CPU(_type, _name); \ 618 extern __typeof__(_type) *_name##_early_ptr; \ 619 extern __typeof__(_type) _name##_early_map[] 620 621 #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \ 622 DECLARE_PER_CPU_READ_MOSTLY(_type, _name); \ 623 extern __typeof__(_type) *_name##_early_ptr; \ 624 extern __typeof__(_type) _name##_early_map[] 625 626 #define early_per_cpu_ptr(_name) (_name##_early_ptr) 627 #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) 628 629 #define early_per_cpu(_name, _cpu) \ 630 *(early_per_cpu_ptr(_name) ? \ 631 &early_per_cpu_ptr(_name)[_cpu] : \ 632 &per_cpu(_name, _cpu)) 633 634 #else /* !CONFIG_SMP: */ 635 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ 636 DEFINE_PER_CPU(_type, _name) = _initvalue 637 638 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ 639 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue 640 641 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ 642 EXPORT_PER_CPU_SYMBOL(_name) 643 644 #define DECLARE_EARLY_PER_CPU(_type, _name) \ 645 DECLARE_PER_CPU(_type, _name) 646 647 #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \ 648 DECLARE_PER_CPU_READ_MOSTLY(_type, _name) 649 650 #define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu) 651 #define early_per_cpu_ptr(_name) NULL 652 /* no early_per_cpu_map() */ 653 654 #endif /* !CONFIG_SMP */ 655 656 #endif /* _ASM_X86_PERCPU_H */ 657