1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PARAVIRT_H 3 #define _ASM_X86_PARAVIRT_H 4 /* Various instructions on x86 need to be replaced for 5 * para-virtualization: those hooks are defined here. */ 6 7 #include <asm/paravirt_types.h> 8 9 #ifndef __ASSEMBLER__ 10 struct mm_struct; 11 #endif 12 13 #ifdef CONFIG_PARAVIRT 14 #include <asm/pgtable_types.h> 15 #include <asm/asm.h> 16 #include <asm/nospec-branch.h> 17 18 #ifndef __ASSEMBLER__ 19 #include <linux/bug.h> 20 #include <linux/types.h> 21 #include <linux/cpumask.h> 22 #include <linux/static_call_types.h> 23 #include <asm/frame.h> 24 25 u64 dummy_steal_clock(int cpu); 26 u64 dummy_sched_clock(void); 27 28 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); 29 DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock); 30 31 void paravirt_set_sched_clock(u64 (*func)(void)); 32 33 static __always_inline u64 paravirt_sched_clock(void) 34 { 35 return static_call(pv_sched_clock)(); 36 } 37 38 struct static_key; 39 extern struct static_key paravirt_steal_enabled; 40 extern struct static_key paravirt_steal_rq_enabled; 41 42 __visible void __native_queued_spin_unlock(struct qspinlock *lock); 43 bool pv_is_native_spin_unlock(void); 44 __visible bool __native_vcpu_is_preempted(long cpu); 45 bool pv_is_native_vcpu_is_preempted(void); 46 47 static inline u64 paravirt_steal_clock(int cpu) 48 { 49 return static_call(pv_steal_clock)(cpu); 50 } 51 52 #ifdef CONFIG_PARAVIRT_SPINLOCKS 53 void __init paravirt_set_cap(void); 54 #endif 55 56 /* The paravirtualized I/O functions */ 57 static inline void slow_down_io(void) 58 { 59 PVOP_VCALL0(cpu.io_delay); 60 #ifdef REALLY_SLOW_IO 61 PVOP_VCALL0(cpu.io_delay); 62 PVOP_VCALL0(cpu.io_delay); 63 PVOP_VCALL0(cpu.io_delay); 64 #endif 65 } 66 67 void native_flush_tlb_local(void); 68 void native_flush_tlb_global(void); 69 void native_flush_tlb_one_user(unsigned long addr); 70 void native_flush_tlb_multi(const struct cpumask *cpumask, 71 const struct flush_tlb_info *info); 72 73 static inline void __flush_tlb_local(void) 74 { 75 PVOP_VCALL0(mmu.flush_tlb_user); 76 } 77 78 static inline void __flush_tlb_global(void) 79 { 80 PVOP_VCALL0(mmu.flush_tlb_kernel); 81 } 82 83 static inline void __flush_tlb_one_user(unsigned long addr) 84 { 85 PVOP_VCALL1(mmu.flush_tlb_one_user, addr); 86 } 87 88 static inline void __flush_tlb_multi(const struct cpumask *cpumask, 89 const struct flush_tlb_info *info) 90 { 91 PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info); 92 } 93 94 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm) 95 { 96 PVOP_VCALL1(mmu.exit_mmap, mm); 97 } 98 99 static inline void notify_page_enc_status_changed(unsigned long pfn, 100 int npages, bool enc) 101 { 102 PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc); 103 } 104 105 static __always_inline void arch_safe_halt(void) 106 { 107 PVOP_VCALL0(irq.safe_halt); 108 } 109 110 static inline void halt(void) 111 { 112 PVOP_VCALL0(irq.halt); 113 } 114 115 #ifdef CONFIG_PARAVIRT_XXL 116 static inline void load_sp0(unsigned long sp0) 117 { 118 PVOP_VCALL1(cpu.load_sp0, sp0); 119 } 120 121 /* The paravirtualized CPUID instruction. */ 122 static inline void __cpuid(unsigned int *eax, unsigned int *ebx, 123 unsigned int *ecx, unsigned int *edx) 124 { 125 PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx); 126 } 127 128 /* 129 * These special macros can be used to get or set a debugging register 130 */ 131 static __always_inline unsigned long paravirt_get_debugreg(int reg) 132 { 133 return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg); 134 } 135 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg) 136 static __always_inline void set_debugreg(unsigned long val, int reg) 137 { 138 PVOP_VCALL2(cpu.set_debugreg, reg, val); 139 } 140 141 static inline unsigned long read_cr0(void) 142 { 143 return PVOP_CALL0(unsigned long, cpu.read_cr0); 144 } 145 146 static inline void write_cr0(unsigned long x) 147 { 148 PVOP_VCALL1(cpu.write_cr0, x); 149 } 150 151 static __always_inline unsigned long read_cr2(void) 152 { 153 return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2, 154 "mov %%cr2, %%rax;", ALT_NOT_XEN); 155 } 156 157 static __always_inline void write_cr2(unsigned long x) 158 { 159 PVOP_VCALL1(mmu.write_cr2, x); 160 } 161 162 static inline unsigned long __read_cr3(void) 163 { 164 return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3, 165 "mov %%cr3, %%rax;", ALT_NOT_XEN); 166 } 167 168 static inline void write_cr3(unsigned long x) 169 { 170 PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN); 171 } 172 173 static inline void __write_cr4(unsigned long x) 174 { 175 PVOP_VCALL1(cpu.write_cr4, x); 176 } 177 178 static inline u64 paravirt_read_msr(unsigned msr) 179 { 180 return PVOP_CALL1(u64, cpu.read_msr, msr); 181 } 182 183 static inline void paravirt_write_msr(unsigned msr, 184 unsigned low, unsigned high) 185 { 186 PVOP_VCALL3(cpu.write_msr, msr, low, high); 187 } 188 189 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err) 190 { 191 return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err); 192 } 193 194 static inline int paravirt_write_msr_safe(unsigned msr, 195 unsigned low, unsigned high) 196 { 197 return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high); 198 } 199 200 #define rdmsr(msr, val1, val2) \ 201 do { \ 202 u64 _l = paravirt_read_msr(msr); \ 203 val1 = (u32)_l; \ 204 val2 = _l >> 32; \ 205 } while (0) 206 207 #define wrmsr(msr, val1, val2) \ 208 do { \ 209 paravirt_write_msr(msr, val1, val2); \ 210 } while (0) 211 212 #define rdmsrl(msr, val) \ 213 do { \ 214 val = paravirt_read_msr(msr); \ 215 } while (0) 216 217 static inline void wrmsrl(unsigned msr, u64 val) 218 { 219 wrmsr(msr, (u32)val, (u32)(val>>32)); 220 } 221 222 #define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b) 223 224 /* rdmsr with exception handling */ 225 #define rdmsr_safe(msr, a, b) \ 226 ({ \ 227 int _err; \ 228 u64 _l = paravirt_read_msr_safe(msr, &_err); \ 229 (*a) = (u32)_l; \ 230 (*b) = _l >> 32; \ 231 _err; \ 232 }) 233 234 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p) 235 { 236 int err; 237 238 *p = paravirt_read_msr_safe(msr, &err); 239 return err; 240 } 241 242 static inline unsigned long long paravirt_read_pmc(int counter) 243 { 244 return PVOP_CALL1(u64, cpu.read_pmc, counter); 245 } 246 247 #define rdpmc(counter, low, high) \ 248 do { \ 249 u64 _l = paravirt_read_pmc(counter); \ 250 low = (u32)_l; \ 251 high = _l >> 32; \ 252 } while (0) 253 254 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter)) 255 256 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries) 257 { 258 PVOP_VCALL2(cpu.alloc_ldt, ldt, entries); 259 } 260 261 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries) 262 { 263 PVOP_VCALL2(cpu.free_ldt, ldt, entries); 264 } 265 266 static inline void load_TR_desc(void) 267 { 268 PVOP_VCALL0(cpu.load_tr_desc); 269 } 270 static inline void load_gdt(const struct desc_ptr *dtr) 271 { 272 PVOP_VCALL1(cpu.load_gdt, dtr); 273 } 274 static inline void load_idt(const struct desc_ptr *dtr) 275 { 276 PVOP_VCALL1(cpu.load_idt, dtr); 277 } 278 static inline void set_ldt(const void *addr, unsigned entries) 279 { 280 PVOP_VCALL2(cpu.set_ldt, addr, entries); 281 } 282 static inline unsigned long paravirt_store_tr(void) 283 { 284 return PVOP_CALL0(unsigned long, cpu.store_tr); 285 } 286 287 #define store_tr(tr) ((tr) = paravirt_store_tr()) 288 static inline void load_TLS(struct thread_struct *t, unsigned cpu) 289 { 290 PVOP_VCALL2(cpu.load_tls, t, cpu); 291 } 292 293 static inline void load_gs_index(unsigned int gs) 294 { 295 PVOP_VCALL1(cpu.load_gs_index, gs); 296 } 297 298 static inline void write_ldt_entry(struct desc_struct *dt, int entry, 299 const void *desc) 300 { 301 PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc); 302 } 303 304 static inline void write_gdt_entry(struct desc_struct *dt, int entry, 305 void *desc, int type) 306 { 307 PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type); 308 } 309 310 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) 311 { 312 PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g); 313 } 314 315 #ifdef CONFIG_X86_IOPL_IOPERM 316 static inline void tss_invalidate_io_bitmap(void) 317 { 318 PVOP_VCALL0(cpu.invalidate_io_bitmap); 319 } 320 321 static inline void tss_update_io_bitmap(void) 322 { 323 PVOP_VCALL0(cpu.update_io_bitmap); 324 } 325 #endif 326 327 static inline void paravirt_enter_mmap(struct mm_struct *next) 328 { 329 PVOP_VCALL1(mmu.enter_mmap, next); 330 } 331 332 static inline int paravirt_pgd_alloc(struct mm_struct *mm) 333 { 334 return PVOP_CALL1(int, mmu.pgd_alloc, mm); 335 } 336 337 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) 338 { 339 PVOP_VCALL2(mmu.pgd_free, mm, pgd); 340 } 341 342 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn) 343 { 344 PVOP_VCALL2(mmu.alloc_pte, mm, pfn); 345 } 346 static inline void paravirt_release_pte(unsigned long pfn) 347 { 348 PVOP_VCALL1(mmu.release_pte, pfn); 349 } 350 351 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn) 352 { 353 PVOP_VCALL2(mmu.alloc_pmd, mm, pfn); 354 } 355 356 static inline void paravirt_release_pmd(unsigned long pfn) 357 { 358 PVOP_VCALL1(mmu.release_pmd, pfn); 359 } 360 361 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn) 362 { 363 PVOP_VCALL2(mmu.alloc_pud, mm, pfn); 364 } 365 static inline void paravirt_release_pud(unsigned long pfn) 366 { 367 PVOP_VCALL1(mmu.release_pud, pfn); 368 } 369 370 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn) 371 { 372 PVOP_VCALL2(mmu.alloc_p4d, mm, pfn); 373 } 374 375 static inline void paravirt_release_p4d(unsigned long pfn) 376 { 377 PVOP_VCALL1(mmu.release_p4d, pfn); 378 } 379 380 static inline pte_t __pte(pteval_t val) 381 { 382 return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val, 383 "mov %%rdi, %%rax", ALT_NOT_XEN) }; 384 } 385 386 static inline pteval_t pte_val(pte_t pte) 387 { 388 return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte, 389 "mov %%rdi, %%rax", ALT_NOT_XEN); 390 } 391 392 static inline pgd_t __pgd(pgdval_t val) 393 { 394 return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val, 395 "mov %%rdi, %%rax", ALT_NOT_XEN) }; 396 } 397 398 static inline pgdval_t pgd_val(pgd_t pgd) 399 { 400 return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd, 401 "mov %%rdi, %%rax", ALT_NOT_XEN); 402 } 403 404 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 405 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr, 406 pte_t *ptep) 407 { 408 pteval_t ret; 409 410 ret = PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep); 411 412 return (pte_t) { .pte = ret }; 413 } 414 415 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, 416 pte_t *ptep, pte_t old_pte, pte_t pte) 417 { 418 419 PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte); 420 } 421 422 static inline void set_pte(pte_t *ptep, pte_t pte) 423 { 424 PVOP_VCALL2(mmu.set_pte, ptep, pte.pte); 425 } 426 427 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 428 { 429 PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd)); 430 } 431 432 static inline pmd_t __pmd(pmdval_t val) 433 { 434 return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val, 435 "mov %%rdi, %%rax", ALT_NOT_XEN) }; 436 } 437 438 static inline pmdval_t pmd_val(pmd_t pmd) 439 { 440 return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd, 441 "mov %%rdi, %%rax", ALT_NOT_XEN); 442 } 443 444 static inline void set_pud(pud_t *pudp, pud_t pud) 445 { 446 PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud)); 447 } 448 449 static inline pud_t __pud(pudval_t val) 450 { 451 pudval_t ret; 452 453 ret = PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val, 454 "mov %%rdi, %%rax", ALT_NOT_XEN); 455 456 return (pud_t) { ret }; 457 } 458 459 static inline pudval_t pud_val(pud_t pud) 460 { 461 return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud, 462 "mov %%rdi, %%rax", ALT_NOT_XEN); 463 } 464 465 static inline void pud_clear(pud_t *pudp) 466 { 467 set_pud(pudp, native_make_pud(0)); 468 } 469 470 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d) 471 { 472 p4dval_t val = native_p4d_val(p4d); 473 474 PVOP_VCALL2(mmu.set_p4d, p4dp, val); 475 } 476 477 #if CONFIG_PGTABLE_LEVELS >= 5 478 479 static inline p4d_t __p4d(p4dval_t val) 480 { 481 p4dval_t ret = PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val, 482 "mov %%rdi, %%rax", ALT_NOT_XEN); 483 484 return (p4d_t) { ret }; 485 } 486 487 static inline p4dval_t p4d_val(p4d_t p4d) 488 { 489 return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d, 490 "mov %%rdi, %%rax", ALT_NOT_XEN); 491 } 492 493 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd) 494 { 495 PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd)); 496 } 497 498 #define set_pgd(pgdp, pgdval) do { \ 499 if (pgtable_l5_enabled()) \ 500 __set_pgd(pgdp, pgdval); \ 501 else \ 502 set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd }); \ 503 } while (0) 504 505 #define pgd_clear(pgdp) do { \ 506 if (pgtable_l5_enabled()) \ 507 set_pgd(pgdp, native_make_pgd(0)); \ 508 } while (0) 509 510 #endif /* CONFIG_PGTABLE_LEVELS == 5 */ 511 512 static inline void p4d_clear(p4d_t *p4dp) 513 { 514 set_p4d(p4dp, native_make_p4d(0)); 515 } 516 517 static inline void set_pte_atomic(pte_t *ptep, pte_t pte) 518 { 519 set_pte(ptep, pte); 520 } 521 522 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 523 pte_t *ptep) 524 { 525 set_pte(ptep, native_make_pte(0)); 526 } 527 528 static inline void pmd_clear(pmd_t *pmdp) 529 { 530 set_pmd(pmdp, native_make_pmd(0)); 531 } 532 533 #define __HAVE_ARCH_START_CONTEXT_SWITCH 534 static inline void arch_start_context_switch(struct task_struct *prev) 535 { 536 PVOP_VCALL1(cpu.start_context_switch, prev); 537 } 538 539 static inline void arch_end_context_switch(struct task_struct *next) 540 { 541 PVOP_VCALL1(cpu.end_context_switch, next); 542 } 543 544 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE 545 static inline void arch_enter_lazy_mmu_mode(void) 546 { 547 PVOP_VCALL0(mmu.lazy_mode.enter); 548 } 549 550 static inline void arch_leave_lazy_mmu_mode(void) 551 { 552 PVOP_VCALL0(mmu.lazy_mode.leave); 553 } 554 555 static inline void arch_flush_lazy_mmu_mode(void) 556 { 557 PVOP_VCALL0(mmu.lazy_mode.flush); 558 } 559 560 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, 561 phys_addr_t phys, pgprot_t flags) 562 { 563 pv_ops.mmu.set_fixmap(idx, phys, flags); 564 } 565 #endif 566 567 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS) 568 569 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock, 570 u32 val) 571 { 572 PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val); 573 } 574 575 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) 576 { 577 PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock, 578 "movb $0, (%%" _ASM_ARG1 ");", 579 ALT_NOT(X86_FEATURE_PVUNLOCK)); 580 } 581 582 static __always_inline void pv_wait(u8 *ptr, u8 val) 583 { 584 PVOP_VCALL2(lock.wait, ptr, val); 585 } 586 587 static __always_inline void pv_kick(int cpu) 588 { 589 PVOP_VCALL1(lock.kick, cpu); 590 } 591 592 static __always_inline bool pv_vcpu_is_preempted(long cpu) 593 { 594 return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu, 595 "xor %%" _ASM_AX ", %%" _ASM_AX ";", 596 ALT_NOT(X86_FEATURE_VCPUPREEMPT)); 597 } 598 599 void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock); 600 bool __raw_callee_save___native_vcpu_is_preempted(long cpu); 601 602 #endif /* SMP && PARAVIRT_SPINLOCKS */ 603 604 #ifdef CONFIG_X86_32 605 /* save and restore all caller-save registers, except return value */ 606 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" 607 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" 608 #else 609 /* save and restore all caller-save registers, except return value */ 610 #define PV_SAVE_ALL_CALLER_REGS \ 611 "push %rcx;" \ 612 "push %rdx;" \ 613 "push %rsi;" \ 614 "push %rdi;" \ 615 "push %r8;" \ 616 "push %r9;" \ 617 "push %r10;" \ 618 "push %r11;" 619 #define PV_RESTORE_ALL_CALLER_REGS \ 620 "pop %r11;" \ 621 "pop %r10;" \ 622 "pop %r9;" \ 623 "pop %r8;" \ 624 "pop %rdi;" \ 625 "pop %rsi;" \ 626 "pop %rdx;" \ 627 "pop %rcx;" 628 #endif 629 630 /* 631 * Generate a thunk around a function which saves all caller-save 632 * registers except for the return value. This allows C functions to 633 * be called from assembler code where fewer than normal registers are 634 * available. It may also help code generation around calls from C 635 * code if the common case doesn't use many registers. 636 * 637 * When a callee is wrapped in a thunk, the caller can assume that all 638 * arg regs and all scratch registers are preserved across the 639 * call. The return value in rax/eax will not be saved, even for void 640 * functions. 641 */ 642 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func 643 #define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \ 644 extern typeof(func) __raw_callee_save_##func; \ 645 \ 646 asm(".pushsection " section ", \"ax\";" \ 647 ".globl " PV_THUNK_NAME(func) ";" \ 648 ".type " PV_THUNK_NAME(func) ", @function;" \ 649 ASM_FUNC_ALIGN \ 650 PV_THUNK_NAME(func) ":" \ 651 ASM_ENDBR \ 652 FRAME_BEGIN \ 653 PV_SAVE_ALL_CALLER_REGS \ 654 "call " #func ";" \ 655 PV_RESTORE_ALL_CALLER_REGS \ 656 FRAME_END \ 657 ASM_RET \ 658 ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \ 659 ".popsection") 660 661 #define PV_CALLEE_SAVE_REGS_THUNK(func) \ 662 __PV_CALLEE_SAVE_REGS_THUNK(func, ".text") 663 664 /* Get a reference to a callee-save function */ 665 #define PV_CALLEE_SAVE(func) \ 666 ((struct paravirt_callee_save) { __raw_callee_save_##func }) 667 668 /* Promise that "func" already uses the right calling convention */ 669 #define __PV_IS_CALLEE_SAVE(func) \ 670 ((struct paravirt_callee_save) { func }) 671 672 #ifdef CONFIG_PARAVIRT_XXL 673 static __always_inline unsigned long arch_local_save_flags(void) 674 { 675 return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;", 676 ALT_NOT_XEN); 677 } 678 679 static __always_inline void arch_local_irq_disable(void) 680 { 681 PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN); 682 } 683 684 static __always_inline void arch_local_irq_enable(void) 685 { 686 PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN); 687 } 688 689 static __always_inline unsigned long arch_local_irq_save(void) 690 { 691 unsigned long f; 692 693 f = arch_local_save_flags(); 694 arch_local_irq_disable(); 695 return f; 696 } 697 #endif 698 699 700 /* Make sure as little as possible of this mess escapes. */ 701 #undef PARAVIRT_CALL 702 #undef __PVOP_CALL 703 #undef __PVOP_VCALL 704 #undef PVOP_VCALL0 705 #undef PVOP_CALL0 706 #undef PVOP_VCALL1 707 #undef PVOP_CALL1 708 #undef PVOP_VCALL2 709 #undef PVOP_CALL2 710 #undef PVOP_VCALL3 711 #undef PVOP_CALL3 712 #undef PVOP_VCALL4 713 #undef PVOP_CALL4 714 715 extern void default_banner(void); 716 void native_pv_lock_init(void) __init; 717 718 #else /* __ASSEMBLER__ */ 719 720 #ifdef CONFIG_X86_64 721 #ifdef CONFIG_PARAVIRT_XXL 722 #ifdef CONFIG_DEBUG_ENTRY 723 724 #define PARA_INDIRECT(addr) *addr(%rip) 725 726 .macro PARA_IRQ_save_fl 727 ANNOTATE_RETPOLINE_SAFE; 728 call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl); 729 .endm 730 731 #define SAVE_FLAGS ALTERNATIVE_2 "PARA_IRQ_save_fl;", \ 732 "ALT_CALL_INSTR;", ALT_CALL_ALWAYS, \ 733 "pushf; pop %rax;", ALT_NOT_XEN 734 #endif 735 #endif /* CONFIG_PARAVIRT_XXL */ 736 #endif /* CONFIG_X86_64 */ 737 738 #endif /* __ASSEMBLER__ */ 739 #else /* CONFIG_PARAVIRT */ 740 # define default_banner x86_init_noop 741 742 #ifndef __ASSEMBLER__ 743 static inline void native_pv_lock_init(void) 744 { 745 } 746 #endif 747 #endif /* !CONFIG_PARAVIRT */ 748 749 #ifndef __ASSEMBLER__ 750 #ifndef CONFIG_PARAVIRT_XXL 751 static inline void paravirt_enter_mmap(struct mm_struct *mm) 752 { 753 } 754 #endif 755 756 #ifndef CONFIG_PARAVIRT 757 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm) 758 { 759 } 760 #endif 761 762 #ifndef CONFIG_PARAVIRT_SPINLOCKS 763 static inline void paravirt_set_cap(void) 764 { 765 } 766 #endif 767 #endif /* __ASSEMBLER__ */ 768 #endif /* _ASM_X86_PARAVIRT_H */ 769