xref: /linux/arch/x86/include/asm/paravirt.h (revision 570d58b12fbf7bae0ba72d929ccf914a4df5ca7c) 
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PARAVIRT_H
3 #define _ASM_X86_PARAVIRT_H
4 /* Various instructions on x86 need to be replaced for
5  * para-virtualization: those hooks are defined here. */
6 
7 #include <asm/paravirt_types.h>
8 
9 #ifndef __ASSEMBLER__
10 struct mm_struct;
11 #endif
12 
13 #ifdef CONFIG_PARAVIRT
14 #include <asm/pgtable_types.h>
15 #include <asm/asm.h>
16 #include <asm/nospec-branch.h>
17 
18 #ifndef __ASSEMBLER__
19 #include <linux/bug.h>
20 #include <linux/types.h>
21 #include <linux/cpumask.h>
22 #include <linux/static_call_types.h>
23 #include <asm/frame.h>
24 
25 u64 dummy_steal_clock(int cpu);
26 u64 dummy_sched_clock(void);
27 
28 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock);
29 DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock);
30 
31 void paravirt_set_sched_clock(u64 (*func)(void));
32 
33 static __always_inline u64 paravirt_sched_clock(void)
34 {
35 	return static_call(pv_sched_clock)();
36 }
37 
38 struct static_key;
39 extern struct static_key paravirt_steal_enabled;
40 extern struct static_key paravirt_steal_rq_enabled;
41 
42 __visible void __native_queued_spin_unlock(struct qspinlock *lock);
43 bool pv_is_native_spin_unlock(void);
44 __visible bool __native_vcpu_is_preempted(long cpu);
45 bool pv_is_native_vcpu_is_preempted(void);
46 
47 static inline u64 paravirt_steal_clock(int cpu)
48 {
49 	return static_call(pv_steal_clock)(cpu);
50 }
51 
52 #ifdef CONFIG_PARAVIRT_SPINLOCKS
53 void __init paravirt_set_cap(void);
54 #endif
55 
56 /* The paravirtualized I/O functions */
57 static inline void slow_down_io(void)
58 {
59 	PVOP_VCALL0(cpu.io_delay);
60 #ifdef REALLY_SLOW_IO
61 	PVOP_VCALL0(cpu.io_delay);
62 	PVOP_VCALL0(cpu.io_delay);
63 	PVOP_VCALL0(cpu.io_delay);
64 #endif
65 }
66 
67 void native_flush_tlb_local(void);
68 void native_flush_tlb_global(void);
69 void native_flush_tlb_one_user(unsigned long addr);
70 void native_flush_tlb_multi(const struct cpumask *cpumask,
71 			     const struct flush_tlb_info *info);
72 
73 static inline void __flush_tlb_local(void)
74 {
75 	PVOP_VCALL0(mmu.flush_tlb_user);
76 }
77 
78 static inline void __flush_tlb_global(void)
79 {
80 	PVOP_VCALL0(mmu.flush_tlb_kernel);
81 }
82 
83 static inline void __flush_tlb_one_user(unsigned long addr)
84 {
85 	PVOP_VCALL1(mmu.flush_tlb_one_user, addr);
86 }
87 
88 static inline void __flush_tlb_multi(const struct cpumask *cpumask,
89 				      const struct flush_tlb_info *info)
90 {
91 	PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info);
92 }
93 
94 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
95 {
96 	PVOP_VCALL1(mmu.exit_mmap, mm);
97 }
98 
99 static inline void notify_page_enc_status_changed(unsigned long pfn,
100 						  int npages, bool enc)
101 {
102 	PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc);
103 }
104 
105 static __always_inline void arch_safe_halt(void)
106 {
107 	PVOP_VCALL0(irq.safe_halt);
108 }
109 
110 static inline void halt(void)
111 {
112 	PVOP_VCALL0(irq.halt);
113 }
114 
115 #ifdef CONFIG_PARAVIRT_XXL
116 static inline void load_sp0(unsigned long sp0)
117 {
118 	PVOP_VCALL1(cpu.load_sp0, sp0);
119 }
120 
121 /* The paravirtualized CPUID instruction. */
122 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
123 			   unsigned int *ecx, unsigned int *edx)
124 {
125 	PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx);
126 }
127 
128 /*
129  * These special macros can be used to get or set a debugging register
130  */
131 static __always_inline unsigned long paravirt_get_debugreg(int reg)
132 {
133 	return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg);
134 }
135 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
136 static __always_inline void set_debugreg(unsigned long val, int reg)
137 {
138 	PVOP_VCALL2(cpu.set_debugreg, reg, val);
139 }
140 
141 static inline unsigned long read_cr0(void)
142 {
143 	return PVOP_CALL0(unsigned long, cpu.read_cr0);
144 }
145 
146 static inline void write_cr0(unsigned long x)
147 {
148 	PVOP_VCALL1(cpu.write_cr0, x);
149 }
150 
151 static __always_inline unsigned long read_cr2(void)
152 {
153 	return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2,
154 				"mov %%cr2, %%rax;", ALT_NOT_XEN);
155 }
156 
157 static __always_inline void write_cr2(unsigned long x)
158 {
159 	PVOP_VCALL1(mmu.write_cr2, x);
160 }
161 
162 static inline unsigned long __read_cr3(void)
163 {
164 	return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3,
165 			      "mov %%cr3, %%rax;", ALT_NOT_XEN);
166 }
167 
168 static inline void write_cr3(unsigned long x)
169 {
170 	PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN);
171 }
172 
173 static inline void __write_cr4(unsigned long x)
174 {
175 	PVOP_VCALL1(cpu.write_cr4, x);
176 }
177 
178 static inline u64 paravirt_read_msr(u32 msr)
179 {
180 	return PVOP_CALL1(u64, cpu.read_msr, msr);
181 }
182 
183 static inline void paravirt_write_msr(u32 msr, u64 val)
184 {
185 	PVOP_VCALL2(cpu.write_msr, msr, val);
186 }
187 
188 static inline int paravirt_read_msr_safe(u32 msr, u64 *val)
189 {
190 	return PVOP_CALL2(int, cpu.read_msr_safe, msr, val);
191 }
192 
193 static inline int paravirt_write_msr_safe(u32 msr, u64 val)
194 {
195 	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
196 }
197 
198 #define rdmsr(msr, val1, val2)			\
199 do {						\
200 	u64 _l = paravirt_read_msr(msr);	\
201 	val1 = (u32)_l;				\
202 	val2 = _l >> 32;			\
203 } while (0)
204 
205 static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
206 {
207 	paravirt_write_msr(msr, (u64)high << 32 | low);
208 }
209 
210 #define rdmsrq(msr, val)			\
211 do {						\
212 	val = paravirt_read_msr(msr);		\
213 } while (0)
214 
215 static inline void wrmsrq(u32 msr, u64 val)
216 {
217 	paravirt_write_msr(msr, val);
218 }
219 
220 static inline int wrmsrq_safe(u32 msr, u64 val)
221 {
222 	return paravirt_write_msr_safe(msr, val);
223 }
224 
225 /* rdmsr with exception handling */
226 #define rdmsr_safe(msr, a, b)				\
227 ({							\
228 	u64 _l;						\
229 	int _err = paravirt_read_msr_safe((msr), &_l);	\
230 	(*a) = (u32)_l;					\
231 	(*b) = (u32)(_l >> 32);				\
232 	_err;						\
233 })
234 
235 static __always_inline int rdmsrq_safe(u32 msr, u64 *p)
236 {
237 	return paravirt_read_msr_safe(msr, p);
238 }
239 
240 static __always_inline u64 rdpmc(int counter)
241 {
242 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
243 }
244 
245 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
246 {
247 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
248 }
249 
250 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
251 {
252 	PVOP_VCALL2(cpu.free_ldt, ldt, entries);
253 }
254 
255 static inline void load_TR_desc(void)
256 {
257 	PVOP_VCALL0(cpu.load_tr_desc);
258 }
259 static inline void load_gdt(const struct desc_ptr *dtr)
260 {
261 	PVOP_VCALL1(cpu.load_gdt, dtr);
262 }
263 static inline void load_idt(const struct desc_ptr *dtr)
264 {
265 	PVOP_VCALL1(cpu.load_idt, dtr);
266 }
267 static inline void set_ldt(const void *addr, unsigned entries)
268 {
269 	PVOP_VCALL2(cpu.set_ldt, addr, entries);
270 }
271 static inline unsigned long paravirt_store_tr(void)
272 {
273 	return PVOP_CALL0(unsigned long, cpu.store_tr);
274 }
275 
276 #define store_tr(tr)	((tr) = paravirt_store_tr())
277 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
278 {
279 	PVOP_VCALL2(cpu.load_tls, t, cpu);
280 }
281 
282 static inline void load_gs_index(unsigned int gs)
283 {
284 	PVOP_VCALL1(cpu.load_gs_index, gs);
285 }
286 
287 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
288 				   const void *desc)
289 {
290 	PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc);
291 }
292 
293 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
294 				   void *desc, int type)
295 {
296 	PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type);
297 }
298 
299 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
300 {
301 	PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g);
302 }
303 
304 #ifdef CONFIG_X86_IOPL_IOPERM
305 static inline void tss_invalidate_io_bitmap(void)
306 {
307 	PVOP_VCALL0(cpu.invalidate_io_bitmap);
308 }
309 
310 static inline void tss_update_io_bitmap(void)
311 {
312 	PVOP_VCALL0(cpu.update_io_bitmap);
313 }
314 #endif
315 
316 static inline void paravirt_enter_mmap(struct mm_struct *next)
317 {
318 	PVOP_VCALL1(mmu.enter_mmap, next);
319 }
320 
321 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
322 {
323 	return PVOP_CALL1(int, mmu.pgd_alloc, mm);
324 }
325 
326 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
327 {
328 	PVOP_VCALL2(mmu.pgd_free, mm, pgd);
329 }
330 
331 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
332 {
333 	PVOP_VCALL2(mmu.alloc_pte, mm, pfn);
334 }
335 static inline void paravirt_release_pte(unsigned long pfn)
336 {
337 	PVOP_VCALL1(mmu.release_pte, pfn);
338 }
339 
340 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
341 {
342 	PVOP_VCALL2(mmu.alloc_pmd, mm, pfn);
343 }
344 
345 static inline void paravirt_release_pmd(unsigned long pfn)
346 {
347 	PVOP_VCALL1(mmu.release_pmd, pfn);
348 }
349 
350 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
351 {
352 	PVOP_VCALL2(mmu.alloc_pud, mm, pfn);
353 }
354 static inline void paravirt_release_pud(unsigned long pfn)
355 {
356 	PVOP_VCALL1(mmu.release_pud, pfn);
357 }
358 
359 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
360 {
361 	PVOP_VCALL2(mmu.alloc_p4d, mm, pfn);
362 }
363 
364 static inline void paravirt_release_p4d(unsigned long pfn)
365 {
366 	PVOP_VCALL1(mmu.release_p4d, pfn);
367 }
368 
369 static inline pte_t __pte(pteval_t val)
370 {
371 	return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val,
372 					  "mov %%rdi, %%rax", ALT_NOT_XEN) };
373 }
374 
375 static inline pteval_t pte_val(pte_t pte)
376 {
377 	return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte,
378 				"mov %%rdi, %%rax", ALT_NOT_XEN);
379 }
380 
381 static inline pgd_t __pgd(pgdval_t val)
382 {
383 	return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val,
384 					  "mov %%rdi, %%rax", ALT_NOT_XEN) };
385 }
386 
387 static inline pgdval_t pgd_val(pgd_t pgd)
388 {
389 	return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd,
390 				"mov %%rdi, %%rax", ALT_NOT_XEN);
391 }
392 
393 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
394 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr,
395 					   pte_t *ptep)
396 {
397 	pteval_t ret;
398 
399 	ret = PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep);
400 
401 	return (pte_t) { .pte = ret };
402 }
403 
404 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
405 					   pte_t *ptep, pte_t old_pte, pte_t pte)
406 {
407 
408 	PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte);
409 }
410 
411 static inline void set_pte(pte_t *ptep, pte_t pte)
412 {
413 	PVOP_VCALL2(mmu.set_pte, ptep, pte.pte);
414 }
415 
416 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
417 {
418 	PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd));
419 }
420 
421 static inline pmd_t __pmd(pmdval_t val)
422 {
423 	return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val,
424 					  "mov %%rdi, %%rax", ALT_NOT_XEN) };
425 }
426 
427 static inline pmdval_t pmd_val(pmd_t pmd)
428 {
429 	return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd,
430 				"mov %%rdi, %%rax", ALT_NOT_XEN);
431 }
432 
433 static inline void set_pud(pud_t *pudp, pud_t pud)
434 {
435 	PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud));
436 }
437 
438 static inline pud_t __pud(pudval_t val)
439 {
440 	pudval_t ret;
441 
442 	ret = PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val,
443 			       "mov %%rdi, %%rax", ALT_NOT_XEN);
444 
445 	return (pud_t) { ret };
446 }
447 
448 static inline pudval_t pud_val(pud_t pud)
449 {
450 	return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud,
451 				"mov %%rdi, %%rax", ALT_NOT_XEN);
452 }
453 
454 static inline void pud_clear(pud_t *pudp)
455 {
456 	set_pud(pudp, native_make_pud(0));
457 }
458 
459 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
460 {
461 	p4dval_t val = native_p4d_val(p4d);
462 
463 	PVOP_VCALL2(mmu.set_p4d, p4dp, val);
464 }
465 
466 #if CONFIG_PGTABLE_LEVELS >= 5
467 
468 static inline p4d_t __p4d(p4dval_t val)
469 {
470 	p4dval_t ret = PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val,
471 					"mov %%rdi, %%rax", ALT_NOT_XEN);
472 
473 	return (p4d_t) { ret };
474 }
475 
476 static inline p4dval_t p4d_val(p4d_t p4d)
477 {
478 	return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d,
479 				"mov %%rdi, %%rax", ALT_NOT_XEN);
480 }
481 
482 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)
483 {
484 	PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd));
485 }
486 
487 #define set_pgd(pgdp, pgdval) do {					\
488 	if (pgtable_l5_enabled())						\
489 		__set_pgd(pgdp, pgdval);				\
490 	else								\
491 		set_p4d((p4d_t *)(pgdp), (p4d_t) { (pgdval).pgd });	\
492 } while (0)
493 
494 #define pgd_clear(pgdp) do {						\
495 	if (pgtable_l5_enabled())					\
496 		set_pgd(pgdp, native_make_pgd(0));			\
497 } while (0)
498 
499 #endif  /* CONFIG_PGTABLE_LEVELS == 5 */
500 
501 static inline void p4d_clear(p4d_t *p4dp)
502 {
503 	set_p4d(p4dp, native_make_p4d(0));
504 }
505 
506 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
507 {
508 	set_pte(ptep, pte);
509 }
510 
511 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
512 			     pte_t *ptep)
513 {
514 	set_pte(ptep, native_make_pte(0));
515 }
516 
517 static inline void pmd_clear(pmd_t *pmdp)
518 {
519 	set_pmd(pmdp, native_make_pmd(0));
520 }
521 
522 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
523 static inline void arch_start_context_switch(struct task_struct *prev)
524 {
525 	PVOP_VCALL1(cpu.start_context_switch, prev);
526 }
527 
528 static inline void arch_end_context_switch(struct task_struct *next)
529 {
530 	PVOP_VCALL1(cpu.end_context_switch, next);
531 }
532 
533 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
534 static inline void arch_enter_lazy_mmu_mode(void)
535 {
536 	PVOP_VCALL0(mmu.lazy_mode.enter);
537 }
538 
539 static inline void arch_leave_lazy_mmu_mode(void)
540 {
541 	PVOP_VCALL0(mmu.lazy_mode.leave);
542 }
543 
544 static inline void arch_flush_lazy_mmu_mode(void)
545 {
546 	PVOP_VCALL0(mmu.lazy_mode.flush);
547 }
548 
549 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
550 				phys_addr_t phys, pgprot_t flags)
551 {
552 	pv_ops.mmu.set_fixmap(idx, phys, flags);
553 }
554 #endif
555 
556 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
557 
558 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
559 							u32 val)
560 {
561 	PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val);
562 }
563 
564 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
565 {
566 	PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock,
567 			  "movb $0, (%%" _ASM_ARG1 ");",
568 			  ALT_NOT(X86_FEATURE_PVUNLOCK));
569 }
570 
571 static __always_inline void pv_wait(u8 *ptr, u8 val)
572 {
573 	PVOP_VCALL2(lock.wait, ptr, val);
574 }
575 
576 static __always_inline void pv_kick(int cpu)
577 {
578 	PVOP_VCALL1(lock.kick, cpu);
579 }
580 
581 static __always_inline bool pv_vcpu_is_preempted(long cpu)
582 {
583 	return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu,
584 				"xor %%" _ASM_AX ", %%" _ASM_AX ";",
585 				ALT_NOT(X86_FEATURE_VCPUPREEMPT));
586 }
587 
588 void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock);
589 bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
590 
591 #endif /* SMP && PARAVIRT_SPINLOCKS */
592 
593 #ifdef CONFIG_X86_32
594 /* save and restore all caller-save registers, except return value */
595 #define PV_SAVE_ALL_CALLER_REGS		"pushl %ecx;"
596 #define PV_RESTORE_ALL_CALLER_REGS	"popl  %ecx;"
597 #else
598 /* save and restore all caller-save registers, except return value */
599 #define PV_SAVE_ALL_CALLER_REGS						\
600 	"push %rcx;"							\
601 	"push %rdx;"							\
602 	"push %rsi;"							\
603 	"push %rdi;"							\
604 	"push %r8;"							\
605 	"push %r9;"							\
606 	"push %r10;"							\
607 	"push %r11;"
608 #define PV_RESTORE_ALL_CALLER_REGS					\
609 	"pop %r11;"							\
610 	"pop %r10;"							\
611 	"pop %r9;"							\
612 	"pop %r8;"							\
613 	"pop %rdi;"							\
614 	"pop %rsi;"							\
615 	"pop %rdx;"							\
616 	"pop %rcx;"
617 #endif
618 
619 /*
620  * Generate a thunk around a function which saves all caller-save
621  * registers except for the return value.  This allows C functions to
622  * be called from assembler code where fewer than normal registers are
623  * available.  It may also help code generation around calls from C
624  * code if the common case doesn't use many registers.
625  *
626  * When a callee is wrapped in a thunk, the caller can assume that all
627  * arg regs and all scratch registers are preserved across the
628  * call. The return value in rax/eax will not be saved, even for void
629  * functions.
630  */
631 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
632 #define __PV_CALLEE_SAVE_REGS_THUNK(func, section)			\
633 	extern typeof(func) __raw_callee_save_##func;			\
634 									\
635 	asm(".pushsection " section ", \"ax\";"				\
636 	    ".globl " PV_THUNK_NAME(func) ";"				\
637 	    ".type " PV_THUNK_NAME(func) ", @function;"			\
638 	    ASM_FUNC_ALIGN						\
639 	    PV_THUNK_NAME(func) ":"					\
640 	    ASM_ENDBR							\
641 	    FRAME_BEGIN							\
642 	    PV_SAVE_ALL_CALLER_REGS					\
643 	    "call " #func ";"						\
644 	    PV_RESTORE_ALL_CALLER_REGS					\
645 	    FRAME_END							\
646 	    ASM_RET							\
647 	    ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";"	\
648 	    ".popsection")
649 
650 #define PV_CALLEE_SAVE_REGS_THUNK(func)			\
651 	__PV_CALLEE_SAVE_REGS_THUNK(func, ".text")
652 
653 /* Get a reference to a callee-save function */
654 #define PV_CALLEE_SAVE(func)						\
655 	((struct paravirt_callee_save) { __raw_callee_save_##func })
656 
657 /* Promise that "func" already uses the right calling convention */
658 #define __PV_IS_CALLEE_SAVE(func)			\
659 	((struct paravirt_callee_save) { func })
660 
661 #ifdef CONFIG_PARAVIRT_XXL
662 static __always_inline unsigned long arch_local_save_flags(void)
663 {
664 	return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;",
665 				ALT_NOT_XEN);
666 }
667 
668 static __always_inline void arch_local_irq_disable(void)
669 {
670 	PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN);
671 }
672 
673 static __always_inline void arch_local_irq_enable(void)
674 {
675 	PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN);
676 }
677 
678 static __always_inline unsigned long arch_local_irq_save(void)
679 {
680 	unsigned long f;
681 
682 	f = arch_local_save_flags();
683 	arch_local_irq_disable();
684 	return f;
685 }
686 #endif
687 
688 
689 /* Make sure as little as possible of this mess escapes. */
690 #undef PARAVIRT_CALL
691 #undef __PVOP_CALL
692 #undef __PVOP_VCALL
693 #undef PVOP_VCALL0
694 #undef PVOP_CALL0
695 #undef PVOP_VCALL1
696 #undef PVOP_CALL1
697 #undef PVOP_VCALL2
698 #undef PVOP_CALL2
699 #undef PVOP_VCALL3
700 #undef PVOP_CALL3
701 #undef PVOP_VCALL4
702 #undef PVOP_CALL4
703 
704 extern void default_banner(void);
705 void native_pv_lock_init(void) __init;
706 
707 #else  /* __ASSEMBLER__ */
708 
709 #ifdef CONFIG_X86_64
710 #ifdef CONFIG_PARAVIRT_XXL
711 #ifdef CONFIG_DEBUG_ENTRY
712 
713 #define PARA_INDIRECT(addr)	*addr(%rip)
714 
715 .macro PARA_IRQ_save_fl
716 	ANNOTATE_RETPOLINE_SAFE;
717 	call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);
718 .endm
719 
720 #define SAVE_FLAGS ALTERNATIVE_2 "PARA_IRQ_save_fl;",			\
721 				 "ALT_CALL_INSTR;", ALT_CALL_ALWAYS,	\
722 				 "pushf; pop %rax;", ALT_NOT_XEN
723 #endif
724 #endif /* CONFIG_PARAVIRT_XXL */
725 #endif	/* CONFIG_X86_64 */
726 
727 #endif /* __ASSEMBLER__ */
728 #else  /* CONFIG_PARAVIRT */
729 # define default_banner x86_init_noop
730 
731 #ifndef __ASSEMBLER__
732 static inline void native_pv_lock_init(void)
733 {
734 }
735 #endif
736 #endif /* !CONFIG_PARAVIRT */
737 
738 #ifndef __ASSEMBLER__
739 #ifndef CONFIG_PARAVIRT_XXL
740 static inline void paravirt_enter_mmap(struct mm_struct *mm)
741 {
742 }
743 #endif
744 
745 #ifndef CONFIG_PARAVIRT
746 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
747 {
748 }
749 #endif
750 
751 #ifndef CONFIG_PARAVIRT_SPINLOCKS
752 static inline void paravirt_set_cap(void)
753 {
754 }
755 #endif
756 #endif /* __ASSEMBLER__ */
757 #endif /* _ASM_X86_PARAVIRT_H */
758