1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2bb898558SAl Viro /* OLPC machine specific definitions */
3bb898558SAl Viro
41965aae3SH. Peter Anvin #ifndef _ASM_X86_OLPC_H
51965aae3SH. Peter Anvin #define _ASM_X86_OLPC_H
6bb898558SAl Viro
7bb898558SAl Viro #include <asm/geode.h>
8bb898558SAl Viro
9bb898558SAl Viro struct olpc_platform_t {
10bb898558SAl Viro int flags;
11bb898558SAl Viro uint32_t boardrev;
12bb898558SAl Viro };
13bb898558SAl Viro
14bb898558SAl Viro #define OLPC_F_PRESENT 0x01
15bb898558SAl Viro #define OLPC_F_DCON 0x02
16bb898558SAl Viro
17bb898558SAl Viro #ifdef CONFIG_OLPC
18bb898558SAl Viro
19bb898558SAl Viro extern struct olpc_platform_t olpc_platform_info;
20bb898558SAl Viro
21bb898558SAl Viro /*
22bb898558SAl Viro * OLPC board IDs contain the major build number within the mask 0x0ff0,
230d2eb44fSLucas De Marchi * and the minor build number within 0x000f. Pre-builds have a minor
24bb898558SAl Viro * number less than 8, and normal builds start at 8. For example, 0x0B10
25bb898558SAl Viro * is a PreB1, and 0x0C18 is a C1.
26bb898558SAl Viro */
27bb898558SAl Viro
olpc_board(uint8_t id)28bb898558SAl Viro static inline uint32_t olpc_board(uint8_t id)
29bb898558SAl Viro {
30bb898558SAl Viro return (id << 4) | 0x8;
31bb898558SAl Viro }
32bb898558SAl Viro
olpc_board_pre(uint8_t id)33bb898558SAl Viro static inline uint32_t olpc_board_pre(uint8_t id)
34bb898558SAl Viro {
35bb898558SAl Viro return id << 4;
36bb898558SAl Viro }
37bb898558SAl Viro
machine_is_olpc(void)38bb898558SAl Viro static inline int machine_is_olpc(void)
39bb898558SAl Viro {
40bb898558SAl Viro return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0;
41bb898558SAl Viro }
42bb898558SAl Viro
43bb898558SAl Viro /*
44bb898558SAl Viro * The DCON is OLPC's Display Controller. It has a number of unique
45bb898558SAl Viro * features that we might want to take advantage of..
46bb898558SAl Viro */
olpc_has_dcon(void)47bb898558SAl Viro static inline int olpc_has_dcon(void)
48bb898558SAl Viro {
49bb898558SAl Viro return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0;
50bb898558SAl Viro }
51bb898558SAl Viro
52bb898558SAl Viro /*
53bb898558SAl Viro * The "Mass Production" version of OLPC's XO is identified as being model
54bb898558SAl Viro * C2. During the prototype phase, the following models (in chronological
55bb898558SAl Viro * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models
56bb898558SAl Viro * were based on Geode GX CPUs, and models after that were based upon
57bb898558SAl Viro * Geode LX CPUs. There were also some hand-assembled models floating
58bb898558SAl Viro * around, referred to as PreB1, PreB2, etc.
59bb898558SAl Viro */
olpc_board_at_least(uint32_t rev)60bb898558SAl Viro static inline int olpc_board_at_least(uint32_t rev)
61bb898558SAl Viro {
62bb898558SAl Viro return olpc_platform_info.boardrev >= rev;
63bb898558SAl Viro }
64bb898558SAl Viro
65bb898558SAl Viro #else
66bb898558SAl Viro
machine_is_olpc(void)67bb898558SAl Viro static inline int machine_is_olpc(void)
68bb898558SAl Viro {
69bb898558SAl Viro return 0;
70bb898558SAl Viro }
71bb898558SAl Viro
olpc_has_dcon(void)72bb898558SAl Viro static inline int olpc_has_dcon(void)
73bb898558SAl Viro {
74bb898558SAl Viro return 0;
75bb898558SAl Viro }
76bb898558SAl Viro
77bb898558SAl Viro #endif
78bb898558SAl Viro
7997c4cb71SDaniel Drake #ifdef CONFIG_OLPC_XO1_PM
8097c4cb71SDaniel Drake extern void do_olpc_suspend_lowlevel(void);
8197c4cb71SDaniel Drake extern void olpc_xo1_pm_wakeup_set(u16 value);
8297c4cb71SDaniel Drake extern void olpc_xo1_pm_wakeup_clear(u16 value);
8397c4cb71SDaniel Drake #endif
8497c4cb71SDaniel Drake
85d5d0e88cSThomas Gleixner extern int pci_olpc_init(void);
86d5d0e88cSThomas Gleixner
87bb898558SAl Viro /* GPIO assignments */
88bb898558SAl Viro
893c554946SAndres Salomon #define OLPC_GPIO_MIC_AC 1
907637c925SAndres Salomon #define OLPC_GPIO_DCON_STAT0 5
917637c925SAndres Salomon #define OLPC_GPIO_DCON_STAT1 6
927637c925SAndres Salomon #define OLPC_GPIO_DCON_IRQ 7
93bb898558SAl Viro #define OLPC_GPIO_THRM_ALRM geode_gpio(10)
947637c925SAndres Salomon #define OLPC_GPIO_DCON_LOAD 11
957637c925SAndres Salomon #define OLPC_GPIO_DCON_BLANK 12
967637c925SAndres Salomon #define OLPC_GPIO_SMB_CLK 14
977637c925SAndres Salomon #define OLPC_GPIO_SMB_DATA 15
98bb898558SAl Viro #define OLPC_GPIO_WORKAUX geode_gpio(24)
997bc74b3dSDaniel Drake #define OLPC_GPIO_LID 26
1007bc74b3dSDaniel Drake #define OLPC_GPIO_ECSCI 27
101bb898558SAl Viro
1021965aae3SH. Peter Anvin #endif /* _ASM_X86_OLPC_H */
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