1 #ifndef _ASM_X86_MSR_H 2 #define _ASM_X86_MSR_H 3 4 #include "msr-index.h" 5 6 #ifndef __ASSEMBLY__ 7 8 #include <asm/asm.h> 9 #include <asm/errno.h> 10 #include <asm/cpumask.h> 11 #include <uapi/asm/msr.h> 12 13 struct msr { 14 union { 15 struct { 16 u32 l; 17 u32 h; 18 }; 19 u64 q; 20 }; 21 }; 22 23 struct msr_info { 24 u32 msr_no; 25 struct msr reg; 26 struct msr *msrs; 27 int err; 28 }; 29 30 struct msr_regs_info { 31 u32 *regs; 32 int err; 33 }; 34 35 static inline unsigned long long native_read_tscp(unsigned int *aux) 36 { 37 unsigned long low, high; 38 asm volatile(".byte 0x0f,0x01,0xf9" 39 : "=a" (low), "=d" (high), "=c" (*aux)); 40 return low | ((u64)high << 32); 41 } 42 43 /* 44 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A" 45 * constraint has different meanings. For i386, "A" means exactly 46 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead, 47 * it means rax *or* rdx. 48 */ 49 #ifdef CONFIG_X86_64 50 #define DECLARE_ARGS(val, low, high) unsigned low, high 51 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32)) 52 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high) 53 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) 54 #else 55 #define DECLARE_ARGS(val, low, high) unsigned long long val 56 #define EAX_EDX_VAL(val, low, high) (val) 57 #define EAX_EDX_ARGS(val, low, high) "A" (val) 58 #define EAX_EDX_RET(val, low, high) "=A" (val) 59 #endif 60 61 static inline unsigned long long native_read_msr(unsigned int msr) 62 { 63 DECLARE_ARGS(val, low, high); 64 65 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr)); 66 return EAX_EDX_VAL(val, low, high); 67 } 68 69 static inline unsigned long long native_read_msr_safe(unsigned int msr, 70 int *err) 71 { 72 DECLARE_ARGS(val, low, high); 73 74 asm volatile("2: rdmsr ; xor %[err],%[err]\n" 75 "1:\n\t" 76 ".section .fixup,\"ax\"\n\t" 77 "3: mov %[fault],%[err] ; jmp 1b\n\t" 78 ".previous\n\t" 79 _ASM_EXTABLE(2b, 3b) 80 : [err] "=r" (*err), EAX_EDX_RET(val, low, high) 81 : "c" (msr), [fault] "i" (-EIO)); 82 return EAX_EDX_VAL(val, low, high); 83 } 84 85 static inline void native_write_msr(unsigned int msr, 86 unsigned low, unsigned high) 87 { 88 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory"); 89 } 90 91 /* Can be uninlined because referenced by paravirt */ 92 notrace static inline int native_write_msr_safe(unsigned int msr, 93 unsigned low, unsigned high) 94 { 95 int err; 96 asm volatile("2: wrmsr ; xor %[err],%[err]\n" 97 "1:\n\t" 98 ".section .fixup,\"ax\"\n\t" 99 "3: mov %[fault],%[err] ; jmp 1b\n\t" 100 ".previous\n\t" 101 _ASM_EXTABLE(2b, 3b) 102 : [err] "=a" (err) 103 : "c" (msr), "0" (low), "d" (high), 104 [fault] "i" (-EIO) 105 : "memory"); 106 return err; 107 } 108 109 extern unsigned long long native_read_tsc(void); 110 111 extern int rdmsr_safe_regs(u32 regs[8]); 112 extern int wrmsr_safe_regs(u32 regs[8]); 113 114 static __always_inline unsigned long long __native_read_tsc(void) 115 { 116 DECLARE_ARGS(val, low, high); 117 118 asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); 119 120 return EAX_EDX_VAL(val, low, high); 121 } 122 123 static inline unsigned long long native_read_pmc(int counter) 124 { 125 DECLARE_ARGS(val, low, high); 126 127 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter)); 128 return EAX_EDX_VAL(val, low, high); 129 } 130 131 #ifdef CONFIG_PARAVIRT 132 #include <asm/paravirt.h> 133 #else 134 #include <linux/errno.h> 135 /* 136 * Access to machine-specific registers (available on 586 and better only) 137 * Note: the rd* operations modify the parameters directly (without using 138 * pointer indirection), this allows gcc to optimize better 139 */ 140 141 #define rdmsr(msr, low, high) \ 142 do { \ 143 u64 __val = native_read_msr((msr)); \ 144 (void)((low) = (u32)__val); \ 145 (void)((high) = (u32)(__val >> 32)); \ 146 } while (0) 147 148 static inline void wrmsr(unsigned msr, unsigned low, unsigned high) 149 { 150 native_write_msr(msr, low, high); 151 } 152 153 #define rdmsrl(msr, val) \ 154 ((val) = native_read_msr((msr))) 155 156 #define wrmsrl(msr, val) \ 157 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32)) 158 159 /* wrmsr with exception handling */ 160 static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high) 161 { 162 return native_write_msr_safe(msr, low, high); 163 } 164 165 /* rdmsr with exception handling */ 166 #define rdmsr_safe(msr, low, high) \ 167 ({ \ 168 int __err; \ 169 u64 __val = native_read_msr_safe((msr), &__err); \ 170 (*low) = (u32)__val; \ 171 (*high) = (u32)(__val >> 32); \ 172 __err; \ 173 }) 174 175 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p) 176 { 177 int err; 178 179 *p = native_read_msr_safe(msr, &err); 180 return err; 181 } 182 183 #define rdtscl(low) \ 184 ((low) = (u32)__native_read_tsc()) 185 186 #define rdtscll(val) \ 187 ((val) = __native_read_tsc()) 188 189 #define rdpmc(counter, low, high) \ 190 do { \ 191 u64 _l = native_read_pmc((counter)); \ 192 (low) = (u32)_l; \ 193 (high) = (u32)(_l >> 32); \ 194 } while (0) 195 196 #define rdpmcl(counter, val) ((val) = native_read_pmc(counter)) 197 198 #define rdtscp(low, high, aux) \ 199 do { \ 200 unsigned long long _val = native_read_tscp(&(aux)); \ 201 (low) = (u32)_val; \ 202 (high) = (u32)(_val >> 32); \ 203 } while (0) 204 205 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux)) 206 207 #endif /* !CONFIG_PARAVIRT */ 208 209 /* 210 * 64-bit version of wrmsr_safe(): 211 */ 212 static inline int wrmsrl_safe(u32 msr, u64 val) 213 { 214 return wrmsr_safe(msr, (u32)val, (u32)(val >> 32)); 215 } 216 217 #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high)) 218 219 #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0) 220 221 struct msr *msrs_alloc(void); 222 void msrs_free(struct msr *msrs); 223 int msr_set_bit(u32 msr, u8 bit); 224 int msr_clear_bit(u32 msr, u8 bit); 225 226 #ifdef CONFIG_SMP 227 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); 228 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); 229 int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q); 230 int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q); 231 void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); 232 void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); 233 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); 234 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); 235 int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q); 236 int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q); 237 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]); 238 int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]); 239 #else /* CONFIG_SMP */ 240 static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) 241 { 242 rdmsr(msr_no, *l, *h); 243 return 0; 244 } 245 static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 246 { 247 wrmsr(msr_no, l, h); 248 return 0; 249 } 250 static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q) 251 { 252 rdmsrl(msr_no, *q); 253 return 0; 254 } 255 static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q) 256 { 257 wrmsrl(msr_no, q); 258 return 0; 259 } 260 static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no, 261 struct msr *msrs) 262 { 263 rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h)); 264 } 265 static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no, 266 struct msr *msrs) 267 { 268 wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h); 269 } 270 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, 271 u32 *l, u32 *h) 272 { 273 return rdmsr_safe(msr_no, l, h); 274 } 275 static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 276 { 277 return wrmsr_safe(msr_no, l, h); 278 } 279 static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q) 280 { 281 return rdmsrl_safe(msr_no, q); 282 } 283 static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q) 284 { 285 return wrmsrl_safe(msr_no, q); 286 } 287 static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]) 288 { 289 return rdmsr_safe_regs(regs); 290 } 291 static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]) 292 { 293 return wrmsr_safe_regs(regs); 294 } 295 #endif /* CONFIG_SMP */ 296 #endif /* __ASSEMBLY__ */ 297 #endif /* _ASM_X86_MSR_H */ 298