xref: /linux/arch/x86/include/asm/mshyperv.h (revision 25489a4f556414445d342951615178368ee45cde)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MSHYPER_H
3 #define _ASM_X86_MSHYPER_H
4 
5 #include <linux/types.h>
6 #include <linux/nmi.h>
7 #include <linux/msi.h>
8 #include <linux/io.h>
9 #include <asm/nospec-branch.h>
10 #include <asm/paravirt.h>
11 #include <asm/msr.h>
12 #include <hyperv/hvhdk.h>
13 
14 /*
15  * Hyper-V always provides a single IO-APIC at this MMIO address.
16  * Ideally, the value should be looked up in ACPI tables, but it
17  * is needed for mapping the IO-APIC early in boot on Confidential
18  * VMs, before ACPI functions can be used.
19  */
20 #define HV_IOAPIC_BASE_ADDRESS 0xfec00000
21 
22 #define HV_VTL_NORMAL 0x0
23 #define HV_VTL_SECURE 0x1
24 #define HV_VTL_MGMT   0x2
25 
26 union hv_ghcb;
27 
28 DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
29 DECLARE_STATIC_KEY_FALSE(isolation_type_tdx);
30 
31 typedef int (*hyperv_fill_flush_list_func)(
32 		struct hv_guest_mapping_flush_list *flush,
33 		void *data);
34 
35 void hyperv_vector_handler(struct pt_regs *regs);
36 
37 static inline unsigned char hv_get_nmi_reason(void)
38 {
39 	return 0;
40 }
41 
42 #if IS_ENABLED(CONFIG_HYPERV)
43 extern bool hyperv_paravisor_present;
44 
45 extern void *hv_hypercall_pg;
46 
47 extern union hv_ghcb * __percpu *hv_ghcb_pg;
48 
49 bool hv_isolation_type_snp(void);
50 bool hv_isolation_type_tdx(void);
51 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
52 
53 /*
54  * DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA
55  * to start AP in enlightened SEV guest.
56  */
57 #define HV_AP_INIT_GPAT_DEFAULT		0x0007040600070406ULL
58 #define HV_AP_SEGMENT_LIMIT		0xffffffff
59 
60 /*
61  * If the hypercall involves no input or output parameters, the hypervisor
62  * ignores the corresponding GPA pointer.
63  */
64 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
65 {
66 	u64 input_address = input ? virt_to_phys(input) : 0;
67 	u64 output_address = output ? virt_to_phys(output) : 0;
68 	u64 hv_status;
69 
70 #ifdef CONFIG_X86_64
71 	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
72 		return hv_tdx_hypercall(control, input_address, output_address);
73 
74 	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
75 		__asm__ __volatile__("mov %[output_address], %%r8\n"
76 				     "vmmcall"
77 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
78 				       "+c" (control), "+d" (input_address)
79 				     : [output_address] "r" (output_address)
80 				     : "cc", "memory", "r8", "r9", "r10", "r11");
81 		return hv_status;
82 	}
83 
84 	if (!hv_hypercall_pg)
85 		return U64_MAX;
86 
87 	__asm__ __volatile__("mov %[output_address], %%r8\n"
88 			     CALL_NOSPEC
89 			     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
90 			       "+c" (control), "+d" (input_address)
91 			     : [output_address] "r" (output_address),
92 			       THUNK_TARGET(hv_hypercall_pg)
93 			     : "cc", "memory", "r8", "r9", "r10", "r11");
94 #else
95 	u32 input_address_hi = upper_32_bits(input_address);
96 	u32 input_address_lo = lower_32_bits(input_address);
97 	u32 output_address_hi = upper_32_bits(output_address);
98 	u32 output_address_lo = lower_32_bits(output_address);
99 
100 	if (!hv_hypercall_pg)
101 		return U64_MAX;
102 
103 	__asm__ __volatile__(CALL_NOSPEC
104 			     : "=A" (hv_status),
105 			       "+c" (input_address_lo), ASM_CALL_CONSTRAINT
106 			     : "A" (control),
107 			       "b" (input_address_hi),
108 			       "D"(output_address_hi), "S"(output_address_lo),
109 			       THUNK_TARGET(hv_hypercall_pg)
110 			     : "cc", "memory");
111 #endif /* !x86_64 */
112 	return hv_status;
113 }
114 
115 /* Hypercall to the L0 hypervisor */
116 static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
117 {
118 	return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
119 }
120 
121 /* Fast hypercall with 8 bytes of input and no output */
122 static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
123 {
124 	u64 hv_status;
125 
126 #ifdef CONFIG_X86_64
127 	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
128 		return hv_tdx_hypercall(control, input1, 0);
129 
130 	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
131 		__asm__ __volatile__(
132 				"vmmcall"
133 				: "=a" (hv_status), ASM_CALL_CONSTRAINT,
134 				"+c" (control), "+d" (input1)
135 				:: "cc", "r8", "r9", "r10", "r11");
136 	} else {
137 		__asm__ __volatile__(CALL_NOSPEC
138 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
139 				       "+c" (control), "+d" (input1)
140 				     : THUNK_TARGET(hv_hypercall_pg)
141 				     : "cc", "r8", "r9", "r10", "r11");
142 	}
143 #else
144 	{
145 		u32 input1_hi = upper_32_bits(input1);
146 		u32 input1_lo = lower_32_bits(input1);
147 
148 		__asm__ __volatile__ (CALL_NOSPEC
149 				      : "=A"(hv_status),
150 					"+c"(input1_lo),
151 					ASM_CALL_CONSTRAINT
152 				      :	"A" (control),
153 					"b" (input1_hi),
154 					THUNK_TARGET(hv_hypercall_pg)
155 				      : "cc", "edi", "esi");
156 	}
157 #endif
158 	return hv_status;
159 }
160 
161 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
162 {
163 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
164 
165 	return _hv_do_fast_hypercall8(control, input1);
166 }
167 
168 static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
169 {
170 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
171 
172 	return _hv_do_fast_hypercall8(control, input1);
173 }
174 
175 /* Fast hypercall with 16 bytes of input */
176 static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
177 {
178 	u64 hv_status;
179 
180 #ifdef CONFIG_X86_64
181 	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
182 		return hv_tdx_hypercall(control, input1, input2);
183 
184 	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
185 		__asm__ __volatile__("mov %[input2], %%r8\n"
186 				     "vmmcall"
187 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
188 				       "+c" (control), "+d" (input1)
189 				     : [input2] "r" (input2)
190 				     : "cc", "r8", "r9", "r10", "r11");
191 	} else {
192 		__asm__ __volatile__("mov %[input2], %%r8\n"
193 				     CALL_NOSPEC
194 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
195 				       "+c" (control), "+d" (input1)
196 				     : [input2] "r" (input2),
197 				       THUNK_TARGET(hv_hypercall_pg)
198 				     : "cc", "r8", "r9", "r10", "r11");
199 	}
200 #else
201 	{
202 		u32 input1_hi = upper_32_bits(input1);
203 		u32 input1_lo = lower_32_bits(input1);
204 		u32 input2_hi = upper_32_bits(input2);
205 		u32 input2_lo = lower_32_bits(input2);
206 
207 		__asm__ __volatile__ (CALL_NOSPEC
208 				      : "=A"(hv_status),
209 					"+c"(input1_lo), ASM_CALL_CONSTRAINT
210 				      :	"A" (control), "b" (input1_hi),
211 					"D"(input2_hi), "S"(input2_lo),
212 					THUNK_TARGET(hv_hypercall_pg)
213 				      : "cc");
214 	}
215 #endif
216 	return hv_status;
217 }
218 
219 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
220 {
221 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
222 
223 	return _hv_do_fast_hypercall16(control, input1, input2);
224 }
225 
226 static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
227 {
228 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
229 
230 	return _hv_do_fast_hypercall16(control, input1, input2);
231 }
232 
233 extern struct hv_vp_assist_page **hv_vp_assist_page;
234 
235 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
236 {
237 	if (!hv_vp_assist_page)
238 		return NULL;
239 
240 	return hv_vp_assist_page[cpu];
241 }
242 
243 void __init hyperv_init(void);
244 void hyperv_setup_mmu_ops(void);
245 void set_hv_tscchange_cb(void (*cb)(void));
246 void clear_hv_tscchange_cb(void);
247 void hyperv_stop_tsc_emulation(void);
248 int hyperv_flush_guest_mapping(u64 as);
249 int hyperv_flush_guest_mapping_range(u64 as,
250 		hyperv_fill_flush_list_func fill_func, void *data);
251 int hyperv_fill_flush_guest_mapping_list(
252 		struct hv_guest_mapping_flush_list *flush,
253 		u64 start_gfn, u64 end_gfn);
254 
255 #ifdef CONFIG_X86_64
256 void hv_apic_init(void);
257 void __init hv_init_spinlocks(void);
258 bool hv_vcpu_is_preempted(int vcpu);
259 #else
260 static inline void hv_apic_init(void) {}
261 #endif
262 
263 struct irq_domain *hv_create_pci_msi_domain(void);
264 
265 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
266 		struct hv_interrupt_entry *entry);
267 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
268 
269 #ifdef CONFIG_AMD_MEM_ENCRYPT
270 bool hv_ghcb_negotiate_protocol(void);
271 void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
272 int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu);
273 #else
274 static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
275 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
276 static inline int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip,
277 		unsigned int cpu) { return 0; }
278 #endif
279 
280 #if defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST)
281 void hv_vtom_init(void);
282 void hv_ivm_msr_write(u64 msr, u64 value);
283 void hv_ivm_msr_read(u64 msr, u64 *value);
284 #else
285 static inline void hv_vtom_init(void) {}
286 static inline void hv_ivm_msr_write(u64 msr, u64 value) {}
287 static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}
288 #endif
289 
290 static inline bool hv_is_synic_msr(unsigned int reg)
291 {
292 	return (reg >= HV_X64_MSR_SCONTROL) &&
293 	       (reg <= HV_X64_MSR_SINT15);
294 }
295 
296 static inline bool hv_is_sint_msr(unsigned int reg)
297 {
298 	return (reg >= HV_X64_MSR_SINT0) &&
299 	       (reg <= HV_X64_MSR_SINT15);
300 }
301 
302 u64 hv_get_msr(unsigned int reg);
303 void hv_set_msr(unsigned int reg, u64 value);
304 u64 hv_get_non_nested_msr(unsigned int reg);
305 void hv_set_non_nested_msr(unsigned int reg, u64 value);
306 
307 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
308 {
309 	return native_rdmsrq(reg);
310 }
311 int hv_apicid_to_vp_index(u32 apic_id);
312 
313 #else /* CONFIG_HYPERV */
314 static inline void hyperv_init(void) {}
315 static inline void hyperv_setup_mmu_ops(void) {}
316 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
317 static inline void clear_hv_tscchange_cb(void) {}
318 static inline void hyperv_stop_tsc_emulation(void) {};
319 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
320 {
321 	return NULL;
322 }
323 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
324 static inline int hyperv_flush_guest_mapping_range(u64 as,
325 		hyperv_fill_flush_list_func fill_func, void *data)
326 {
327 	return -1;
328 }
329 static inline void hv_set_msr(unsigned int reg, u64 value) { }
330 static inline u64 hv_get_msr(unsigned int reg) { return 0; }
331 static inline void hv_set_non_nested_msr(unsigned int reg, u64 value) { }
332 static inline u64 hv_get_non_nested_msr(unsigned int reg) { return 0; }
333 static inline int hv_apicid_to_vp_index(u32 apic_id) { return -EINVAL; }
334 #endif /* CONFIG_HYPERV */
335 
336 
337 #ifdef CONFIG_HYPERV_VTL_MODE
338 void __init hv_vtl_init_platform(void);
339 int __init hv_vtl_early_init(void);
340 #else
341 static inline void __init hv_vtl_init_platform(void) {}
342 static inline int __init hv_vtl_early_init(void) { return 0; }
343 #endif
344 
345 #include <asm-generic/mshyperv.h>
346 
347 #endif
348