xref: /linux/arch/x86/include/asm/mshyperv.h (revision 0a7a00580a4fad9a6cd28c2d825e0e5ae917e59e)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MSHYPER_H
3 #define _ASM_X86_MSHYPER_H
4 
5 #include <linux/types.h>
6 #include <linux/nmi.h>
7 #include <linux/msi.h>
8 #include <asm/io.h>
9 #include <asm/hyperv-tlfs.h>
10 #include <asm/nospec-branch.h>
11 #include <asm/paravirt.h>
12 #include <asm/mshyperv.h>
13 
14 /*
15  * Hyper-V always provides a single IO-APIC at this MMIO address.
16  * Ideally, the value should be looked up in ACPI tables, but it
17  * is needed for mapping the IO-APIC early in boot on Confidential
18  * VMs, before ACPI functions can be used.
19  */
20 #define HV_IOAPIC_BASE_ADDRESS 0xfec00000
21 
22 union hv_ghcb;
23 
24 DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
25 
26 typedef int (*hyperv_fill_flush_list_func)(
27 		struct hv_guest_mapping_flush_list *flush,
28 		void *data);
29 
30 void hyperv_vector_handler(struct pt_regs *regs);
31 
32 static inline unsigned char hv_get_nmi_reason(void)
33 {
34 	return 0;
35 }
36 
37 #if IS_ENABLED(CONFIG_HYPERV)
38 extern int hyperv_init_cpuhp;
39 
40 extern void *hv_hypercall_pg;
41 
42 extern u64 hv_current_partition_id;
43 
44 extern union hv_ghcb * __percpu *hv_ghcb_pg;
45 
46 int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
47 int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
48 int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
49 
50 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
51 {
52 	u64 input_address = input ? virt_to_phys(input) : 0;
53 	u64 output_address = output ? virt_to_phys(output) : 0;
54 	u64 hv_status;
55 
56 #ifdef CONFIG_X86_64
57 	if (!hv_hypercall_pg)
58 		return U64_MAX;
59 
60 	__asm__ __volatile__("mov %4, %%r8\n"
61 			     CALL_NOSPEC
62 			     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
63 			       "+c" (control), "+d" (input_address)
64 			     :  "r" (output_address),
65 				THUNK_TARGET(hv_hypercall_pg)
66 			     : "cc", "memory", "r8", "r9", "r10", "r11");
67 #else
68 	u32 input_address_hi = upper_32_bits(input_address);
69 	u32 input_address_lo = lower_32_bits(input_address);
70 	u32 output_address_hi = upper_32_bits(output_address);
71 	u32 output_address_lo = lower_32_bits(output_address);
72 
73 	if (!hv_hypercall_pg)
74 		return U64_MAX;
75 
76 	__asm__ __volatile__(CALL_NOSPEC
77 			     : "=A" (hv_status),
78 			       "+c" (input_address_lo), ASM_CALL_CONSTRAINT
79 			     : "A" (control),
80 			       "b" (input_address_hi),
81 			       "D"(output_address_hi), "S"(output_address_lo),
82 			       THUNK_TARGET(hv_hypercall_pg)
83 			     : "cc", "memory");
84 #endif /* !x86_64 */
85 	return hv_status;
86 }
87 
88 /* Hypercall to the L0 hypervisor */
89 static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
90 {
91 	return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
92 }
93 
94 /* Fast hypercall with 8 bytes of input and no output */
95 static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
96 {
97 	u64 hv_status;
98 
99 #ifdef CONFIG_X86_64
100 	{
101 		__asm__ __volatile__(CALL_NOSPEC
102 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
103 				       "+c" (control), "+d" (input1)
104 				     : THUNK_TARGET(hv_hypercall_pg)
105 				     : "cc", "r8", "r9", "r10", "r11");
106 	}
107 #else
108 	{
109 		u32 input1_hi = upper_32_bits(input1);
110 		u32 input1_lo = lower_32_bits(input1);
111 
112 		__asm__ __volatile__ (CALL_NOSPEC
113 				      : "=A"(hv_status),
114 					"+c"(input1_lo),
115 					ASM_CALL_CONSTRAINT
116 				      :	"A" (control),
117 					"b" (input1_hi),
118 					THUNK_TARGET(hv_hypercall_pg)
119 				      : "cc", "edi", "esi");
120 	}
121 #endif
122 		return hv_status;
123 }
124 
125 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
126 {
127 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
128 
129 	return _hv_do_fast_hypercall8(control, input1);
130 }
131 
132 static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
133 {
134 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
135 
136 	return _hv_do_fast_hypercall8(control, input1);
137 }
138 
139 /* Fast hypercall with 16 bytes of input */
140 static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
141 {
142 	u64 hv_status;
143 
144 #ifdef CONFIG_X86_64
145 	{
146 		__asm__ __volatile__("mov %4, %%r8\n"
147 				     CALL_NOSPEC
148 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
149 				       "+c" (control), "+d" (input1)
150 				     : "r" (input2),
151 				       THUNK_TARGET(hv_hypercall_pg)
152 				     : "cc", "r8", "r9", "r10", "r11");
153 	}
154 #else
155 	{
156 		u32 input1_hi = upper_32_bits(input1);
157 		u32 input1_lo = lower_32_bits(input1);
158 		u32 input2_hi = upper_32_bits(input2);
159 		u32 input2_lo = lower_32_bits(input2);
160 
161 		__asm__ __volatile__ (CALL_NOSPEC
162 				      : "=A"(hv_status),
163 					"+c"(input1_lo), ASM_CALL_CONSTRAINT
164 				      :	"A" (control), "b" (input1_hi),
165 					"D"(input2_hi), "S"(input2_lo),
166 					THUNK_TARGET(hv_hypercall_pg)
167 				      : "cc");
168 	}
169 #endif
170 	return hv_status;
171 }
172 
173 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
174 {
175 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
176 
177 	return _hv_do_fast_hypercall16(control, input1, input2);
178 }
179 
180 static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
181 {
182 	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
183 
184 	return _hv_do_fast_hypercall16(control, input1, input2);
185 }
186 
187 extern struct hv_vp_assist_page **hv_vp_assist_page;
188 
189 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
190 {
191 	if (!hv_vp_assist_page)
192 		return NULL;
193 
194 	return hv_vp_assist_page[cpu];
195 }
196 
197 void __init hyperv_init(void);
198 void hyperv_setup_mmu_ops(void);
199 void set_hv_tscchange_cb(void (*cb)(void));
200 void clear_hv_tscchange_cb(void);
201 void hyperv_stop_tsc_emulation(void);
202 int hyperv_flush_guest_mapping(u64 as);
203 int hyperv_flush_guest_mapping_range(u64 as,
204 		hyperv_fill_flush_list_func fill_func, void *data);
205 int hyperv_fill_flush_guest_mapping_list(
206 		struct hv_guest_mapping_flush_list *flush,
207 		u64 start_gfn, u64 end_gfn);
208 
209 #ifdef CONFIG_X86_64
210 void hv_apic_init(void);
211 void __init hv_init_spinlocks(void);
212 bool hv_vcpu_is_preempted(int vcpu);
213 #else
214 static inline void hv_apic_init(void) {}
215 #endif
216 
217 struct irq_domain *hv_create_pci_msi_domain(void);
218 
219 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
220 		struct hv_interrupt_entry *entry);
221 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
222 
223 #ifdef CONFIG_AMD_MEM_ENCRYPT
224 void hv_ghcb_msr_write(u64 msr, u64 value);
225 void hv_ghcb_msr_read(u64 msr, u64 *value);
226 bool hv_ghcb_negotiate_protocol(void);
227 void hv_ghcb_terminate(unsigned int set, unsigned int reason);
228 void hv_vtom_init(void);
229 #else
230 static inline void hv_ghcb_msr_write(u64 msr, u64 value) {}
231 static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {}
232 static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
233 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
234 static inline void hv_vtom_init(void) {}
235 #endif
236 
237 extern bool hv_isolation_type_snp(void);
238 
239 static inline bool hv_is_synic_reg(unsigned int reg)
240 {
241 	return (reg >= HV_REGISTER_SCONTROL) &&
242 	       (reg <= HV_REGISTER_SINT15);
243 }
244 
245 static inline bool hv_is_sint_reg(unsigned int reg)
246 {
247 	return (reg >= HV_REGISTER_SINT0) &&
248 	       (reg <= HV_REGISTER_SINT15);
249 }
250 
251 u64 hv_get_register(unsigned int reg);
252 void hv_set_register(unsigned int reg, u64 value);
253 u64 hv_get_non_nested_register(unsigned int reg);
254 void hv_set_non_nested_register(unsigned int reg, u64 value);
255 
256 #else /* CONFIG_HYPERV */
257 static inline void hyperv_init(void) {}
258 static inline void hyperv_setup_mmu_ops(void) {}
259 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
260 static inline void clear_hv_tscchange_cb(void) {}
261 static inline void hyperv_stop_tsc_emulation(void) {};
262 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
263 {
264 	return NULL;
265 }
266 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
267 static inline int hyperv_flush_guest_mapping_range(u64 as,
268 		hyperv_fill_flush_list_func fill_func, void *data)
269 {
270 	return -1;
271 }
272 static inline void hv_set_register(unsigned int reg, u64 value) { }
273 static inline u64 hv_get_register(unsigned int reg) { return 0; }
274 static inline void hv_set_non_nested_register(unsigned int reg, u64 value) { }
275 static inline u64 hv_get_non_nested_register(unsigned int reg) { return 0; }
276 #endif /* CONFIG_HYPERV */
277 
278 
279 #include <asm-generic/mshyperv.h>
280 
281 #endif
282