1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_MPSPEC_H 3 #define _ASM_X86_MPSPEC_H 4 5 6 #include <asm/mpspec_def.h> 7 #include <asm/x86_init.h> 8 #include <asm/apicdef.h> 9 10 extern int pic_mode; 11 12 #ifdef CONFIG_X86_32 13 14 /* 15 * Summit or generic (i.e. installer) kernels need lots of bus entries. 16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. 17 */ 18 #if CONFIG_BASE_SMALL == 0 19 # define MAX_MP_BUSSES 260 20 #else 21 # define MAX_MP_BUSSES 32 22 #endif 23 24 #define MAX_IRQ_SOURCES 256 25 26 #else /* CONFIG_X86_64: */ 27 28 #define MAX_MP_BUSSES 256 29 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 30 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 31 32 #endif /* CONFIG_X86_64 */ 33 34 #ifdef CONFIG_EISA 35 extern int mp_bus_id_to_type[MAX_MP_BUSSES]; 36 #endif 37 38 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); 39 40 extern u32 boot_cpu_physical_apicid; 41 extern u8 boot_cpu_apic_version; 42 43 #ifdef CONFIG_X86_LOCAL_APIC 44 extern int smp_found_config; 45 #else 46 # define smp_found_config 0 47 #endif 48 49 static inline void get_smp_config(void) 50 { 51 x86_init.mpparse.get_smp_config(0); 52 } 53 54 static inline void early_get_smp_config(void) 55 { 56 x86_init.mpparse.get_smp_config(1); 57 } 58 59 #ifdef CONFIG_X86_MPPARSE 60 extern void e820__memblock_alloc_reserved_mpc_new(void); 61 extern int enable_update_mptable; 62 extern void mpparse_find_mptable(void); 63 extern void default_get_smp_config(unsigned int early); 64 #else 65 static inline void e820__memblock_alloc_reserved_mpc_new(void) { } 66 #define enable_update_mptable 0 67 #define mpparse_find_mptable x86_init_noop 68 #define default_get_smp_config x86_init_uint_noop 69 #endif 70 71 int generic_processor_info(int apicid); 72 73 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) 74 75 struct physid_mask { 76 unsigned long mask[PHYSID_ARRAY_SIZE]; 77 }; 78 79 typedef struct physid_mask physid_mask_t; 80 81 #define physid_set(physid, map) set_bit(physid, (map).mask) 82 #define physid_isset(physid, map) test_bit(physid, (map).mask) 83 84 #define physids_clear(map) \ 85 bitmap_zero((map).mask, MAX_LOCAL_APIC) 86 87 #define physids_empty(map) \ 88 bitmap_empty((map).mask, MAX_LOCAL_APIC) 89 90 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) 91 { 92 physids_clear(*map); 93 physid_set(physid, *map); 94 } 95 96 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } 97 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } 98 99 extern physid_mask_t phys_cpu_present_map; 100 101 #endif /* _ASM_X86_MPSPEC_H */ 102