1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2bb898558SAl Viro /*
3bb898558SAl Viro * Machine dependent access functions for RTC registers.
4bb898558SAl Viro */
51965aae3SH. Peter Anvin #ifndef _ASM_X86_MC146818RTC_H
61965aae3SH. Peter Anvin #define _ASM_X86_MC146818RTC_H
7bb898558SAl Viro
8bb898558SAl Viro #include <asm/io.h>
9bb898558SAl Viro #include <asm/processor.h>
10bb898558SAl Viro
11bb898558SAl Viro #ifndef RTC_PORT
12bb898558SAl Viro #define RTC_PORT(x) (0x70 + (x))
13bb898558SAl Viro #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
14bb898558SAl Viro #endif
15bb898558SAl Viro
16b08ee5f7SBorislav Petkov #if defined(CONFIG_X86_32)
17bb898558SAl Viro /*
18bb898558SAl Viro * This lock provides nmi access to the CMOS/RTC registers. It has some
19bb898558SAl Viro * special properties. It is owned by a CPU and stores the index register
20bb898558SAl Viro * currently being accessed (if owned). The idea here is that it works
21bb898558SAl Viro * like a normal lock (normally). However, in an NMI, the NMI code will
22bb898558SAl Viro * first check to see if its CPU owns the lock, meaning that the NMI
23bb898558SAl Viro * interrupted during the read/write of the device. If it does, it goes ahead
24bb898558SAl Viro * and performs the access and then restores the index register. If it does
25bb898558SAl Viro * not, it locks normally.
26bb898558SAl Viro *
27bb898558SAl Viro * Note that since we are working with NMIs, we need this lock even in
28bb898558SAl Viro * a non-SMP machine just to mark that the lock is owned.
29bb898558SAl Viro *
30bb898558SAl Viro * This only works with compare-and-swap. There is no other way to
31bb898558SAl Viro * atomically claim the lock and set the owner.
32bb898558SAl Viro */
33bb898558SAl Viro #include <linux/smp.h>
34bb898558SAl Viro extern volatile unsigned long cmos_lock;
35bb898558SAl Viro
36bb898558SAl Viro /*
37bb898558SAl Viro * All of these below must be called with interrupts off, preempt
38bb898558SAl Viro * disabled, etc.
39bb898558SAl Viro */
40bb898558SAl Viro
lock_cmos(unsigned char reg)41bb898558SAl Viro static inline void lock_cmos(unsigned char reg)
42bb898558SAl Viro {
43bb898558SAl Viro unsigned long new;
44bb898558SAl Viro new = ((smp_processor_id() + 1) << 8) | reg;
45bb898558SAl Viro for (;;) {
46bb898558SAl Viro if (cmos_lock) {
47bb898558SAl Viro cpu_relax();
48bb898558SAl Viro continue;
49bb898558SAl Viro }
50bb898558SAl Viro if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
51bb898558SAl Viro return;
52bb898558SAl Viro }
53bb898558SAl Viro }
54bb898558SAl Viro
unlock_cmos(void)55bb898558SAl Viro static inline void unlock_cmos(void)
56bb898558SAl Viro {
57bb898558SAl Viro cmos_lock = 0;
58bb898558SAl Viro }
59bb898558SAl Viro
do_i_have_lock_cmos(void)60bb898558SAl Viro static inline int do_i_have_lock_cmos(void)
61bb898558SAl Viro {
62bb898558SAl Viro return (cmos_lock >> 8) == (smp_processor_id() + 1);
63bb898558SAl Viro }
64bb898558SAl Viro
current_lock_cmos_reg(void)65bb898558SAl Viro static inline unsigned char current_lock_cmos_reg(void)
66bb898558SAl Viro {
67bb898558SAl Viro return cmos_lock & 0xff;
68bb898558SAl Viro }
69bb898558SAl Viro
70bb898558SAl Viro #define lock_cmos_prefix(reg) \
71bb898558SAl Viro do { \
72bb898558SAl Viro unsigned long cmos_flags; \
73bb898558SAl Viro local_irq_save(cmos_flags); \
74bb898558SAl Viro lock_cmos(reg)
75bb898558SAl Viro
76bb898558SAl Viro #define lock_cmos_suffix(reg) \
77bb898558SAl Viro unlock_cmos(); \
78bb898558SAl Viro local_irq_restore(cmos_flags); \
79bb898558SAl Viro } while (0)
80bb898558SAl Viro #else
81bb898558SAl Viro #define lock_cmos_prefix(reg) do {} while (0)
82bb898558SAl Viro #define lock_cmos_suffix(reg) do {} while (0)
831affc46cSJesper Juhl #define lock_cmos(reg) do { } while (0)
841affc46cSJesper Juhl #define unlock_cmos() do { } while (0)
85bb898558SAl Viro #define do_i_have_lock_cmos() 0
86bb898558SAl Viro #define current_lock_cmos_reg() 0
87bb898558SAl Viro #endif
88bb898558SAl Viro
89bb898558SAl Viro /*
90bb898558SAl Viro * The yet supported machines all access the RTC index register via
91bb898558SAl Viro * an ISA port access but the way to access the date register differs ...
92bb898558SAl Viro */
93bb898558SAl Viro #define CMOS_READ(addr) rtc_cmos_read(addr)
94bb898558SAl Viro #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
95bb898558SAl Viro unsigned char rtc_cmos_read(unsigned char addr);
96bb898558SAl Viro void rtc_cmos_write(unsigned char val, unsigned char addr);
97bb898558SAl Viro
98*e1a6bc7cSMateusz Jończyk extern int mach_set_cmos_time(const struct timespec64 *now);
99e27c4929SArnd Bergmann extern void mach_get_cmos_time(struct timespec64 *now);
100bb898558SAl Viro
101bb898558SAl Viro #define RTC_IRQ 8
102bb898558SAl Viro
1031965aae3SH. Peter Anvin #endif /* _ASM_X86_MC146818RTC_H */
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