1*95c7b77dSSean Christopherson /* SPDX-License-Identifier: GPL-2.0 */ 2*95c7b77dSSean Christopherson #ifndef _ASM_X86_KVM_VCPU_REGS_H 3*95c7b77dSSean Christopherson #define _ASM_X86_KVM_VCPU_REGS_H 4*95c7b77dSSean Christopherson 5*95c7b77dSSean Christopherson #define __VCPU_REGS_RAX 0 6*95c7b77dSSean Christopherson #define __VCPU_REGS_RCX 1 7*95c7b77dSSean Christopherson #define __VCPU_REGS_RDX 2 8*95c7b77dSSean Christopherson #define __VCPU_REGS_RBX 3 9*95c7b77dSSean Christopherson #define __VCPU_REGS_RSP 4 10*95c7b77dSSean Christopherson #define __VCPU_REGS_RBP 5 11*95c7b77dSSean Christopherson #define __VCPU_REGS_RSI 6 12*95c7b77dSSean Christopherson #define __VCPU_REGS_RDI 7 13*95c7b77dSSean Christopherson 14*95c7b77dSSean Christopherson #ifdef CONFIG_X86_64 15*95c7b77dSSean Christopherson #define __VCPU_REGS_R8 8 16*95c7b77dSSean Christopherson #define __VCPU_REGS_R9 9 17*95c7b77dSSean Christopherson #define __VCPU_REGS_R10 10 18*95c7b77dSSean Christopherson #define __VCPU_REGS_R11 11 19*95c7b77dSSean Christopherson #define __VCPU_REGS_R12 12 20*95c7b77dSSean Christopherson #define __VCPU_REGS_R13 13 21*95c7b77dSSean Christopherson #define __VCPU_REGS_R14 14 22*95c7b77dSSean Christopherson #define __VCPU_REGS_R15 15 23*95c7b77dSSean Christopherson #endif 24*95c7b77dSSean Christopherson 25*95c7b77dSSean Christopherson #endif /* _ASM_X86_KVM_VCPU_REGS_H */ 26