1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 28 #include <asm/pvclock-abi.h> 29 #include <asm/desc.h> 30 #include <asm/mtrr.h> 31 #include <asm/msr-index.h> 32 #include <asm/asm.h> 33 34 #define KVM_MAX_VCPUS 255 35 #define KVM_SOFT_MAX_VCPUS 160 36 #define KVM_USER_MEM_SLOTS 125 37 /* memory slots that are not exposed to userspace */ 38 #define KVM_PRIVATE_MEM_SLOTS 3 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41 #define KVM_MMIO_SIZE 16 42 43 #define KVM_PIO_PAGE_OFFSET 1 44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 45 46 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 47 48 #define CR0_RESERVED_BITS \ 49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 52 53 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) 54 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) 55 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL 56 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ 57 0xFFFFFF0000000000ULL) 58 #define CR4_RESERVED_BITS \ 59 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 62 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) 64 65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 66 67 68 69 #define INVALID_PAGE (~(hpa_t)0) 70 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 71 72 #define UNMAPPED_GVA (~(gpa_t)0) 73 74 /* KVM Hugepage definitions for x86 */ 75 #define KVM_NR_PAGE_SIZES 3 76 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 77 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 78 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 79 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 80 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 81 82 #define SELECTOR_TI_MASK (1 << 2) 83 #define SELECTOR_RPL_MASK 0x03 84 85 #define IOPL_SHIFT 12 86 87 #define KVM_PERMILLE_MMU_PAGES 20 88 #define KVM_MIN_ALLOC_MMU_PAGES 64 89 #define KVM_MMU_HASH_SHIFT 10 90 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 91 #define KVM_MIN_FREE_MMU_PAGES 5 92 #define KVM_REFILL_PAGES 25 93 #define KVM_MAX_CPUID_ENTRIES 80 94 #define KVM_NR_FIXED_MTRR_REGION 88 95 #define KVM_NR_VAR_MTRR 8 96 97 #define ASYNC_PF_PER_VCPU 64 98 99 struct kvm_vcpu; 100 struct kvm; 101 struct kvm_async_pf; 102 103 enum kvm_reg { 104 VCPU_REGS_RAX = 0, 105 VCPU_REGS_RCX = 1, 106 VCPU_REGS_RDX = 2, 107 VCPU_REGS_RBX = 3, 108 VCPU_REGS_RSP = 4, 109 VCPU_REGS_RBP = 5, 110 VCPU_REGS_RSI = 6, 111 VCPU_REGS_RDI = 7, 112 #ifdef CONFIG_X86_64 113 VCPU_REGS_R8 = 8, 114 VCPU_REGS_R9 = 9, 115 VCPU_REGS_R10 = 10, 116 VCPU_REGS_R11 = 11, 117 VCPU_REGS_R12 = 12, 118 VCPU_REGS_R13 = 13, 119 VCPU_REGS_R14 = 14, 120 VCPU_REGS_R15 = 15, 121 #endif 122 VCPU_REGS_RIP, 123 NR_VCPU_REGS 124 }; 125 126 enum kvm_reg_ex { 127 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 128 VCPU_EXREG_CR3, 129 VCPU_EXREG_RFLAGS, 130 VCPU_EXREG_CPL, 131 VCPU_EXREG_SEGMENTS, 132 }; 133 134 enum { 135 VCPU_SREG_ES, 136 VCPU_SREG_CS, 137 VCPU_SREG_SS, 138 VCPU_SREG_DS, 139 VCPU_SREG_FS, 140 VCPU_SREG_GS, 141 VCPU_SREG_TR, 142 VCPU_SREG_LDTR, 143 }; 144 145 #include <asm/kvm_emulate.h> 146 147 #define KVM_NR_MEM_OBJS 40 148 149 #define KVM_NR_DB_REGS 4 150 151 #define DR6_BD (1 << 13) 152 #define DR6_BS (1 << 14) 153 #define DR6_FIXED_1 0xffff0ff0 154 #define DR6_VOLATILE 0x0000e00f 155 156 #define DR7_BP_EN_MASK 0x000000ff 157 #define DR7_GE (1 << 9) 158 #define DR7_GD (1 << 13) 159 #define DR7_FIXED_1 0x00000400 160 #define DR7_VOLATILE 0xffff23ff 161 162 /* apic attention bits */ 163 #define KVM_APIC_CHECK_VAPIC 0 164 /* 165 * The following bit is set with PV-EOI, unset on EOI. 166 * We detect PV-EOI changes by guest by comparing 167 * this bit with PV-EOI in guest memory. 168 * See the implementation in apic_update_pv_eoi. 169 */ 170 #define KVM_APIC_PV_EOI_PENDING 1 171 172 /* 173 * We don't want allocation failures within the mmu code, so we preallocate 174 * enough memory for a single page fault in a cache. 175 */ 176 struct kvm_mmu_memory_cache { 177 int nobjs; 178 void *objects[KVM_NR_MEM_OBJS]; 179 }; 180 181 /* 182 * kvm_mmu_page_role, below, is defined as: 183 * 184 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 185 * bits 4:7 - page table level for this shadow (1-4) 186 * bits 8:9 - page table quadrant for 2-level guests 187 * bit 16 - direct mapping of virtual to physical mapping at gfn 188 * used for real mode and two-dimensional paging 189 * bits 17:19 - common access permissions for all ptes in this shadow page 190 */ 191 union kvm_mmu_page_role { 192 unsigned word; 193 struct { 194 unsigned level:4; 195 unsigned cr4_pae:1; 196 unsigned quadrant:2; 197 unsigned pad_for_nice_hex_output:6; 198 unsigned direct:1; 199 unsigned access:3; 200 unsigned invalid:1; 201 unsigned nxe:1; 202 unsigned cr0_wp:1; 203 unsigned smep_andnot_wp:1; 204 }; 205 }; 206 207 struct kvm_mmu_page { 208 struct list_head link; 209 struct hlist_node hash_link; 210 211 /* 212 * The following two entries are used to key the shadow page in the 213 * hash table. 214 */ 215 gfn_t gfn; 216 union kvm_mmu_page_role role; 217 218 u64 *spt; 219 /* hold the gfn of each spte inside spt */ 220 gfn_t *gfns; 221 bool unsync; 222 int root_count; /* Currently serving as active root */ 223 unsigned int unsync_children; 224 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 225 226 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 227 unsigned long mmu_valid_gen; 228 229 DECLARE_BITMAP(unsync_child_bitmap, 512); 230 231 #ifdef CONFIG_X86_32 232 /* 233 * Used out of the mmu-lock to avoid reading spte values while an 234 * update is in progress; see the comments in __get_spte_lockless(). 235 */ 236 int clear_spte_count; 237 #endif 238 239 /* Number of writes since the last time traversal visited this page. */ 240 int write_flooding_count; 241 }; 242 243 struct kvm_pio_request { 244 unsigned long count; 245 int in; 246 int port; 247 int size; 248 }; 249 250 /* 251 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 252 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 253 * mode. 254 */ 255 struct kvm_mmu { 256 void (*new_cr3)(struct kvm_vcpu *vcpu); 257 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 258 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 259 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 260 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 261 bool prefault); 262 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 263 struct x86_exception *fault); 264 void (*free)(struct kvm_vcpu *vcpu); 265 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 266 struct x86_exception *exception); 267 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 268 int (*sync_page)(struct kvm_vcpu *vcpu, 269 struct kvm_mmu_page *sp); 270 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 271 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 272 u64 *spte, const void *pte); 273 hpa_t root_hpa; 274 int root_level; 275 int shadow_root_level; 276 union kvm_mmu_page_role base_role; 277 bool direct_map; 278 279 /* 280 * Bitmap; bit set = permission fault 281 * Byte index: page fault error code [4:1] 282 * Bit index: pte permissions in ACC_* format 283 */ 284 u8 permissions[16]; 285 286 u64 *pae_root; 287 u64 *lm_root; 288 u64 rsvd_bits_mask[2][4]; 289 290 /* 291 * Bitmap: bit set = last pte in walk 292 * index[0:1]: level (zero-based) 293 * index[2]: pte.ps 294 */ 295 u8 last_pte_bitmap; 296 297 bool nx; 298 299 u64 pdptrs[4]; /* pae */ 300 }; 301 302 enum pmc_type { 303 KVM_PMC_GP = 0, 304 KVM_PMC_FIXED, 305 }; 306 307 struct kvm_pmc { 308 enum pmc_type type; 309 u8 idx; 310 u64 counter; 311 u64 eventsel; 312 struct perf_event *perf_event; 313 struct kvm_vcpu *vcpu; 314 }; 315 316 struct kvm_pmu { 317 unsigned nr_arch_gp_counters; 318 unsigned nr_arch_fixed_counters; 319 unsigned available_event_types; 320 u64 fixed_ctr_ctrl; 321 u64 global_ctrl; 322 u64 global_status; 323 u64 global_ovf_ctrl; 324 u64 counter_bitmask[2]; 325 u64 global_ctrl_mask; 326 u8 version; 327 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 328 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 329 struct irq_work irq_work; 330 u64 reprogram_pmi; 331 }; 332 333 struct kvm_vcpu_arch { 334 /* 335 * rip and regs accesses must go through 336 * kvm_{register,rip}_{read,write} functions. 337 */ 338 unsigned long regs[NR_VCPU_REGS]; 339 u32 regs_avail; 340 u32 regs_dirty; 341 342 unsigned long cr0; 343 unsigned long cr0_guest_owned_bits; 344 unsigned long cr2; 345 unsigned long cr3; 346 unsigned long cr4; 347 unsigned long cr4_guest_owned_bits; 348 unsigned long cr8; 349 u32 hflags; 350 u64 efer; 351 u64 apic_base; 352 struct kvm_lapic *apic; /* kernel irqchip context */ 353 unsigned long apic_attention; 354 int32_t apic_arb_prio; 355 int mp_state; 356 u64 ia32_misc_enable_msr; 357 bool tpr_access_reporting; 358 359 /* 360 * Paging state of the vcpu 361 * 362 * If the vcpu runs in guest mode with two level paging this still saves 363 * the paging mode of the l1 guest. This context is always used to 364 * handle faults. 365 */ 366 struct kvm_mmu mmu; 367 368 /* 369 * Paging state of an L2 guest (used for nested npt) 370 * 371 * This context will save all necessary information to walk page tables 372 * of the an L2 guest. This context is only initialized for page table 373 * walking and not for faulting since we never handle l2 page faults on 374 * the host. 375 */ 376 struct kvm_mmu nested_mmu; 377 378 /* 379 * Pointer to the mmu context currently used for 380 * gva_to_gpa translations. 381 */ 382 struct kvm_mmu *walk_mmu; 383 384 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 385 struct kvm_mmu_memory_cache mmu_page_cache; 386 struct kvm_mmu_memory_cache mmu_page_header_cache; 387 388 struct fpu guest_fpu; 389 u64 xcr0; 390 391 struct kvm_pio_request pio; 392 void *pio_data; 393 394 u8 event_exit_inst_len; 395 396 struct kvm_queued_exception { 397 bool pending; 398 bool has_error_code; 399 bool reinject; 400 u8 nr; 401 u32 error_code; 402 } exception; 403 404 struct kvm_queued_interrupt { 405 bool pending; 406 bool soft; 407 u8 nr; 408 } interrupt; 409 410 int halt_request; /* real mode on Intel only */ 411 412 int cpuid_nent; 413 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 414 /* emulate context */ 415 416 struct x86_emulate_ctxt emulate_ctxt; 417 bool emulate_regs_need_sync_to_vcpu; 418 bool emulate_regs_need_sync_from_vcpu; 419 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 420 421 gpa_t time; 422 struct pvclock_vcpu_time_info hv_clock; 423 unsigned int hw_tsc_khz; 424 struct gfn_to_hva_cache pv_time; 425 bool pv_time_enabled; 426 /* set guest stopped flag in pvclock flags field */ 427 bool pvclock_set_guest_stopped_request; 428 429 struct { 430 u64 msr_val; 431 u64 last_steal; 432 u64 accum_steal; 433 struct gfn_to_hva_cache stime; 434 struct kvm_steal_time steal; 435 } st; 436 437 u64 last_guest_tsc; 438 u64 last_kernel_ns; 439 u64 last_host_tsc; 440 u64 tsc_offset_adjustment; 441 u64 this_tsc_nsec; 442 u64 this_tsc_write; 443 u8 this_tsc_generation; 444 bool tsc_catchup; 445 bool tsc_always_catchup; 446 s8 virtual_tsc_shift; 447 u32 virtual_tsc_mult; 448 u32 virtual_tsc_khz; 449 s64 ia32_tsc_adjust_msr; 450 451 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 452 unsigned nmi_pending; /* NMI queued after currently running handler */ 453 bool nmi_injected; /* Trying to inject an NMI this entry */ 454 455 struct mtrr_state_type mtrr_state; 456 u32 pat; 457 458 int switch_db_regs; 459 unsigned long db[KVM_NR_DB_REGS]; 460 unsigned long dr6; 461 unsigned long dr7; 462 unsigned long eff_db[KVM_NR_DB_REGS]; 463 unsigned long guest_debug_dr7; 464 465 u64 mcg_cap; 466 u64 mcg_status; 467 u64 mcg_ctl; 468 u64 *mce_banks; 469 470 /* Cache MMIO info */ 471 u64 mmio_gva; 472 unsigned access; 473 gfn_t mmio_gfn; 474 475 struct kvm_pmu pmu; 476 477 /* used for guest single stepping over the given code position */ 478 unsigned long singlestep_rip; 479 480 /* fields used by HYPER-V emulation */ 481 u64 hv_vapic; 482 483 cpumask_var_t wbinvd_dirty_mask; 484 485 unsigned long last_retry_eip; 486 unsigned long last_retry_addr; 487 488 struct { 489 bool halted; 490 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 491 struct gfn_to_hva_cache data; 492 u64 msr_val; 493 u32 id; 494 bool send_user_only; 495 } apf; 496 497 /* OSVW MSRs (AMD only) */ 498 struct { 499 u64 length; 500 u64 status; 501 } osvw; 502 503 struct { 504 u64 msr_val; 505 struct gfn_to_hva_cache data; 506 } pv_eoi; 507 508 /* 509 * Indicate whether the access faults on its page table in guest 510 * which is set when fix page fault and used to detect unhandeable 511 * instruction. 512 */ 513 bool write_fault_to_shadow_pgtable; 514 }; 515 516 struct kvm_lpage_info { 517 int write_count; 518 }; 519 520 struct kvm_arch_memory_slot { 521 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 522 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 523 }; 524 525 struct kvm_apic_map { 526 struct rcu_head rcu; 527 u8 ldr_bits; 528 /* fields bellow are used to decode ldr values in different modes */ 529 u32 cid_shift, cid_mask, lid_mask; 530 struct kvm_lapic *phys_map[256]; 531 /* first index is cluster id second is cpu id in a cluster */ 532 struct kvm_lapic *logical_map[16][16]; 533 }; 534 535 struct kvm_arch { 536 unsigned int n_used_mmu_pages; 537 unsigned int n_requested_mmu_pages; 538 unsigned int n_max_mmu_pages; 539 unsigned int indirect_shadow_pages; 540 unsigned long mmu_valid_gen; 541 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 542 /* 543 * Hash table of struct kvm_mmu_page. 544 */ 545 struct list_head active_mmu_pages; 546 struct list_head zapped_obsolete_pages; 547 548 struct list_head assigned_dev_head; 549 struct iommu_domain *iommu_domain; 550 int iommu_flags; 551 struct kvm_pic *vpic; 552 struct kvm_ioapic *vioapic; 553 struct kvm_pit *vpit; 554 int vapics_in_nmi_mode; 555 struct mutex apic_map_lock; 556 struct kvm_apic_map *apic_map; 557 558 unsigned int tss_addr; 559 struct page *apic_access_page; 560 561 gpa_t wall_clock; 562 563 struct page *ept_identity_pagetable; 564 bool ept_identity_pagetable_done; 565 gpa_t ept_identity_map_addr; 566 567 unsigned long irq_sources_bitmap; 568 s64 kvmclock_offset; 569 raw_spinlock_t tsc_write_lock; 570 u64 last_tsc_nsec; 571 u64 last_tsc_write; 572 u32 last_tsc_khz; 573 u64 cur_tsc_nsec; 574 u64 cur_tsc_write; 575 u64 cur_tsc_offset; 576 u8 cur_tsc_generation; 577 int nr_vcpus_matched_tsc; 578 579 spinlock_t pvclock_gtod_sync_lock; 580 bool use_master_clock; 581 u64 master_kernel_ns; 582 cycle_t master_cycle_now; 583 584 struct kvm_xen_hvm_config xen_hvm_config; 585 586 /* fields used by HYPER-V emulation */ 587 u64 hv_guest_os_id; 588 u64 hv_hypercall; 589 590 #ifdef CONFIG_KVM_MMU_AUDIT 591 int audit_point; 592 #endif 593 }; 594 595 struct kvm_vm_stat { 596 u32 mmu_shadow_zapped; 597 u32 mmu_pte_write; 598 u32 mmu_pte_updated; 599 u32 mmu_pde_zapped; 600 u32 mmu_flooded; 601 u32 mmu_recycled; 602 u32 mmu_cache_miss; 603 u32 mmu_unsync; 604 u32 remote_tlb_flush; 605 u32 lpages; 606 }; 607 608 struct kvm_vcpu_stat { 609 u32 pf_fixed; 610 u32 pf_guest; 611 u32 tlb_flush; 612 u32 invlpg; 613 614 u32 exits; 615 u32 io_exits; 616 u32 mmio_exits; 617 u32 signal_exits; 618 u32 irq_window_exits; 619 u32 nmi_window_exits; 620 u32 halt_exits; 621 u32 halt_wakeup; 622 u32 request_irq_exits; 623 u32 irq_exits; 624 u32 host_state_reload; 625 u32 efer_reload; 626 u32 fpu_reload; 627 u32 insn_emulation; 628 u32 insn_emulation_fail; 629 u32 hypercalls; 630 u32 irq_injections; 631 u32 nmi_injections; 632 }; 633 634 struct x86_instruction_info; 635 636 struct msr_data { 637 bool host_initiated; 638 u32 index; 639 u64 data; 640 }; 641 642 struct kvm_x86_ops { 643 int (*cpu_has_kvm_support)(void); /* __init */ 644 int (*disabled_by_bios)(void); /* __init */ 645 int (*hardware_enable)(void *dummy); 646 void (*hardware_disable)(void *dummy); 647 void (*check_processor_compatibility)(void *rtn); 648 int (*hardware_setup)(void); /* __init */ 649 void (*hardware_unsetup)(void); /* __exit */ 650 bool (*cpu_has_accelerated_tpr)(void); 651 void (*cpuid_update)(struct kvm_vcpu *vcpu); 652 653 /* Create, but do not attach this VCPU */ 654 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 655 void (*vcpu_free)(struct kvm_vcpu *vcpu); 656 void (*vcpu_reset)(struct kvm_vcpu *vcpu); 657 658 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 659 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 660 void (*vcpu_put)(struct kvm_vcpu *vcpu); 661 662 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 663 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 664 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 665 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 666 void (*get_segment)(struct kvm_vcpu *vcpu, 667 struct kvm_segment *var, int seg); 668 int (*get_cpl)(struct kvm_vcpu *vcpu); 669 void (*set_segment)(struct kvm_vcpu *vcpu, 670 struct kvm_segment *var, int seg); 671 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 672 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 673 void (*decache_cr3)(struct kvm_vcpu *vcpu); 674 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 675 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 676 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 677 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 678 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 679 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 680 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 681 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 682 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 683 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 684 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 685 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 686 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 687 void (*fpu_activate)(struct kvm_vcpu *vcpu); 688 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 689 690 void (*tlb_flush)(struct kvm_vcpu *vcpu); 691 692 void (*run)(struct kvm_vcpu *vcpu); 693 int (*handle_exit)(struct kvm_vcpu *vcpu); 694 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 695 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 696 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 697 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 698 unsigned char *hypercall_addr); 699 void (*set_irq)(struct kvm_vcpu *vcpu); 700 void (*set_nmi)(struct kvm_vcpu *vcpu); 701 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 702 bool has_error_code, u32 error_code, 703 bool reinject); 704 void (*cancel_injection)(struct kvm_vcpu *vcpu); 705 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 706 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 707 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 708 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 709 int (*enable_nmi_window)(struct kvm_vcpu *vcpu); 710 int (*enable_irq_window)(struct kvm_vcpu *vcpu); 711 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 712 int (*vm_has_apicv)(struct kvm *kvm); 713 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 714 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 715 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 716 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 717 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 718 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 719 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 720 int (*get_tdp_level)(void); 721 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 722 int (*get_lpage_level)(void); 723 bool (*rdtscp_supported)(void); 724 bool (*invpcid_supported)(void); 725 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 726 727 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 728 729 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 730 731 bool (*has_wbinvd_exit)(void); 732 733 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 734 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 735 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 736 737 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 738 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 739 740 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 741 742 int (*check_intercept)(struct kvm_vcpu *vcpu, 743 struct x86_instruction_info *info, 744 enum x86_intercept_stage stage); 745 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 746 }; 747 748 struct kvm_arch_async_pf { 749 u32 token; 750 gfn_t gfn; 751 unsigned long cr3; 752 bool direct_map; 753 }; 754 755 extern struct kvm_x86_ops *kvm_x86_ops; 756 757 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 758 s64 adjustment) 759 { 760 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 761 } 762 763 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 764 { 765 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 766 } 767 768 int kvm_mmu_module_init(void); 769 void kvm_mmu_module_exit(void); 770 771 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 772 int kvm_mmu_create(struct kvm_vcpu *vcpu); 773 int kvm_mmu_setup(struct kvm_vcpu *vcpu); 774 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 775 u64 dirty_mask, u64 nx_mask, u64 x_mask); 776 777 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 778 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); 779 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 780 struct kvm_memory_slot *slot, 781 gfn_t gfn_offset, unsigned long mask); 782 void kvm_mmu_zap_all(struct kvm *kvm); 783 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm); 784 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 785 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 786 787 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 788 789 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 790 const void *val, int bytes); 791 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 792 793 extern bool tdp_enabled; 794 795 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 796 797 /* control of guest tsc rate supported? */ 798 extern bool kvm_has_tsc_control; 799 /* minimum supported tsc_khz for guests */ 800 extern u32 kvm_min_guest_tsc_khz; 801 /* maximum supported tsc_khz for guests */ 802 extern u32 kvm_max_guest_tsc_khz; 803 804 enum emulation_result { 805 EMULATE_DONE, /* no further processing */ 806 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ 807 EMULATE_FAIL, /* can't emulate this instruction */ 808 }; 809 810 #define EMULTYPE_NO_DECODE (1 << 0) 811 #define EMULTYPE_TRAP_UD (1 << 1) 812 #define EMULTYPE_SKIP (1 << 2) 813 #define EMULTYPE_RETRY (1 << 3) 814 #define EMULTYPE_NO_REEXECUTE (1 << 4) 815 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 816 int emulation_type, void *insn, int insn_len); 817 818 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 819 int emulation_type) 820 { 821 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 822 } 823 824 void kvm_enable_efer_bits(u64); 825 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 826 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 827 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 828 829 struct x86_emulate_ctxt; 830 831 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 832 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 833 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 834 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 835 836 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 837 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 838 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector); 839 840 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 841 int reason, bool has_error_code, u32 error_code); 842 843 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 844 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 845 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 846 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 847 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 848 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 849 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 850 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 851 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 852 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 853 854 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 855 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 856 857 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 858 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 859 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 860 861 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 862 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 863 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 864 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 865 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 866 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 867 gfn_t gfn, void *data, int offset, int len, 868 u32 access); 869 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 870 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 871 872 static inline int __kvm_irq_line_state(unsigned long *irq_state, 873 int irq_source_id, int level) 874 { 875 /* Logical OR for level trig interrupt */ 876 if (level) 877 __set_bit(irq_source_id, irq_state); 878 else 879 __clear_bit(irq_source_id, irq_state); 880 881 return !!(*irq_state); 882 } 883 884 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 885 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 886 887 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 888 889 int fx_init(struct kvm_vcpu *vcpu); 890 891 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); 892 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 893 const u8 *new, int bytes); 894 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 895 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 896 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 897 int kvm_mmu_load(struct kvm_vcpu *vcpu); 898 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 899 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 900 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 901 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 902 struct x86_exception *exception); 903 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 904 struct x86_exception *exception); 905 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 906 struct x86_exception *exception); 907 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 908 struct x86_exception *exception); 909 910 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 911 912 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 913 void *insn, int insn_len); 914 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 915 916 void kvm_enable_tdp(void); 917 void kvm_disable_tdp(void); 918 919 int complete_pio(struct kvm_vcpu *vcpu); 920 bool kvm_check_iopl(struct kvm_vcpu *vcpu); 921 922 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access) 923 { 924 return gpa; 925 } 926 927 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 928 { 929 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 930 931 return (struct kvm_mmu_page *)page_private(page); 932 } 933 934 static inline u16 kvm_read_ldt(void) 935 { 936 u16 ldt; 937 asm("sldt %0" : "=g"(ldt)); 938 return ldt; 939 } 940 941 static inline void kvm_load_ldt(u16 sel) 942 { 943 asm("lldt %0" : : "rm"(sel)); 944 } 945 946 #ifdef CONFIG_X86_64 947 static inline unsigned long read_msr(unsigned long msr) 948 { 949 u64 value; 950 951 rdmsrl(msr, value); 952 return value; 953 } 954 #endif 955 956 static inline u32 get_rdx_init_val(void) 957 { 958 return 0x600; /* P6 family */ 959 } 960 961 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 962 { 963 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 964 } 965 966 #define TSS_IOPB_BASE_OFFSET 0x66 967 #define TSS_BASE_SIZE 0x68 968 #define TSS_IOPB_SIZE (65536 / 8) 969 #define TSS_REDIRECTION_SIZE (256 / 8) 970 #define RMODE_TSS_SIZE \ 971 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 972 973 enum { 974 TASK_SWITCH_CALL = 0, 975 TASK_SWITCH_IRET = 1, 976 TASK_SWITCH_JMP = 2, 977 TASK_SWITCH_GATE = 3, 978 }; 979 980 #define HF_GIF_MASK (1 << 0) 981 #define HF_HIF_MASK (1 << 1) 982 #define HF_VINTR_MASK (1 << 2) 983 #define HF_NMI_MASK (1 << 3) 984 #define HF_IRET_MASK (1 << 4) 985 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 986 987 /* 988 * Hardware virtualization extension instructions may fault if a 989 * reboot turns off virtualization while processes are running. 990 * Trap the fault and ignore the instruction if that happens. 991 */ 992 asmlinkage void kvm_spurious_fault(void); 993 994 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 995 "666: " insn "\n\t" \ 996 "668: \n\t" \ 997 ".pushsection .fixup, \"ax\" \n" \ 998 "667: \n\t" \ 999 cleanup_insn "\n\t" \ 1000 "cmpb $0, kvm_rebooting \n\t" \ 1001 "jne 668b \n\t" \ 1002 __ASM_SIZE(push) " $666b \n\t" \ 1003 "call kvm_spurious_fault \n\t" \ 1004 ".popsection \n\t" \ 1005 _ASM_EXTABLE(666b, 667b) 1006 1007 #define __kvm_handle_fault_on_reboot(insn) \ 1008 ____kvm_handle_fault_on_reboot(insn, "") 1009 1010 #define KVM_ARCH_WANT_MMU_NOTIFIER 1011 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1012 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1013 int kvm_age_hva(struct kvm *kvm, unsigned long hva); 1014 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1015 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1016 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); 1017 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1018 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1019 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1020 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1021 void kvm_vcpu_reset(struct kvm_vcpu *vcpu); 1022 1023 void kvm_define_shared_msr(unsigned index, u32 msr); 1024 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1025 1026 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1027 1028 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1029 struct kvm_async_pf *work); 1030 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1031 struct kvm_async_pf *work); 1032 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1033 struct kvm_async_pf *work); 1034 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1035 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1036 1037 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1038 1039 int kvm_is_in_guest(void); 1040 1041 void kvm_pmu_init(struct kvm_vcpu *vcpu); 1042 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1043 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1044 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1045 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1046 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1047 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 1048 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1049 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1050 void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1051 1052 #endif /* _ASM_X86_KVM_HOST_H */ 1053