1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 35 #define KVM_MAX_VCPUS 255 36 #define KVM_SOFT_MAX_VCPUS 160 37 #define KVM_USER_MEM_SLOTS 509 38 /* memory slots that are not exposed to userspace */ 39 #define KVM_PRIVATE_MEM_SLOTS 3 40 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 41 42 #define KVM_PIO_PAGE_OFFSET 1 43 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 44 #define KVM_HALT_POLL_NS_DEFAULT 500000 45 46 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 47 48 #define CR0_RESERVED_BITS \ 49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 52 53 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 54 #define CR3_PCID_INVD BIT_64(63) 55 #define CR4_RESERVED_BITS \ 56 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 57 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 58 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 59 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) 61 62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 63 64 65 66 #define INVALID_PAGE (~(hpa_t)0) 67 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 68 69 #define UNMAPPED_GVA (~(gpa_t)0) 70 71 /* KVM Hugepage definitions for x86 */ 72 #define KVM_NR_PAGE_SIZES 3 73 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 74 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 75 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 76 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 77 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 78 79 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 80 { 81 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 82 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 83 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 84 } 85 86 #define KVM_PERMILLE_MMU_PAGES 20 87 #define KVM_MIN_ALLOC_MMU_PAGES 64 88 #define KVM_MMU_HASH_SHIFT 10 89 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 90 #define KVM_MIN_FREE_MMU_PAGES 5 91 #define KVM_REFILL_PAGES 25 92 #define KVM_MAX_CPUID_ENTRIES 80 93 #define KVM_NR_FIXED_MTRR_REGION 88 94 #define KVM_NR_VAR_MTRR 8 95 96 #define ASYNC_PF_PER_VCPU 64 97 98 enum kvm_reg { 99 VCPU_REGS_RAX = 0, 100 VCPU_REGS_RCX = 1, 101 VCPU_REGS_RDX = 2, 102 VCPU_REGS_RBX = 3, 103 VCPU_REGS_RSP = 4, 104 VCPU_REGS_RBP = 5, 105 VCPU_REGS_RSI = 6, 106 VCPU_REGS_RDI = 7, 107 #ifdef CONFIG_X86_64 108 VCPU_REGS_R8 = 8, 109 VCPU_REGS_R9 = 9, 110 VCPU_REGS_R10 = 10, 111 VCPU_REGS_R11 = 11, 112 VCPU_REGS_R12 = 12, 113 VCPU_REGS_R13 = 13, 114 VCPU_REGS_R14 = 14, 115 VCPU_REGS_R15 = 15, 116 #endif 117 VCPU_REGS_RIP, 118 NR_VCPU_REGS 119 }; 120 121 enum kvm_reg_ex { 122 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 123 VCPU_EXREG_CR3, 124 VCPU_EXREG_RFLAGS, 125 VCPU_EXREG_SEGMENTS, 126 }; 127 128 enum { 129 VCPU_SREG_ES, 130 VCPU_SREG_CS, 131 VCPU_SREG_SS, 132 VCPU_SREG_DS, 133 VCPU_SREG_FS, 134 VCPU_SREG_GS, 135 VCPU_SREG_TR, 136 VCPU_SREG_LDTR, 137 }; 138 139 #include <asm/kvm_emulate.h> 140 141 #define KVM_NR_MEM_OBJS 40 142 143 #define KVM_NR_DB_REGS 4 144 145 #define DR6_BD (1 << 13) 146 #define DR6_BS (1 << 14) 147 #define DR6_RTM (1 << 16) 148 #define DR6_FIXED_1 0xfffe0ff0 149 #define DR6_INIT 0xffff0ff0 150 #define DR6_VOLATILE 0x0001e00f 151 152 #define DR7_BP_EN_MASK 0x000000ff 153 #define DR7_GE (1 << 9) 154 #define DR7_GD (1 << 13) 155 #define DR7_FIXED_1 0x00000400 156 #define DR7_VOLATILE 0xffff2bff 157 158 #define PFERR_PRESENT_BIT 0 159 #define PFERR_WRITE_BIT 1 160 #define PFERR_USER_BIT 2 161 #define PFERR_RSVD_BIT 3 162 #define PFERR_FETCH_BIT 4 163 164 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 165 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 166 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 167 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 168 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 169 170 /* apic attention bits */ 171 #define KVM_APIC_CHECK_VAPIC 0 172 /* 173 * The following bit is set with PV-EOI, unset on EOI. 174 * We detect PV-EOI changes by guest by comparing 175 * this bit with PV-EOI in guest memory. 176 * See the implementation in apic_update_pv_eoi. 177 */ 178 #define KVM_APIC_PV_EOI_PENDING 1 179 180 struct kvm_kernel_irq_routing_entry; 181 182 /* 183 * We don't want allocation failures within the mmu code, so we preallocate 184 * enough memory for a single page fault in a cache. 185 */ 186 struct kvm_mmu_memory_cache { 187 int nobjs; 188 void *objects[KVM_NR_MEM_OBJS]; 189 }; 190 191 union kvm_mmu_page_role { 192 unsigned word; 193 struct { 194 unsigned level:4; 195 unsigned cr4_pae:1; 196 unsigned quadrant:2; 197 unsigned direct:1; 198 unsigned access:3; 199 unsigned invalid:1; 200 unsigned nxe:1; 201 unsigned cr0_wp:1; 202 unsigned smep_andnot_wp:1; 203 unsigned smap_andnot_wp:1; 204 unsigned :8; 205 206 /* 207 * This is left at the top of the word so that 208 * kvm_memslots_for_spte_role can extract it with a 209 * simple shift. While there is room, give it a whole 210 * byte so it is also faster to load it from memory. 211 */ 212 unsigned smm:8; 213 }; 214 }; 215 216 struct kvm_mmu_page { 217 struct list_head link; 218 struct hlist_node hash_link; 219 220 /* 221 * The following two entries are used to key the shadow page in the 222 * hash table. 223 */ 224 gfn_t gfn; 225 union kvm_mmu_page_role role; 226 227 u64 *spt; 228 /* hold the gfn of each spte inside spt */ 229 gfn_t *gfns; 230 bool unsync; 231 int root_count; /* Currently serving as active root */ 232 unsigned int unsync_children; 233 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 234 235 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 236 unsigned long mmu_valid_gen; 237 238 DECLARE_BITMAP(unsync_child_bitmap, 512); 239 240 #ifdef CONFIG_X86_32 241 /* 242 * Used out of the mmu-lock to avoid reading spte values while an 243 * update is in progress; see the comments in __get_spte_lockless(). 244 */ 245 int clear_spte_count; 246 #endif 247 248 /* Number of writes since the last time traversal visited this page. */ 249 int write_flooding_count; 250 }; 251 252 struct kvm_pio_request { 253 unsigned long count; 254 int in; 255 int port; 256 int size; 257 }; 258 259 struct rsvd_bits_validate { 260 u64 rsvd_bits_mask[2][4]; 261 u64 bad_mt_xwr; 262 }; 263 264 /* 265 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 266 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 267 * mode. 268 */ 269 struct kvm_mmu { 270 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 271 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 272 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 273 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 274 bool prefault); 275 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 276 struct x86_exception *fault); 277 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 278 struct x86_exception *exception); 279 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 280 struct x86_exception *exception); 281 int (*sync_page)(struct kvm_vcpu *vcpu, 282 struct kvm_mmu_page *sp); 283 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 284 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 285 u64 *spte, const void *pte); 286 hpa_t root_hpa; 287 int root_level; 288 int shadow_root_level; 289 union kvm_mmu_page_role base_role; 290 bool direct_map; 291 292 /* 293 * Bitmap; bit set = permission fault 294 * Byte index: page fault error code [4:1] 295 * Bit index: pte permissions in ACC_* format 296 */ 297 u8 permissions[16]; 298 299 u64 *pae_root; 300 u64 *lm_root; 301 302 /* 303 * check zero bits on shadow page table entries, these 304 * bits include not only hardware reserved bits but also 305 * the bits spte never used. 306 */ 307 struct rsvd_bits_validate shadow_zero_check; 308 309 struct rsvd_bits_validate guest_rsvd_check; 310 311 /* 312 * Bitmap: bit set = last pte in walk 313 * index[0:1]: level (zero-based) 314 * index[2]: pte.ps 315 */ 316 u8 last_pte_bitmap; 317 318 bool nx; 319 320 u64 pdptrs[4]; /* pae */ 321 }; 322 323 enum pmc_type { 324 KVM_PMC_GP = 0, 325 KVM_PMC_FIXED, 326 }; 327 328 struct kvm_pmc { 329 enum pmc_type type; 330 u8 idx; 331 u64 counter; 332 u64 eventsel; 333 struct perf_event *perf_event; 334 struct kvm_vcpu *vcpu; 335 }; 336 337 struct kvm_pmu { 338 unsigned nr_arch_gp_counters; 339 unsigned nr_arch_fixed_counters; 340 unsigned available_event_types; 341 u64 fixed_ctr_ctrl; 342 u64 global_ctrl; 343 u64 global_status; 344 u64 global_ovf_ctrl; 345 u64 counter_bitmask[2]; 346 u64 global_ctrl_mask; 347 u64 reserved_bits; 348 u8 version; 349 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 350 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 351 struct irq_work irq_work; 352 u64 reprogram_pmi; 353 }; 354 355 struct kvm_pmu_ops; 356 357 enum { 358 KVM_DEBUGREG_BP_ENABLED = 1, 359 KVM_DEBUGREG_WONT_EXIT = 2, 360 KVM_DEBUGREG_RELOAD = 4, 361 }; 362 363 struct kvm_mtrr_range { 364 u64 base; 365 u64 mask; 366 struct list_head node; 367 }; 368 369 struct kvm_mtrr { 370 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 371 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 372 u64 deftype; 373 374 struct list_head head; 375 }; 376 377 /* Hyper-V per vcpu emulation context */ 378 struct kvm_vcpu_hv { 379 u64 hv_vapic; 380 s64 runtime_offset; 381 }; 382 383 struct kvm_vcpu_arch { 384 /* 385 * rip and regs accesses must go through 386 * kvm_{register,rip}_{read,write} functions. 387 */ 388 unsigned long regs[NR_VCPU_REGS]; 389 u32 regs_avail; 390 u32 regs_dirty; 391 392 unsigned long cr0; 393 unsigned long cr0_guest_owned_bits; 394 unsigned long cr2; 395 unsigned long cr3; 396 unsigned long cr4; 397 unsigned long cr4_guest_owned_bits; 398 unsigned long cr8; 399 u32 hflags; 400 u64 efer; 401 u64 apic_base; 402 struct kvm_lapic *apic; /* kernel irqchip context */ 403 u64 eoi_exit_bitmap[4]; 404 unsigned long apic_attention; 405 int32_t apic_arb_prio; 406 int mp_state; 407 u64 ia32_misc_enable_msr; 408 u64 smbase; 409 bool tpr_access_reporting; 410 u64 ia32_xss; 411 412 /* 413 * Paging state of the vcpu 414 * 415 * If the vcpu runs in guest mode with two level paging this still saves 416 * the paging mode of the l1 guest. This context is always used to 417 * handle faults. 418 */ 419 struct kvm_mmu mmu; 420 421 /* 422 * Paging state of an L2 guest (used for nested npt) 423 * 424 * This context will save all necessary information to walk page tables 425 * of the an L2 guest. This context is only initialized for page table 426 * walking and not for faulting since we never handle l2 page faults on 427 * the host. 428 */ 429 struct kvm_mmu nested_mmu; 430 431 /* 432 * Pointer to the mmu context currently used for 433 * gva_to_gpa translations. 434 */ 435 struct kvm_mmu *walk_mmu; 436 437 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 438 struct kvm_mmu_memory_cache mmu_page_cache; 439 struct kvm_mmu_memory_cache mmu_page_header_cache; 440 441 struct fpu guest_fpu; 442 bool eager_fpu; 443 u64 xcr0; 444 u64 guest_supported_xcr0; 445 u32 guest_xstate_size; 446 447 struct kvm_pio_request pio; 448 void *pio_data; 449 450 u8 event_exit_inst_len; 451 452 struct kvm_queued_exception { 453 bool pending; 454 bool has_error_code; 455 bool reinject; 456 u8 nr; 457 u32 error_code; 458 } exception; 459 460 struct kvm_queued_interrupt { 461 bool pending; 462 bool soft; 463 u8 nr; 464 } interrupt; 465 466 int halt_request; /* real mode on Intel only */ 467 468 int cpuid_nent; 469 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 470 471 int maxphyaddr; 472 473 /* emulate context */ 474 475 struct x86_emulate_ctxt emulate_ctxt; 476 bool emulate_regs_need_sync_to_vcpu; 477 bool emulate_regs_need_sync_from_vcpu; 478 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 479 480 gpa_t time; 481 struct pvclock_vcpu_time_info hv_clock; 482 unsigned int hw_tsc_khz; 483 struct gfn_to_hva_cache pv_time; 484 bool pv_time_enabled; 485 /* set guest stopped flag in pvclock flags field */ 486 bool pvclock_set_guest_stopped_request; 487 488 struct { 489 u64 msr_val; 490 u64 last_steal; 491 u64 accum_steal; 492 struct gfn_to_hva_cache stime; 493 struct kvm_steal_time steal; 494 } st; 495 496 u64 last_guest_tsc; 497 u64 last_host_tsc; 498 u64 tsc_offset_adjustment; 499 u64 this_tsc_nsec; 500 u64 this_tsc_write; 501 u64 this_tsc_generation; 502 bool tsc_catchup; 503 bool tsc_always_catchup; 504 s8 virtual_tsc_shift; 505 u32 virtual_tsc_mult; 506 u32 virtual_tsc_khz; 507 s64 ia32_tsc_adjust_msr; 508 509 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 510 unsigned nmi_pending; /* NMI queued after currently running handler */ 511 bool nmi_injected; /* Trying to inject an NMI this entry */ 512 bool smi_pending; /* SMI queued after currently running handler */ 513 514 struct kvm_mtrr mtrr_state; 515 u64 pat; 516 517 unsigned switch_db_regs; 518 unsigned long db[KVM_NR_DB_REGS]; 519 unsigned long dr6; 520 unsigned long dr7; 521 unsigned long eff_db[KVM_NR_DB_REGS]; 522 unsigned long guest_debug_dr7; 523 524 u64 mcg_cap; 525 u64 mcg_status; 526 u64 mcg_ctl; 527 u64 *mce_banks; 528 529 /* Cache MMIO info */ 530 u64 mmio_gva; 531 unsigned access; 532 gfn_t mmio_gfn; 533 u64 mmio_gen; 534 535 struct kvm_pmu pmu; 536 537 /* used for guest single stepping over the given code position */ 538 unsigned long singlestep_rip; 539 540 struct kvm_vcpu_hv hyperv; 541 542 cpumask_var_t wbinvd_dirty_mask; 543 544 unsigned long last_retry_eip; 545 unsigned long last_retry_addr; 546 547 struct { 548 bool halted; 549 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 550 struct gfn_to_hva_cache data; 551 u64 msr_val; 552 u32 id; 553 bool send_user_only; 554 } apf; 555 556 /* OSVW MSRs (AMD only) */ 557 struct { 558 u64 length; 559 u64 status; 560 } osvw; 561 562 struct { 563 u64 msr_val; 564 struct gfn_to_hva_cache data; 565 } pv_eoi; 566 567 /* 568 * Indicate whether the access faults on its page table in guest 569 * which is set when fix page fault and used to detect unhandeable 570 * instruction. 571 */ 572 bool write_fault_to_shadow_pgtable; 573 574 /* set at EPT violation at this point */ 575 unsigned long exit_qualification; 576 577 /* pv related host specific info */ 578 struct { 579 bool pv_unhalted; 580 } pv; 581 582 int pending_ioapic_eoi; 583 int pending_external_vector; 584 }; 585 586 struct kvm_lpage_info { 587 int write_count; 588 }; 589 590 struct kvm_arch_memory_slot { 591 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 592 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 593 }; 594 595 /* 596 * We use as the mode the number of bits allocated in the LDR for the 597 * logical processor ID. It happens that these are all powers of two. 598 * This makes it is very easy to detect cases where the APICs are 599 * configured for multiple modes; in that case, we cannot use the map and 600 * hence cannot use kvm_irq_delivery_to_apic_fast either. 601 */ 602 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 603 #define KVM_APIC_MODE_XAPIC_FLAT 8 604 #define KVM_APIC_MODE_X2APIC 16 605 606 struct kvm_apic_map { 607 struct rcu_head rcu; 608 u8 mode; 609 struct kvm_lapic *phys_map[256]; 610 /* first index is cluster id second is cpu id in a cluster */ 611 struct kvm_lapic *logical_map[16][16]; 612 }; 613 614 /* Hyper-V emulation context */ 615 struct kvm_hv { 616 u64 hv_guest_os_id; 617 u64 hv_hypercall; 618 u64 hv_tsc_page; 619 620 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 621 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 622 u64 hv_crash_ctl; 623 }; 624 625 struct kvm_arch { 626 unsigned int n_used_mmu_pages; 627 unsigned int n_requested_mmu_pages; 628 unsigned int n_max_mmu_pages; 629 unsigned int indirect_shadow_pages; 630 unsigned long mmu_valid_gen; 631 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 632 /* 633 * Hash table of struct kvm_mmu_page. 634 */ 635 struct list_head active_mmu_pages; 636 struct list_head zapped_obsolete_pages; 637 638 struct list_head assigned_dev_head; 639 struct iommu_domain *iommu_domain; 640 bool iommu_noncoherent; 641 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 642 atomic_t noncoherent_dma_count; 643 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 644 atomic_t assigned_device_count; 645 struct kvm_pic *vpic; 646 struct kvm_ioapic *vioapic; 647 struct kvm_pit *vpit; 648 atomic_t vapics_in_nmi_mode; 649 struct mutex apic_map_lock; 650 struct kvm_apic_map *apic_map; 651 652 unsigned int tss_addr; 653 bool apic_access_page_done; 654 655 gpa_t wall_clock; 656 657 bool ept_identity_pagetable_done; 658 gpa_t ept_identity_map_addr; 659 660 unsigned long irq_sources_bitmap; 661 s64 kvmclock_offset; 662 raw_spinlock_t tsc_write_lock; 663 u64 last_tsc_nsec; 664 u64 last_tsc_write; 665 u32 last_tsc_khz; 666 u64 cur_tsc_nsec; 667 u64 cur_tsc_write; 668 u64 cur_tsc_offset; 669 u64 cur_tsc_generation; 670 int nr_vcpus_matched_tsc; 671 672 spinlock_t pvclock_gtod_sync_lock; 673 bool use_master_clock; 674 u64 master_kernel_ns; 675 cycle_t master_cycle_now; 676 struct delayed_work kvmclock_update_work; 677 struct delayed_work kvmclock_sync_work; 678 679 struct kvm_xen_hvm_config xen_hvm_config; 680 681 /* reads protected by irq_srcu, writes by irq_lock */ 682 struct hlist_head mask_notifier_list; 683 684 struct kvm_hv hyperv; 685 686 #ifdef CONFIG_KVM_MMU_AUDIT 687 int audit_point; 688 #endif 689 690 bool boot_vcpu_runs_old_kvmclock; 691 u32 bsp_vcpu_id; 692 693 u64 disabled_quirks; 694 695 bool irqchip_split; 696 u8 nr_reserved_ioapic_pins; 697 }; 698 699 struct kvm_vm_stat { 700 u32 mmu_shadow_zapped; 701 u32 mmu_pte_write; 702 u32 mmu_pte_updated; 703 u32 mmu_pde_zapped; 704 u32 mmu_flooded; 705 u32 mmu_recycled; 706 u32 mmu_cache_miss; 707 u32 mmu_unsync; 708 u32 remote_tlb_flush; 709 u32 lpages; 710 }; 711 712 struct kvm_vcpu_stat { 713 u32 pf_fixed; 714 u32 pf_guest; 715 u32 tlb_flush; 716 u32 invlpg; 717 718 u32 exits; 719 u32 io_exits; 720 u32 mmio_exits; 721 u32 signal_exits; 722 u32 irq_window_exits; 723 u32 nmi_window_exits; 724 u32 halt_exits; 725 u32 halt_successful_poll; 726 u32 halt_attempted_poll; 727 u32 halt_wakeup; 728 u32 request_irq_exits; 729 u32 irq_exits; 730 u32 host_state_reload; 731 u32 efer_reload; 732 u32 fpu_reload; 733 u32 insn_emulation; 734 u32 insn_emulation_fail; 735 u32 hypercalls; 736 u32 irq_injections; 737 u32 nmi_injections; 738 }; 739 740 struct x86_instruction_info; 741 742 struct msr_data { 743 bool host_initiated; 744 u32 index; 745 u64 data; 746 }; 747 748 struct kvm_lapic_irq { 749 u32 vector; 750 u16 delivery_mode; 751 u16 dest_mode; 752 bool level; 753 u16 trig_mode; 754 u32 shorthand; 755 u32 dest_id; 756 bool msi_redir_hint; 757 }; 758 759 struct kvm_x86_ops { 760 int (*cpu_has_kvm_support)(void); /* __init */ 761 int (*disabled_by_bios)(void); /* __init */ 762 int (*hardware_enable)(void); 763 void (*hardware_disable)(void); 764 void (*check_processor_compatibility)(void *rtn); 765 int (*hardware_setup)(void); /* __init */ 766 void (*hardware_unsetup)(void); /* __exit */ 767 bool (*cpu_has_accelerated_tpr)(void); 768 bool (*cpu_has_high_real_mode_segbase)(void); 769 void (*cpuid_update)(struct kvm_vcpu *vcpu); 770 771 /* Create, but do not attach this VCPU */ 772 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 773 void (*vcpu_free)(struct kvm_vcpu *vcpu); 774 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 775 776 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 777 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 778 void (*vcpu_put)(struct kvm_vcpu *vcpu); 779 780 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 781 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 782 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 783 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 784 void (*get_segment)(struct kvm_vcpu *vcpu, 785 struct kvm_segment *var, int seg); 786 int (*get_cpl)(struct kvm_vcpu *vcpu); 787 void (*set_segment)(struct kvm_vcpu *vcpu, 788 struct kvm_segment *var, int seg); 789 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 790 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 791 void (*decache_cr3)(struct kvm_vcpu *vcpu); 792 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 793 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 794 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 795 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 796 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 797 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 798 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 799 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 800 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 801 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 802 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 803 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 804 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 805 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 806 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 807 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 808 void (*fpu_activate)(struct kvm_vcpu *vcpu); 809 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 810 811 void (*tlb_flush)(struct kvm_vcpu *vcpu); 812 813 void (*run)(struct kvm_vcpu *vcpu); 814 int (*handle_exit)(struct kvm_vcpu *vcpu); 815 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 816 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 817 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 818 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 819 unsigned char *hypercall_addr); 820 void (*set_irq)(struct kvm_vcpu *vcpu); 821 void (*set_nmi)(struct kvm_vcpu *vcpu); 822 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 823 bool has_error_code, u32 error_code, 824 bool reinject); 825 void (*cancel_injection)(struct kvm_vcpu *vcpu); 826 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 827 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 828 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 829 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 830 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 831 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 832 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 833 int (*cpu_uses_apicv)(struct kvm_vcpu *vcpu); 834 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 835 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 836 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu); 837 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 838 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 839 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 840 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 841 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 842 int (*get_tdp_level)(void); 843 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 844 int (*get_lpage_level)(void); 845 bool (*rdtscp_supported)(void); 846 bool (*invpcid_supported)(void); 847 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 848 849 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 850 851 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 852 853 bool (*has_wbinvd_exit)(void); 854 855 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 856 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 857 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 858 859 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 860 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 861 862 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 863 864 int (*check_intercept)(struct kvm_vcpu *vcpu, 865 struct x86_instruction_info *info, 866 enum x86_intercept_stage stage); 867 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 868 bool (*mpx_supported)(void); 869 bool (*xsaves_supported)(void); 870 871 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 872 873 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 874 875 /* 876 * Arch-specific dirty logging hooks. These hooks are only supposed to 877 * be valid if the specific arch has hardware-accelerated dirty logging 878 * mechanism. Currently only for PML on VMX. 879 * 880 * - slot_enable_log_dirty: 881 * called when enabling log dirty mode for the slot. 882 * - slot_disable_log_dirty: 883 * called when disabling log dirty mode for the slot. 884 * also called when slot is created with log dirty disabled. 885 * - flush_log_dirty: 886 * called before reporting dirty_bitmap to userspace. 887 * - enable_log_dirty_pt_masked: 888 * called when reenabling log dirty for the GFNs in the mask after 889 * corresponding bits are cleared in slot->dirty_bitmap. 890 */ 891 void (*slot_enable_log_dirty)(struct kvm *kvm, 892 struct kvm_memory_slot *slot); 893 void (*slot_disable_log_dirty)(struct kvm *kvm, 894 struct kvm_memory_slot *slot); 895 void (*flush_log_dirty)(struct kvm *kvm); 896 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 897 struct kvm_memory_slot *slot, 898 gfn_t offset, unsigned long mask); 899 /* pmu operations of sub-arch */ 900 const struct kvm_pmu_ops *pmu_ops; 901 902 /* 903 * Architecture specific hooks for vCPU blocking due to 904 * HLT instruction. 905 * Returns for .pre_block(): 906 * - 0 means continue to block the vCPU. 907 * - 1 means we cannot block the vCPU since some event 908 * happens during this period, such as, 'ON' bit in 909 * posted-interrupts descriptor is set. 910 */ 911 int (*pre_block)(struct kvm_vcpu *vcpu); 912 void (*post_block)(struct kvm_vcpu *vcpu); 913 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 914 uint32_t guest_irq, bool set); 915 }; 916 917 struct kvm_arch_async_pf { 918 u32 token; 919 gfn_t gfn; 920 unsigned long cr3; 921 bool direct_map; 922 }; 923 924 extern struct kvm_x86_ops *kvm_x86_ops; 925 926 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 927 s64 adjustment) 928 { 929 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 930 } 931 932 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 933 { 934 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 935 } 936 937 int kvm_mmu_module_init(void); 938 void kvm_mmu_module_exit(void); 939 940 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 941 int kvm_mmu_create(struct kvm_vcpu *vcpu); 942 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 943 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 944 u64 dirty_mask, u64 nx_mask, u64 x_mask); 945 946 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 947 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 948 struct kvm_memory_slot *memslot); 949 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 950 const struct kvm_memory_slot *memslot); 951 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 952 struct kvm_memory_slot *memslot); 953 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 954 struct kvm_memory_slot *memslot); 955 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 956 struct kvm_memory_slot *memslot); 957 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 958 struct kvm_memory_slot *slot, 959 gfn_t gfn_offset, unsigned long mask); 960 void kvm_mmu_zap_all(struct kvm *kvm); 961 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 962 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 963 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 964 965 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 966 967 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 968 const void *val, int bytes); 969 970 struct kvm_irq_mask_notifier { 971 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 972 int irq; 973 struct hlist_node link; 974 }; 975 976 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 977 struct kvm_irq_mask_notifier *kimn); 978 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 979 struct kvm_irq_mask_notifier *kimn); 980 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 981 bool mask); 982 983 extern bool tdp_enabled; 984 985 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 986 987 /* control of guest tsc rate supported? */ 988 extern bool kvm_has_tsc_control; 989 /* minimum supported tsc_khz for guests */ 990 extern u32 kvm_min_guest_tsc_khz; 991 /* maximum supported tsc_khz for guests */ 992 extern u32 kvm_max_guest_tsc_khz; 993 994 enum emulation_result { 995 EMULATE_DONE, /* no further processing */ 996 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 997 EMULATE_FAIL, /* can't emulate this instruction */ 998 }; 999 1000 #define EMULTYPE_NO_DECODE (1 << 0) 1001 #define EMULTYPE_TRAP_UD (1 << 1) 1002 #define EMULTYPE_SKIP (1 << 2) 1003 #define EMULTYPE_RETRY (1 << 3) 1004 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1005 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1006 int emulation_type, void *insn, int insn_len); 1007 1008 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1009 int emulation_type) 1010 { 1011 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 1012 } 1013 1014 void kvm_enable_efer_bits(u64); 1015 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1016 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1017 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1018 1019 struct x86_emulate_ctxt; 1020 1021 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 1022 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1023 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1024 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1025 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1026 1027 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1028 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1029 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1030 1031 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1032 int reason, bool has_error_code, u32 error_code); 1033 1034 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1035 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1036 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1037 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1038 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1039 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1040 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1041 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1042 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1043 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1044 1045 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1046 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1047 1048 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1049 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1050 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1051 1052 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1053 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1054 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1055 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1056 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1057 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1058 gfn_t gfn, void *data, int offset, int len, 1059 u32 access); 1060 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1061 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1062 1063 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1064 int irq_source_id, int level) 1065 { 1066 /* Logical OR for level trig interrupt */ 1067 if (level) 1068 __set_bit(irq_source_id, irq_state); 1069 else 1070 __clear_bit(irq_source_id, irq_state); 1071 1072 return !!(*irq_state); 1073 } 1074 1075 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1076 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1077 1078 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1079 1080 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 1081 const u8 *new, int bytes); 1082 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1083 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1084 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1085 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1086 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1087 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1088 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1089 struct x86_exception *exception); 1090 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1091 struct x86_exception *exception); 1092 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1093 struct x86_exception *exception); 1094 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1095 struct x86_exception *exception); 1096 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1097 struct x86_exception *exception); 1098 1099 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1100 1101 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1102 void *insn, int insn_len); 1103 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1104 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1105 1106 void kvm_enable_tdp(void); 1107 void kvm_disable_tdp(void); 1108 1109 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1110 struct x86_exception *exception) 1111 { 1112 return gpa; 1113 } 1114 1115 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1116 { 1117 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1118 1119 return (struct kvm_mmu_page *)page_private(page); 1120 } 1121 1122 static inline u16 kvm_read_ldt(void) 1123 { 1124 u16 ldt; 1125 asm("sldt %0" : "=g"(ldt)); 1126 return ldt; 1127 } 1128 1129 static inline void kvm_load_ldt(u16 sel) 1130 { 1131 asm("lldt %0" : : "rm"(sel)); 1132 } 1133 1134 #ifdef CONFIG_X86_64 1135 static inline unsigned long read_msr(unsigned long msr) 1136 { 1137 u64 value; 1138 1139 rdmsrl(msr, value); 1140 return value; 1141 } 1142 #endif 1143 1144 static inline u32 get_rdx_init_val(void) 1145 { 1146 return 0x600; /* P6 family */ 1147 } 1148 1149 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1150 { 1151 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1152 } 1153 1154 static inline u64 get_canonical(u64 la) 1155 { 1156 return ((int64_t)la << 16) >> 16; 1157 } 1158 1159 static inline bool is_noncanonical_address(u64 la) 1160 { 1161 #ifdef CONFIG_X86_64 1162 return get_canonical(la) != la; 1163 #else 1164 return false; 1165 #endif 1166 } 1167 1168 #define TSS_IOPB_BASE_OFFSET 0x66 1169 #define TSS_BASE_SIZE 0x68 1170 #define TSS_IOPB_SIZE (65536 / 8) 1171 #define TSS_REDIRECTION_SIZE (256 / 8) 1172 #define RMODE_TSS_SIZE \ 1173 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1174 1175 enum { 1176 TASK_SWITCH_CALL = 0, 1177 TASK_SWITCH_IRET = 1, 1178 TASK_SWITCH_JMP = 2, 1179 TASK_SWITCH_GATE = 3, 1180 }; 1181 1182 #define HF_GIF_MASK (1 << 0) 1183 #define HF_HIF_MASK (1 << 1) 1184 #define HF_VINTR_MASK (1 << 2) 1185 #define HF_NMI_MASK (1 << 3) 1186 #define HF_IRET_MASK (1 << 4) 1187 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1188 #define HF_SMM_MASK (1 << 6) 1189 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1190 1191 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1192 #define KVM_ADDRESS_SPACE_NUM 2 1193 1194 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1195 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1196 1197 /* 1198 * Hardware virtualization extension instructions may fault if a 1199 * reboot turns off virtualization while processes are running. 1200 * Trap the fault and ignore the instruction if that happens. 1201 */ 1202 asmlinkage void kvm_spurious_fault(void); 1203 1204 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1205 "666: " insn "\n\t" \ 1206 "668: \n\t" \ 1207 ".pushsection .fixup, \"ax\" \n" \ 1208 "667: \n\t" \ 1209 cleanup_insn "\n\t" \ 1210 "cmpb $0, kvm_rebooting \n\t" \ 1211 "jne 668b \n\t" \ 1212 __ASM_SIZE(push) " $666b \n\t" \ 1213 "call kvm_spurious_fault \n\t" \ 1214 ".popsection \n\t" \ 1215 _ASM_EXTABLE(666b, 667b) 1216 1217 #define __kvm_handle_fault_on_reboot(insn) \ 1218 ____kvm_handle_fault_on_reboot(insn, "") 1219 1220 #define KVM_ARCH_WANT_MMU_NOTIFIER 1221 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1222 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1223 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1224 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1225 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1226 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1227 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1228 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1229 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1230 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1231 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1232 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1233 unsigned long address); 1234 1235 void kvm_define_shared_msr(unsigned index, u32 msr); 1236 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1237 1238 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1239 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1240 1241 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1242 struct kvm_async_pf *work); 1243 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1244 struct kvm_async_pf *work); 1245 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1246 struct kvm_async_pf *work); 1247 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1248 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1249 1250 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1251 1252 int kvm_is_in_guest(void); 1253 1254 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1255 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1256 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1257 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1258 1259 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1260 struct kvm_vcpu **dest_vcpu); 1261 1262 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, 1263 struct kvm_lapic_irq *irq); 1264 1265 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 1266 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 1267 1268 #endif /* _ASM_X86_KVM_HOST_H */ 1269