1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 28 #include <asm/pvclock-abi.h> 29 #include <asm/desc.h> 30 #include <asm/mtrr.h> 31 #include <asm/msr-index.h> 32 #include <asm/asm.h> 33 34 #define KVM_MAX_VCPUS 255 35 #define KVM_SOFT_MAX_VCPUS 160 36 #define KVM_USER_MEM_SLOTS 509 37 /* memory slots that are not exposed to userspace */ 38 #define KVM_PRIVATE_MEM_SLOTS 3 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41 #define KVM_PIO_PAGE_OFFSET 1 42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 43 44 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 45 46 #define CR0_RESERVED_BITS \ 47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 50 51 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 52 #define CR3_PCID_INVD BIT_64(63) 53 #define CR4_RESERVED_BITS \ 54 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 55 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 56 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 57 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 58 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) 59 60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 61 62 63 64 #define INVALID_PAGE (~(hpa_t)0) 65 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 66 67 #define UNMAPPED_GVA (~(gpa_t)0) 68 69 /* KVM Hugepage definitions for x86 */ 70 #define KVM_NR_PAGE_SIZES 3 71 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 72 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 73 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 74 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 75 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 76 77 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 78 { 79 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 80 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 81 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 82 } 83 84 #define SELECTOR_TI_MASK (1 << 2) 85 #define SELECTOR_RPL_MASK 0x03 86 87 #define IOPL_SHIFT 12 88 89 #define KVM_PERMILLE_MMU_PAGES 20 90 #define KVM_MIN_ALLOC_MMU_PAGES 64 91 #define KVM_MMU_HASH_SHIFT 10 92 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 93 #define KVM_MIN_FREE_MMU_PAGES 5 94 #define KVM_REFILL_PAGES 25 95 #define KVM_MAX_CPUID_ENTRIES 80 96 #define KVM_NR_FIXED_MTRR_REGION 88 97 #define KVM_NR_VAR_MTRR 8 98 99 #define ASYNC_PF_PER_VCPU 64 100 101 enum kvm_reg { 102 VCPU_REGS_RAX = 0, 103 VCPU_REGS_RCX = 1, 104 VCPU_REGS_RDX = 2, 105 VCPU_REGS_RBX = 3, 106 VCPU_REGS_RSP = 4, 107 VCPU_REGS_RBP = 5, 108 VCPU_REGS_RSI = 6, 109 VCPU_REGS_RDI = 7, 110 #ifdef CONFIG_X86_64 111 VCPU_REGS_R8 = 8, 112 VCPU_REGS_R9 = 9, 113 VCPU_REGS_R10 = 10, 114 VCPU_REGS_R11 = 11, 115 VCPU_REGS_R12 = 12, 116 VCPU_REGS_R13 = 13, 117 VCPU_REGS_R14 = 14, 118 VCPU_REGS_R15 = 15, 119 #endif 120 VCPU_REGS_RIP, 121 NR_VCPU_REGS 122 }; 123 124 enum kvm_reg_ex { 125 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 126 VCPU_EXREG_CR3, 127 VCPU_EXREG_RFLAGS, 128 VCPU_EXREG_SEGMENTS, 129 }; 130 131 enum { 132 VCPU_SREG_ES, 133 VCPU_SREG_CS, 134 VCPU_SREG_SS, 135 VCPU_SREG_DS, 136 VCPU_SREG_FS, 137 VCPU_SREG_GS, 138 VCPU_SREG_TR, 139 VCPU_SREG_LDTR, 140 }; 141 142 #include <asm/kvm_emulate.h> 143 144 #define KVM_NR_MEM_OBJS 40 145 146 #define KVM_NR_DB_REGS 4 147 148 #define DR6_BD (1 << 13) 149 #define DR6_BS (1 << 14) 150 #define DR6_RTM (1 << 16) 151 #define DR6_FIXED_1 0xfffe0ff0 152 #define DR6_INIT 0xffff0ff0 153 #define DR6_VOLATILE 0x0001e00f 154 155 #define DR7_BP_EN_MASK 0x000000ff 156 #define DR7_GE (1 << 9) 157 #define DR7_GD (1 << 13) 158 #define DR7_FIXED_1 0x00000400 159 #define DR7_VOLATILE 0xffff2bff 160 161 #define PFERR_PRESENT_BIT 0 162 #define PFERR_WRITE_BIT 1 163 #define PFERR_USER_BIT 2 164 #define PFERR_RSVD_BIT 3 165 #define PFERR_FETCH_BIT 4 166 167 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 168 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 169 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 170 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 171 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 172 173 /* apic attention bits */ 174 #define KVM_APIC_CHECK_VAPIC 0 175 /* 176 * The following bit is set with PV-EOI, unset on EOI. 177 * We detect PV-EOI changes by guest by comparing 178 * this bit with PV-EOI in guest memory. 179 * See the implementation in apic_update_pv_eoi. 180 */ 181 #define KVM_APIC_PV_EOI_PENDING 1 182 183 /* 184 * We don't want allocation failures within the mmu code, so we preallocate 185 * enough memory for a single page fault in a cache. 186 */ 187 struct kvm_mmu_memory_cache { 188 int nobjs; 189 void *objects[KVM_NR_MEM_OBJS]; 190 }; 191 192 /* 193 * kvm_mmu_page_role, below, is defined as: 194 * 195 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 196 * bits 4:7 - page table level for this shadow (1-4) 197 * bits 8:9 - page table quadrant for 2-level guests 198 * bit 16 - direct mapping of virtual to physical mapping at gfn 199 * used for real mode and two-dimensional paging 200 * bits 17:19 - common access permissions for all ptes in this shadow page 201 */ 202 union kvm_mmu_page_role { 203 unsigned word; 204 struct { 205 unsigned level:4; 206 unsigned cr4_pae:1; 207 unsigned quadrant:2; 208 unsigned pad_for_nice_hex_output:6; 209 unsigned direct:1; 210 unsigned access:3; 211 unsigned invalid:1; 212 unsigned nxe:1; 213 unsigned cr0_wp:1; 214 unsigned smep_andnot_wp:1; 215 }; 216 }; 217 218 struct kvm_mmu_page { 219 struct list_head link; 220 struct hlist_node hash_link; 221 222 /* 223 * The following two entries are used to key the shadow page in the 224 * hash table. 225 */ 226 gfn_t gfn; 227 union kvm_mmu_page_role role; 228 229 u64 *spt; 230 /* hold the gfn of each spte inside spt */ 231 gfn_t *gfns; 232 bool unsync; 233 int root_count; /* Currently serving as active root */ 234 unsigned int unsync_children; 235 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 236 237 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 238 unsigned long mmu_valid_gen; 239 240 DECLARE_BITMAP(unsync_child_bitmap, 512); 241 242 #ifdef CONFIG_X86_32 243 /* 244 * Used out of the mmu-lock to avoid reading spte values while an 245 * update is in progress; see the comments in __get_spte_lockless(). 246 */ 247 int clear_spte_count; 248 #endif 249 250 /* Number of writes since the last time traversal visited this page. */ 251 int write_flooding_count; 252 }; 253 254 struct kvm_pio_request { 255 unsigned long count; 256 int in; 257 int port; 258 int size; 259 }; 260 261 /* 262 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 263 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 264 * mode. 265 */ 266 struct kvm_mmu { 267 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 268 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 269 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 270 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 271 bool prefault); 272 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 273 struct x86_exception *fault); 274 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 275 struct x86_exception *exception); 276 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 277 struct x86_exception *exception); 278 int (*sync_page)(struct kvm_vcpu *vcpu, 279 struct kvm_mmu_page *sp); 280 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 281 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 282 u64 *spte, const void *pte); 283 hpa_t root_hpa; 284 int root_level; 285 int shadow_root_level; 286 union kvm_mmu_page_role base_role; 287 bool direct_map; 288 289 /* 290 * Bitmap; bit set = permission fault 291 * Byte index: page fault error code [4:1] 292 * Bit index: pte permissions in ACC_* format 293 */ 294 u8 permissions[16]; 295 296 u64 *pae_root; 297 u64 *lm_root; 298 u64 rsvd_bits_mask[2][4]; 299 u64 bad_mt_xwr; 300 301 /* 302 * Bitmap: bit set = last pte in walk 303 * index[0:1]: level (zero-based) 304 * index[2]: pte.ps 305 */ 306 u8 last_pte_bitmap; 307 308 bool nx; 309 310 u64 pdptrs[4]; /* pae */ 311 }; 312 313 enum pmc_type { 314 KVM_PMC_GP = 0, 315 KVM_PMC_FIXED, 316 }; 317 318 struct kvm_pmc { 319 enum pmc_type type; 320 u8 idx; 321 u64 counter; 322 u64 eventsel; 323 struct perf_event *perf_event; 324 struct kvm_vcpu *vcpu; 325 }; 326 327 struct kvm_pmu { 328 unsigned nr_arch_gp_counters; 329 unsigned nr_arch_fixed_counters; 330 unsigned available_event_types; 331 u64 fixed_ctr_ctrl; 332 u64 global_ctrl; 333 u64 global_status; 334 u64 global_ovf_ctrl; 335 u64 counter_bitmask[2]; 336 u64 global_ctrl_mask; 337 u64 reserved_bits; 338 u8 version; 339 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 340 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 341 struct irq_work irq_work; 342 u64 reprogram_pmi; 343 }; 344 345 enum { 346 KVM_DEBUGREG_BP_ENABLED = 1, 347 KVM_DEBUGREG_WONT_EXIT = 2, 348 }; 349 350 struct kvm_vcpu_arch { 351 /* 352 * rip and regs accesses must go through 353 * kvm_{register,rip}_{read,write} functions. 354 */ 355 unsigned long regs[NR_VCPU_REGS]; 356 u32 regs_avail; 357 u32 regs_dirty; 358 359 unsigned long cr0; 360 unsigned long cr0_guest_owned_bits; 361 unsigned long cr2; 362 unsigned long cr3; 363 unsigned long cr4; 364 unsigned long cr4_guest_owned_bits; 365 unsigned long cr8; 366 u32 hflags; 367 u64 efer; 368 u64 apic_base; 369 struct kvm_lapic *apic; /* kernel irqchip context */ 370 unsigned long apic_attention; 371 int32_t apic_arb_prio; 372 int mp_state; 373 u64 ia32_misc_enable_msr; 374 bool tpr_access_reporting; 375 u64 ia32_xss; 376 377 /* 378 * Paging state of the vcpu 379 * 380 * If the vcpu runs in guest mode with two level paging this still saves 381 * the paging mode of the l1 guest. This context is always used to 382 * handle faults. 383 */ 384 struct kvm_mmu mmu; 385 386 /* 387 * Paging state of an L2 guest (used for nested npt) 388 * 389 * This context will save all necessary information to walk page tables 390 * of the an L2 guest. This context is only initialized for page table 391 * walking and not for faulting since we never handle l2 page faults on 392 * the host. 393 */ 394 struct kvm_mmu nested_mmu; 395 396 /* 397 * Pointer to the mmu context currently used for 398 * gva_to_gpa translations. 399 */ 400 struct kvm_mmu *walk_mmu; 401 402 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 403 struct kvm_mmu_memory_cache mmu_page_cache; 404 struct kvm_mmu_memory_cache mmu_page_header_cache; 405 406 struct fpu guest_fpu; 407 u64 xcr0; 408 u64 guest_supported_xcr0; 409 u32 guest_xstate_size; 410 411 struct kvm_pio_request pio; 412 void *pio_data; 413 414 u8 event_exit_inst_len; 415 416 struct kvm_queued_exception { 417 bool pending; 418 bool has_error_code; 419 bool reinject; 420 u8 nr; 421 u32 error_code; 422 } exception; 423 424 struct kvm_queued_interrupt { 425 bool pending; 426 bool soft; 427 u8 nr; 428 } interrupt; 429 430 int halt_request; /* real mode on Intel only */ 431 432 int cpuid_nent; 433 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 434 /* emulate context */ 435 436 struct x86_emulate_ctxt emulate_ctxt; 437 bool emulate_regs_need_sync_to_vcpu; 438 bool emulate_regs_need_sync_from_vcpu; 439 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 440 441 gpa_t time; 442 struct pvclock_vcpu_time_info hv_clock; 443 unsigned int hw_tsc_khz; 444 struct gfn_to_hva_cache pv_time; 445 bool pv_time_enabled; 446 /* set guest stopped flag in pvclock flags field */ 447 bool pvclock_set_guest_stopped_request; 448 449 struct { 450 u64 msr_val; 451 u64 last_steal; 452 u64 accum_steal; 453 struct gfn_to_hva_cache stime; 454 struct kvm_steal_time steal; 455 } st; 456 457 u64 last_guest_tsc; 458 u64 last_host_tsc; 459 u64 tsc_offset_adjustment; 460 u64 this_tsc_nsec; 461 u64 this_tsc_write; 462 u64 this_tsc_generation; 463 bool tsc_catchup; 464 bool tsc_always_catchup; 465 s8 virtual_tsc_shift; 466 u32 virtual_tsc_mult; 467 u32 virtual_tsc_khz; 468 s64 ia32_tsc_adjust_msr; 469 470 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 471 unsigned nmi_pending; /* NMI queued after currently running handler */ 472 bool nmi_injected; /* Trying to inject an NMI this entry */ 473 474 struct mtrr_state_type mtrr_state; 475 u64 pat; 476 477 unsigned switch_db_regs; 478 unsigned long db[KVM_NR_DB_REGS]; 479 unsigned long dr6; 480 unsigned long dr7; 481 unsigned long eff_db[KVM_NR_DB_REGS]; 482 unsigned long guest_debug_dr7; 483 484 u64 mcg_cap; 485 u64 mcg_status; 486 u64 mcg_ctl; 487 u64 *mce_banks; 488 489 /* Cache MMIO info */ 490 u64 mmio_gva; 491 unsigned access; 492 gfn_t mmio_gfn; 493 u64 mmio_gen; 494 495 struct kvm_pmu pmu; 496 497 /* used for guest single stepping over the given code position */ 498 unsigned long singlestep_rip; 499 500 /* fields used by HYPER-V emulation */ 501 u64 hv_vapic; 502 503 cpumask_var_t wbinvd_dirty_mask; 504 505 unsigned long last_retry_eip; 506 unsigned long last_retry_addr; 507 508 struct { 509 bool halted; 510 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 511 struct gfn_to_hva_cache data; 512 u64 msr_val; 513 u32 id; 514 bool send_user_only; 515 } apf; 516 517 /* OSVW MSRs (AMD only) */ 518 struct { 519 u64 length; 520 u64 status; 521 } osvw; 522 523 struct { 524 u64 msr_val; 525 struct gfn_to_hva_cache data; 526 } pv_eoi; 527 528 /* 529 * Indicate whether the access faults on its page table in guest 530 * which is set when fix page fault and used to detect unhandeable 531 * instruction. 532 */ 533 bool write_fault_to_shadow_pgtable; 534 535 /* set at EPT violation at this point */ 536 unsigned long exit_qualification; 537 538 /* pv related host specific info */ 539 struct { 540 bool pv_unhalted; 541 } pv; 542 }; 543 544 struct kvm_lpage_info { 545 int write_count; 546 }; 547 548 struct kvm_arch_memory_slot { 549 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 550 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 551 }; 552 553 struct kvm_apic_map { 554 struct rcu_head rcu; 555 u8 ldr_bits; 556 /* fields bellow are used to decode ldr values in different modes */ 557 u32 cid_shift, cid_mask, lid_mask, broadcast; 558 struct kvm_lapic *phys_map[256]; 559 /* first index is cluster id second is cpu id in a cluster */ 560 struct kvm_lapic *logical_map[16][16]; 561 }; 562 563 struct kvm_arch { 564 unsigned int n_used_mmu_pages; 565 unsigned int n_requested_mmu_pages; 566 unsigned int n_max_mmu_pages; 567 unsigned int indirect_shadow_pages; 568 unsigned long mmu_valid_gen; 569 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 570 /* 571 * Hash table of struct kvm_mmu_page. 572 */ 573 struct list_head active_mmu_pages; 574 struct list_head zapped_obsolete_pages; 575 576 struct list_head assigned_dev_head; 577 struct iommu_domain *iommu_domain; 578 bool iommu_noncoherent; 579 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 580 atomic_t noncoherent_dma_count; 581 struct kvm_pic *vpic; 582 struct kvm_ioapic *vioapic; 583 struct kvm_pit *vpit; 584 int vapics_in_nmi_mode; 585 struct mutex apic_map_lock; 586 struct kvm_apic_map *apic_map; 587 588 unsigned int tss_addr; 589 bool apic_access_page_done; 590 591 gpa_t wall_clock; 592 593 bool ept_identity_pagetable_done; 594 gpa_t ept_identity_map_addr; 595 596 unsigned long irq_sources_bitmap; 597 s64 kvmclock_offset; 598 raw_spinlock_t tsc_write_lock; 599 u64 last_tsc_nsec; 600 u64 last_tsc_write; 601 u32 last_tsc_khz; 602 u64 cur_tsc_nsec; 603 u64 cur_tsc_write; 604 u64 cur_tsc_offset; 605 u64 cur_tsc_generation; 606 int nr_vcpus_matched_tsc; 607 608 spinlock_t pvclock_gtod_sync_lock; 609 bool use_master_clock; 610 u64 master_kernel_ns; 611 cycle_t master_cycle_now; 612 struct delayed_work kvmclock_update_work; 613 struct delayed_work kvmclock_sync_work; 614 615 struct kvm_xen_hvm_config xen_hvm_config; 616 617 /* reads protected by irq_srcu, writes by irq_lock */ 618 struct hlist_head mask_notifier_list; 619 620 /* fields used by HYPER-V emulation */ 621 u64 hv_guest_os_id; 622 u64 hv_hypercall; 623 u64 hv_tsc_page; 624 625 #ifdef CONFIG_KVM_MMU_AUDIT 626 int audit_point; 627 #endif 628 629 bool boot_vcpu_runs_old_kvmclock; 630 }; 631 632 struct kvm_vm_stat { 633 u32 mmu_shadow_zapped; 634 u32 mmu_pte_write; 635 u32 mmu_pte_updated; 636 u32 mmu_pde_zapped; 637 u32 mmu_flooded; 638 u32 mmu_recycled; 639 u32 mmu_cache_miss; 640 u32 mmu_unsync; 641 u32 remote_tlb_flush; 642 u32 lpages; 643 }; 644 645 struct kvm_vcpu_stat { 646 u32 pf_fixed; 647 u32 pf_guest; 648 u32 tlb_flush; 649 u32 invlpg; 650 651 u32 exits; 652 u32 io_exits; 653 u32 mmio_exits; 654 u32 signal_exits; 655 u32 irq_window_exits; 656 u32 nmi_window_exits; 657 u32 halt_exits; 658 u32 halt_successful_poll; 659 u32 halt_wakeup; 660 u32 request_irq_exits; 661 u32 irq_exits; 662 u32 host_state_reload; 663 u32 efer_reload; 664 u32 fpu_reload; 665 u32 insn_emulation; 666 u32 insn_emulation_fail; 667 u32 hypercalls; 668 u32 irq_injections; 669 u32 nmi_injections; 670 }; 671 672 struct x86_instruction_info; 673 674 struct msr_data { 675 bool host_initiated; 676 u32 index; 677 u64 data; 678 }; 679 680 struct kvm_lapic_irq { 681 u32 vector; 682 u32 delivery_mode; 683 u32 dest_mode; 684 u32 level; 685 u32 trig_mode; 686 u32 shorthand; 687 u32 dest_id; 688 }; 689 690 struct kvm_x86_ops { 691 int (*cpu_has_kvm_support)(void); /* __init */ 692 int (*disabled_by_bios)(void); /* __init */ 693 int (*hardware_enable)(void); 694 void (*hardware_disable)(void); 695 void (*check_processor_compatibility)(void *rtn); 696 int (*hardware_setup)(void); /* __init */ 697 void (*hardware_unsetup)(void); /* __exit */ 698 bool (*cpu_has_accelerated_tpr)(void); 699 void (*cpuid_update)(struct kvm_vcpu *vcpu); 700 701 /* Create, but do not attach this VCPU */ 702 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 703 void (*vcpu_free)(struct kvm_vcpu *vcpu); 704 void (*vcpu_reset)(struct kvm_vcpu *vcpu); 705 706 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 707 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 708 void (*vcpu_put)(struct kvm_vcpu *vcpu); 709 710 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 711 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 712 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 713 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 714 void (*get_segment)(struct kvm_vcpu *vcpu, 715 struct kvm_segment *var, int seg); 716 int (*get_cpl)(struct kvm_vcpu *vcpu); 717 void (*set_segment)(struct kvm_vcpu *vcpu, 718 struct kvm_segment *var, int seg); 719 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 720 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 721 void (*decache_cr3)(struct kvm_vcpu *vcpu); 722 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 723 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 724 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 725 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 726 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 727 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 728 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 729 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 730 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 731 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 732 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 733 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 734 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 735 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 736 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 737 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 738 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 739 740 void (*tlb_flush)(struct kvm_vcpu *vcpu); 741 742 void (*run)(struct kvm_vcpu *vcpu); 743 int (*handle_exit)(struct kvm_vcpu *vcpu); 744 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 745 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 746 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 747 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 748 unsigned char *hypercall_addr); 749 void (*set_irq)(struct kvm_vcpu *vcpu); 750 void (*set_nmi)(struct kvm_vcpu *vcpu); 751 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 752 bool has_error_code, u32 error_code, 753 bool reinject); 754 void (*cancel_injection)(struct kvm_vcpu *vcpu); 755 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 756 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 757 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 758 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 759 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 760 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 761 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 762 int (*vm_has_apicv)(struct kvm *kvm); 763 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 764 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 765 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 766 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 767 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 768 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 769 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 770 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 771 int (*get_tdp_level)(void); 772 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 773 int (*get_lpage_level)(void); 774 bool (*rdtscp_supported)(void); 775 bool (*invpcid_supported)(void); 776 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 777 778 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 779 780 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 781 782 bool (*has_wbinvd_exit)(void); 783 784 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 785 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 786 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 787 788 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 789 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 790 791 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 792 793 int (*check_intercept)(struct kvm_vcpu *vcpu, 794 struct x86_instruction_info *info, 795 enum x86_intercept_stage stage); 796 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 797 bool (*mpx_supported)(void); 798 bool (*xsaves_supported)(void); 799 800 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 801 802 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 803 804 /* 805 * Arch-specific dirty logging hooks. These hooks are only supposed to 806 * be valid if the specific arch has hardware-accelerated dirty logging 807 * mechanism. Currently only for PML on VMX. 808 * 809 * - slot_enable_log_dirty: 810 * called when enabling log dirty mode for the slot. 811 * - slot_disable_log_dirty: 812 * called when disabling log dirty mode for the slot. 813 * also called when slot is created with log dirty disabled. 814 * - flush_log_dirty: 815 * called before reporting dirty_bitmap to userspace. 816 * - enable_log_dirty_pt_masked: 817 * called when reenabling log dirty for the GFNs in the mask after 818 * corresponding bits are cleared in slot->dirty_bitmap. 819 */ 820 void (*slot_enable_log_dirty)(struct kvm *kvm, 821 struct kvm_memory_slot *slot); 822 void (*slot_disable_log_dirty)(struct kvm *kvm, 823 struct kvm_memory_slot *slot); 824 void (*flush_log_dirty)(struct kvm *kvm); 825 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 826 struct kvm_memory_slot *slot, 827 gfn_t offset, unsigned long mask); 828 }; 829 830 struct kvm_arch_async_pf { 831 u32 token; 832 gfn_t gfn; 833 unsigned long cr3; 834 bool direct_map; 835 }; 836 837 extern struct kvm_x86_ops *kvm_x86_ops; 838 839 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 840 s64 adjustment) 841 { 842 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 843 } 844 845 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 846 { 847 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 848 } 849 850 int kvm_mmu_module_init(void); 851 void kvm_mmu_module_exit(void); 852 853 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 854 int kvm_mmu_create(struct kvm_vcpu *vcpu); 855 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 856 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 857 u64 dirty_mask, u64 nx_mask, u64 x_mask); 858 859 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 860 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 861 struct kvm_memory_slot *memslot); 862 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 863 struct kvm_memory_slot *memslot); 864 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 865 struct kvm_memory_slot *memslot); 866 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 867 struct kvm_memory_slot *memslot); 868 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 869 struct kvm_memory_slot *slot, 870 gfn_t gfn_offset, unsigned long mask); 871 void kvm_mmu_zap_all(struct kvm *kvm); 872 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm); 873 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 874 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 875 876 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 877 878 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 879 const void *val, int bytes); 880 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 881 882 struct kvm_irq_mask_notifier { 883 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 884 int irq; 885 struct hlist_node link; 886 }; 887 888 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 889 struct kvm_irq_mask_notifier *kimn); 890 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 891 struct kvm_irq_mask_notifier *kimn); 892 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 893 bool mask); 894 895 extern bool tdp_enabled; 896 897 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 898 899 /* control of guest tsc rate supported? */ 900 extern bool kvm_has_tsc_control; 901 /* minimum supported tsc_khz for guests */ 902 extern u32 kvm_min_guest_tsc_khz; 903 /* maximum supported tsc_khz for guests */ 904 extern u32 kvm_max_guest_tsc_khz; 905 906 enum emulation_result { 907 EMULATE_DONE, /* no further processing */ 908 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 909 EMULATE_FAIL, /* can't emulate this instruction */ 910 }; 911 912 #define EMULTYPE_NO_DECODE (1 << 0) 913 #define EMULTYPE_TRAP_UD (1 << 1) 914 #define EMULTYPE_SKIP (1 << 2) 915 #define EMULTYPE_RETRY (1 << 3) 916 #define EMULTYPE_NO_REEXECUTE (1 << 4) 917 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 918 int emulation_type, void *insn, int insn_len); 919 920 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 921 int emulation_type) 922 { 923 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 924 } 925 926 void kvm_enable_efer_bits(u64); 927 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 928 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 929 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 930 931 struct x86_emulate_ctxt; 932 933 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 934 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 935 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 936 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 937 938 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 939 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 940 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 941 942 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 943 int reason, bool has_error_code, u32 error_code); 944 945 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 946 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 947 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 948 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 949 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 950 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 951 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 952 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 953 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 954 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 955 956 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 957 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 958 959 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 960 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 961 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 962 963 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 964 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 965 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 966 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 967 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 968 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 969 gfn_t gfn, void *data, int offset, int len, 970 u32 access); 971 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 972 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 973 974 static inline int __kvm_irq_line_state(unsigned long *irq_state, 975 int irq_source_id, int level) 976 { 977 /* Logical OR for level trig interrupt */ 978 if (level) 979 __set_bit(irq_source_id, irq_state); 980 else 981 __clear_bit(irq_source_id, irq_state); 982 983 return !!(*irq_state); 984 } 985 986 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 987 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 988 989 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 990 991 int fx_init(struct kvm_vcpu *vcpu); 992 993 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 994 const u8 *new, int bytes); 995 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 996 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 997 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 998 int kvm_mmu_load(struct kvm_vcpu *vcpu); 999 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1000 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1001 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1002 struct x86_exception *exception); 1003 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1004 struct x86_exception *exception); 1005 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1006 struct x86_exception *exception); 1007 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1008 struct x86_exception *exception); 1009 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1010 struct x86_exception *exception); 1011 1012 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1013 1014 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1015 void *insn, int insn_len); 1016 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1017 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1018 1019 void kvm_enable_tdp(void); 1020 void kvm_disable_tdp(void); 1021 1022 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1023 struct x86_exception *exception) 1024 { 1025 return gpa; 1026 } 1027 1028 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1029 { 1030 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1031 1032 return (struct kvm_mmu_page *)page_private(page); 1033 } 1034 1035 static inline u16 kvm_read_ldt(void) 1036 { 1037 u16 ldt; 1038 asm("sldt %0" : "=g"(ldt)); 1039 return ldt; 1040 } 1041 1042 static inline void kvm_load_ldt(u16 sel) 1043 { 1044 asm("lldt %0" : : "rm"(sel)); 1045 } 1046 1047 #ifdef CONFIG_X86_64 1048 static inline unsigned long read_msr(unsigned long msr) 1049 { 1050 u64 value; 1051 1052 rdmsrl(msr, value); 1053 return value; 1054 } 1055 #endif 1056 1057 static inline u32 get_rdx_init_val(void) 1058 { 1059 return 0x600; /* P6 family */ 1060 } 1061 1062 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1063 { 1064 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1065 } 1066 1067 static inline u64 get_canonical(u64 la) 1068 { 1069 return ((int64_t)la << 16) >> 16; 1070 } 1071 1072 static inline bool is_noncanonical_address(u64 la) 1073 { 1074 #ifdef CONFIG_X86_64 1075 return get_canonical(la) != la; 1076 #else 1077 return false; 1078 #endif 1079 } 1080 1081 #define TSS_IOPB_BASE_OFFSET 0x66 1082 #define TSS_BASE_SIZE 0x68 1083 #define TSS_IOPB_SIZE (65536 / 8) 1084 #define TSS_REDIRECTION_SIZE (256 / 8) 1085 #define RMODE_TSS_SIZE \ 1086 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1087 1088 enum { 1089 TASK_SWITCH_CALL = 0, 1090 TASK_SWITCH_IRET = 1, 1091 TASK_SWITCH_JMP = 2, 1092 TASK_SWITCH_GATE = 3, 1093 }; 1094 1095 #define HF_GIF_MASK (1 << 0) 1096 #define HF_HIF_MASK (1 << 1) 1097 #define HF_VINTR_MASK (1 << 2) 1098 #define HF_NMI_MASK (1 << 3) 1099 #define HF_IRET_MASK (1 << 4) 1100 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1101 1102 /* 1103 * Hardware virtualization extension instructions may fault if a 1104 * reboot turns off virtualization while processes are running. 1105 * Trap the fault and ignore the instruction if that happens. 1106 */ 1107 asmlinkage void kvm_spurious_fault(void); 1108 1109 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1110 "666: " insn "\n\t" \ 1111 "668: \n\t" \ 1112 ".pushsection .fixup, \"ax\" \n" \ 1113 "667: \n\t" \ 1114 cleanup_insn "\n\t" \ 1115 "cmpb $0, kvm_rebooting \n\t" \ 1116 "jne 668b \n\t" \ 1117 __ASM_SIZE(push) " $666b \n\t" \ 1118 "call kvm_spurious_fault \n\t" \ 1119 ".popsection \n\t" \ 1120 _ASM_EXTABLE(666b, 667b) 1121 1122 #define __kvm_handle_fault_on_reboot(insn) \ 1123 ____kvm_handle_fault_on_reboot(insn, "") 1124 1125 #define KVM_ARCH_WANT_MMU_NOTIFIER 1126 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1127 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1128 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1129 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1130 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1131 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); 1132 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1133 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1134 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1135 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1136 void kvm_vcpu_reset(struct kvm_vcpu *vcpu); 1137 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1138 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1139 unsigned long address); 1140 1141 void kvm_define_shared_msr(unsigned index, u32 msr); 1142 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1143 1144 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1145 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1146 1147 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1148 struct kvm_async_pf *work); 1149 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1150 struct kvm_async_pf *work); 1151 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1152 struct kvm_async_pf *work); 1153 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1154 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1155 1156 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1157 1158 int kvm_is_in_guest(void); 1159 1160 void kvm_pmu_init(struct kvm_vcpu *vcpu); 1161 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1162 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1163 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1164 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1165 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1166 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 1167 int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc); 1168 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1169 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1170 void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1171 1172 #endif /* _ASM_X86_KVM_HOST_H */ 1173