xref: /linux/arch/x86/include/asm/kvm_host.h (revision cf2f33a4e54096f90652cca3511fd6a456ea5abe)
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This header defines architecture specific interfaces, x86 version
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  */
10 
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
27 
28 #include <asm/pvclock-abi.h>
29 #include <asm/desc.h>
30 #include <asm/mtrr.h>
31 #include <asm/msr-index.h>
32 #include <asm/asm.h>
33 
34 #define KVM_MAX_VCPUS 255
35 #define KVM_SOFT_MAX_VCPUS 160
36 #define KVM_USER_MEM_SLOTS 509
37 /* memory slots that are not exposed to userspace */
38 #define KVM_PRIVATE_MEM_SLOTS 3
39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40 
41 #define KVM_PIO_PAGE_OFFSET 1
42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
43 
44 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
45 
46 #define CR0_RESERVED_BITS                                               \
47 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
48 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
49 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
50 
51 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
52 #define CR3_PCID_INVD		 BIT_64(63)
53 #define CR4_RESERVED_BITS                                               \
54 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
55 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
56 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
57 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
58 			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
59 
60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
61 
62 
63 
64 #define INVALID_PAGE (~(hpa_t)0)
65 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
66 
67 #define UNMAPPED_GVA (~(gpa_t)0)
68 
69 /* KVM Hugepage definitions for x86 */
70 #define KVM_NR_PAGE_SIZES	3
71 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
72 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
73 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
74 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
75 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
76 
77 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
78 {
79 	/* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
80 	return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
81 		(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
82 }
83 
84 #define KVM_PERMILLE_MMU_PAGES 20
85 #define KVM_MIN_ALLOC_MMU_PAGES 64
86 #define KVM_MMU_HASH_SHIFT 10
87 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
88 #define KVM_MIN_FREE_MMU_PAGES 5
89 #define KVM_REFILL_PAGES 25
90 #define KVM_MAX_CPUID_ENTRIES 80
91 #define KVM_NR_FIXED_MTRR_REGION 88
92 #define KVM_NR_VAR_MTRR 8
93 
94 #define ASYNC_PF_PER_VCPU 64
95 
96 enum kvm_reg {
97 	VCPU_REGS_RAX = 0,
98 	VCPU_REGS_RCX = 1,
99 	VCPU_REGS_RDX = 2,
100 	VCPU_REGS_RBX = 3,
101 	VCPU_REGS_RSP = 4,
102 	VCPU_REGS_RBP = 5,
103 	VCPU_REGS_RSI = 6,
104 	VCPU_REGS_RDI = 7,
105 #ifdef CONFIG_X86_64
106 	VCPU_REGS_R8 = 8,
107 	VCPU_REGS_R9 = 9,
108 	VCPU_REGS_R10 = 10,
109 	VCPU_REGS_R11 = 11,
110 	VCPU_REGS_R12 = 12,
111 	VCPU_REGS_R13 = 13,
112 	VCPU_REGS_R14 = 14,
113 	VCPU_REGS_R15 = 15,
114 #endif
115 	VCPU_REGS_RIP,
116 	NR_VCPU_REGS
117 };
118 
119 enum kvm_reg_ex {
120 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
121 	VCPU_EXREG_CR3,
122 	VCPU_EXREG_RFLAGS,
123 	VCPU_EXREG_SEGMENTS,
124 };
125 
126 enum {
127 	VCPU_SREG_ES,
128 	VCPU_SREG_CS,
129 	VCPU_SREG_SS,
130 	VCPU_SREG_DS,
131 	VCPU_SREG_FS,
132 	VCPU_SREG_GS,
133 	VCPU_SREG_TR,
134 	VCPU_SREG_LDTR,
135 };
136 
137 #include <asm/kvm_emulate.h>
138 
139 #define KVM_NR_MEM_OBJS 40
140 
141 #define KVM_NR_DB_REGS	4
142 
143 #define DR6_BD		(1 << 13)
144 #define DR6_BS		(1 << 14)
145 #define DR6_RTM		(1 << 16)
146 #define DR6_FIXED_1	0xfffe0ff0
147 #define DR6_INIT	0xffff0ff0
148 #define DR6_VOLATILE	0x0001e00f
149 
150 #define DR7_BP_EN_MASK	0x000000ff
151 #define DR7_GE		(1 << 9)
152 #define DR7_GD		(1 << 13)
153 #define DR7_FIXED_1	0x00000400
154 #define DR7_VOLATILE	0xffff2bff
155 
156 #define PFERR_PRESENT_BIT 0
157 #define PFERR_WRITE_BIT 1
158 #define PFERR_USER_BIT 2
159 #define PFERR_RSVD_BIT 3
160 #define PFERR_FETCH_BIT 4
161 
162 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
163 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
164 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
165 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
166 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
167 
168 /* apic attention bits */
169 #define KVM_APIC_CHECK_VAPIC	0
170 /*
171  * The following bit is set with PV-EOI, unset on EOI.
172  * We detect PV-EOI changes by guest by comparing
173  * this bit with PV-EOI in guest memory.
174  * See the implementation in apic_update_pv_eoi.
175  */
176 #define KVM_APIC_PV_EOI_PENDING	1
177 
178 /*
179  * We don't want allocation failures within the mmu code, so we preallocate
180  * enough memory for a single page fault in a cache.
181  */
182 struct kvm_mmu_memory_cache {
183 	int nobjs;
184 	void *objects[KVM_NR_MEM_OBJS];
185 };
186 
187 union kvm_mmu_page_role {
188 	unsigned word;
189 	struct {
190 		unsigned level:4;
191 		unsigned cr4_pae:1;
192 		unsigned quadrant:2;
193 		unsigned direct:1;
194 		unsigned access:3;
195 		unsigned invalid:1;
196 		unsigned nxe:1;
197 		unsigned cr0_wp:1;
198 		unsigned smep_andnot_wp:1;
199 		unsigned smap_andnot_wp:1;
200 		unsigned :8;
201 
202 		/*
203 		 * This is left at the top of the word so that
204 		 * kvm_memslots_for_spte_role can extract it with a
205 		 * simple shift.  While there is room, give it a whole
206 		 * byte so it is also faster to load it from memory.
207 		 */
208 		unsigned smm:8;
209 	};
210 };
211 
212 struct kvm_mmu_page {
213 	struct list_head link;
214 	struct hlist_node hash_link;
215 
216 	/*
217 	 * The following two entries are used to key the shadow page in the
218 	 * hash table.
219 	 */
220 	gfn_t gfn;
221 	union kvm_mmu_page_role role;
222 
223 	u64 *spt;
224 	/* hold the gfn of each spte inside spt */
225 	gfn_t *gfns;
226 	bool unsync;
227 	int root_count;          /* Currently serving as active root */
228 	unsigned int unsync_children;
229 	unsigned long parent_ptes;	/* Reverse mapping for parent_pte */
230 
231 	/* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
232 	unsigned long mmu_valid_gen;
233 
234 	DECLARE_BITMAP(unsync_child_bitmap, 512);
235 
236 #ifdef CONFIG_X86_32
237 	/*
238 	 * Used out of the mmu-lock to avoid reading spte values while an
239 	 * update is in progress; see the comments in __get_spte_lockless().
240 	 */
241 	int clear_spte_count;
242 #endif
243 
244 	/* Number of writes since the last time traversal visited this page.  */
245 	int write_flooding_count;
246 };
247 
248 struct kvm_pio_request {
249 	unsigned long count;
250 	int in;
251 	int port;
252 	int size;
253 };
254 
255 struct rsvd_bits_validate {
256 	u64 rsvd_bits_mask[2][4];
257 	u64 bad_mt_xwr;
258 };
259 
260 /*
261  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
262  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
263  * mode.
264  */
265 struct kvm_mmu {
266 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
267 	unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
268 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
269 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
270 			  bool prefault);
271 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
272 				  struct x86_exception *fault);
273 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
274 			    struct x86_exception *exception);
275 	gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
276 			       struct x86_exception *exception);
277 	int (*sync_page)(struct kvm_vcpu *vcpu,
278 			 struct kvm_mmu_page *sp);
279 	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
280 	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
281 			   u64 *spte, const void *pte);
282 	hpa_t root_hpa;
283 	int root_level;
284 	int shadow_root_level;
285 	union kvm_mmu_page_role base_role;
286 	bool direct_map;
287 
288 	/*
289 	 * Bitmap; bit set = permission fault
290 	 * Byte index: page fault error code [4:1]
291 	 * Bit index: pte permissions in ACC_* format
292 	 */
293 	u8 permissions[16];
294 
295 	u64 *pae_root;
296 	u64 *lm_root;
297 
298 	/*
299 	 * check zero bits on shadow page table entries, these
300 	 * bits include not only hardware reserved bits but also
301 	 * the bits spte never used.
302 	 */
303 	struct rsvd_bits_validate shadow_zero_check;
304 
305 	struct rsvd_bits_validate guest_rsvd_check;
306 
307 	/*
308 	 * Bitmap: bit set = last pte in walk
309 	 * index[0:1]: level (zero-based)
310 	 * index[2]: pte.ps
311 	 */
312 	u8 last_pte_bitmap;
313 
314 	bool nx;
315 
316 	u64 pdptrs[4]; /* pae */
317 };
318 
319 enum pmc_type {
320 	KVM_PMC_GP = 0,
321 	KVM_PMC_FIXED,
322 };
323 
324 struct kvm_pmc {
325 	enum pmc_type type;
326 	u8 idx;
327 	u64 counter;
328 	u64 eventsel;
329 	struct perf_event *perf_event;
330 	struct kvm_vcpu *vcpu;
331 };
332 
333 struct kvm_pmu {
334 	unsigned nr_arch_gp_counters;
335 	unsigned nr_arch_fixed_counters;
336 	unsigned available_event_types;
337 	u64 fixed_ctr_ctrl;
338 	u64 global_ctrl;
339 	u64 global_status;
340 	u64 global_ovf_ctrl;
341 	u64 counter_bitmask[2];
342 	u64 global_ctrl_mask;
343 	u64 reserved_bits;
344 	u8 version;
345 	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
346 	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
347 	struct irq_work irq_work;
348 	u64 reprogram_pmi;
349 };
350 
351 struct kvm_pmu_ops;
352 
353 enum {
354 	KVM_DEBUGREG_BP_ENABLED = 1,
355 	KVM_DEBUGREG_WONT_EXIT = 2,
356 	KVM_DEBUGREG_RELOAD = 4,
357 };
358 
359 struct kvm_mtrr_range {
360 	u64 base;
361 	u64 mask;
362 	struct list_head node;
363 };
364 
365 struct kvm_mtrr {
366 	struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
367 	mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
368 	u64 deftype;
369 
370 	struct list_head head;
371 };
372 
373 /* Hyper-V per vcpu emulation context */
374 struct kvm_vcpu_hv {
375 	u64 hv_vapic;
376 };
377 
378 struct kvm_vcpu_arch {
379 	/*
380 	 * rip and regs accesses must go through
381 	 * kvm_{register,rip}_{read,write} functions.
382 	 */
383 	unsigned long regs[NR_VCPU_REGS];
384 	u32 regs_avail;
385 	u32 regs_dirty;
386 
387 	unsigned long cr0;
388 	unsigned long cr0_guest_owned_bits;
389 	unsigned long cr2;
390 	unsigned long cr3;
391 	unsigned long cr4;
392 	unsigned long cr4_guest_owned_bits;
393 	unsigned long cr8;
394 	u32 hflags;
395 	u64 efer;
396 	u64 apic_base;
397 	struct kvm_lapic *apic;    /* kernel irqchip context */
398 	unsigned long apic_attention;
399 	int32_t apic_arb_prio;
400 	int mp_state;
401 	u64 ia32_misc_enable_msr;
402 	u64 smbase;
403 	bool tpr_access_reporting;
404 	u64 ia32_xss;
405 
406 	/*
407 	 * Paging state of the vcpu
408 	 *
409 	 * If the vcpu runs in guest mode with two level paging this still saves
410 	 * the paging mode of the l1 guest. This context is always used to
411 	 * handle faults.
412 	 */
413 	struct kvm_mmu mmu;
414 
415 	/*
416 	 * Paging state of an L2 guest (used for nested npt)
417 	 *
418 	 * This context will save all necessary information to walk page tables
419 	 * of the an L2 guest. This context is only initialized for page table
420 	 * walking and not for faulting since we never handle l2 page faults on
421 	 * the host.
422 	 */
423 	struct kvm_mmu nested_mmu;
424 
425 	/*
426 	 * Pointer to the mmu context currently used for
427 	 * gva_to_gpa translations.
428 	 */
429 	struct kvm_mmu *walk_mmu;
430 
431 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
432 	struct kvm_mmu_memory_cache mmu_page_cache;
433 	struct kvm_mmu_memory_cache mmu_page_header_cache;
434 
435 	struct fpu guest_fpu;
436 	bool eager_fpu;
437 	u64 xcr0;
438 	u64 guest_supported_xcr0;
439 	u32 guest_xstate_size;
440 
441 	struct kvm_pio_request pio;
442 	void *pio_data;
443 
444 	u8 event_exit_inst_len;
445 
446 	struct kvm_queued_exception {
447 		bool pending;
448 		bool has_error_code;
449 		bool reinject;
450 		u8 nr;
451 		u32 error_code;
452 	} exception;
453 
454 	struct kvm_queued_interrupt {
455 		bool pending;
456 		bool soft;
457 		u8 nr;
458 	} interrupt;
459 
460 	int halt_request; /* real mode on Intel only */
461 
462 	int cpuid_nent;
463 	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
464 
465 	int maxphyaddr;
466 
467 	/* emulate context */
468 
469 	struct x86_emulate_ctxt emulate_ctxt;
470 	bool emulate_regs_need_sync_to_vcpu;
471 	bool emulate_regs_need_sync_from_vcpu;
472 	int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
473 
474 	gpa_t time;
475 	struct pvclock_vcpu_time_info hv_clock;
476 	unsigned int hw_tsc_khz;
477 	struct gfn_to_hva_cache pv_time;
478 	bool pv_time_enabled;
479 	/* set guest stopped flag in pvclock flags field */
480 	bool pvclock_set_guest_stopped_request;
481 
482 	struct {
483 		u64 msr_val;
484 		u64 last_steal;
485 		u64 accum_steal;
486 		struct gfn_to_hva_cache stime;
487 		struct kvm_steal_time steal;
488 	} st;
489 
490 	u64 last_guest_tsc;
491 	u64 last_host_tsc;
492 	u64 tsc_offset_adjustment;
493 	u64 this_tsc_nsec;
494 	u64 this_tsc_write;
495 	u64 this_tsc_generation;
496 	bool tsc_catchup;
497 	bool tsc_always_catchup;
498 	s8 virtual_tsc_shift;
499 	u32 virtual_tsc_mult;
500 	u32 virtual_tsc_khz;
501 	s64 ia32_tsc_adjust_msr;
502 
503 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
504 	unsigned nmi_pending; /* NMI queued after currently running handler */
505 	bool nmi_injected;    /* Trying to inject an NMI this entry */
506 	bool smi_pending;    /* SMI queued after currently running handler */
507 
508 	struct kvm_mtrr mtrr_state;
509 	u64 pat;
510 
511 	unsigned switch_db_regs;
512 	unsigned long db[KVM_NR_DB_REGS];
513 	unsigned long dr6;
514 	unsigned long dr7;
515 	unsigned long eff_db[KVM_NR_DB_REGS];
516 	unsigned long guest_debug_dr7;
517 
518 	u64 mcg_cap;
519 	u64 mcg_status;
520 	u64 mcg_ctl;
521 	u64 *mce_banks;
522 
523 	/* Cache MMIO info */
524 	u64 mmio_gva;
525 	unsigned access;
526 	gfn_t mmio_gfn;
527 	u64 mmio_gen;
528 
529 	struct kvm_pmu pmu;
530 
531 	/* used for guest single stepping over the given code position */
532 	unsigned long singlestep_rip;
533 
534 	struct kvm_vcpu_hv hyperv;
535 
536 	cpumask_var_t wbinvd_dirty_mask;
537 
538 	unsigned long last_retry_eip;
539 	unsigned long last_retry_addr;
540 
541 	struct {
542 		bool halted;
543 		gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
544 		struct gfn_to_hva_cache data;
545 		u64 msr_val;
546 		u32 id;
547 		bool send_user_only;
548 	} apf;
549 
550 	/* OSVW MSRs (AMD only) */
551 	struct {
552 		u64 length;
553 		u64 status;
554 	} osvw;
555 
556 	struct {
557 		u64 msr_val;
558 		struct gfn_to_hva_cache data;
559 	} pv_eoi;
560 
561 	/*
562 	 * Indicate whether the access faults on its page table in guest
563 	 * which is set when fix page fault and used to detect unhandeable
564 	 * instruction.
565 	 */
566 	bool write_fault_to_shadow_pgtable;
567 
568 	/* set at EPT violation at this point */
569 	unsigned long exit_qualification;
570 
571 	/* pv related host specific info */
572 	struct {
573 		bool pv_unhalted;
574 	} pv;
575 };
576 
577 struct kvm_lpage_info {
578 	int write_count;
579 };
580 
581 struct kvm_arch_memory_slot {
582 	unsigned long *rmap[KVM_NR_PAGE_SIZES];
583 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
584 };
585 
586 /*
587  * We use as the mode the number of bits allocated in the LDR for the
588  * logical processor ID.  It happens that these are all powers of two.
589  * This makes it is very easy to detect cases where the APICs are
590  * configured for multiple modes; in that case, we cannot use the map and
591  * hence cannot use kvm_irq_delivery_to_apic_fast either.
592  */
593 #define KVM_APIC_MODE_XAPIC_CLUSTER          4
594 #define KVM_APIC_MODE_XAPIC_FLAT             8
595 #define KVM_APIC_MODE_X2APIC                16
596 
597 struct kvm_apic_map {
598 	struct rcu_head rcu;
599 	u8 mode;
600 	struct kvm_lapic *phys_map[256];
601 	/* first index is cluster id second is cpu id in a cluster */
602 	struct kvm_lapic *logical_map[16][16];
603 };
604 
605 /* Hyper-V emulation context */
606 struct kvm_hv {
607 	u64 hv_guest_os_id;
608 	u64 hv_hypercall;
609 	u64 hv_tsc_page;
610 
611 	/* Hyper-v based guest crash (NT kernel bugcheck) parameters */
612 	u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
613 	u64 hv_crash_ctl;
614 };
615 
616 struct kvm_arch {
617 	unsigned int n_used_mmu_pages;
618 	unsigned int n_requested_mmu_pages;
619 	unsigned int n_max_mmu_pages;
620 	unsigned int indirect_shadow_pages;
621 	unsigned long mmu_valid_gen;
622 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
623 	/*
624 	 * Hash table of struct kvm_mmu_page.
625 	 */
626 	struct list_head active_mmu_pages;
627 	struct list_head zapped_obsolete_pages;
628 
629 	struct list_head assigned_dev_head;
630 	struct iommu_domain *iommu_domain;
631 	bool iommu_noncoherent;
632 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
633 	atomic_t noncoherent_dma_count;
634 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
635 	atomic_t assigned_device_count;
636 	struct kvm_pic *vpic;
637 	struct kvm_ioapic *vioapic;
638 	struct kvm_pit *vpit;
639 	atomic_t vapics_in_nmi_mode;
640 	struct mutex apic_map_lock;
641 	struct kvm_apic_map *apic_map;
642 
643 	unsigned int tss_addr;
644 	bool apic_access_page_done;
645 
646 	gpa_t wall_clock;
647 
648 	bool ept_identity_pagetable_done;
649 	gpa_t ept_identity_map_addr;
650 
651 	unsigned long irq_sources_bitmap;
652 	s64 kvmclock_offset;
653 	raw_spinlock_t tsc_write_lock;
654 	u64 last_tsc_nsec;
655 	u64 last_tsc_write;
656 	u32 last_tsc_khz;
657 	u64 cur_tsc_nsec;
658 	u64 cur_tsc_write;
659 	u64 cur_tsc_offset;
660 	u64 cur_tsc_generation;
661 	int nr_vcpus_matched_tsc;
662 
663 	spinlock_t pvclock_gtod_sync_lock;
664 	bool use_master_clock;
665 	u64 master_kernel_ns;
666 	cycle_t master_cycle_now;
667 	struct delayed_work kvmclock_update_work;
668 	struct delayed_work kvmclock_sync_work;
669 
670 	struct kvm_xen_hvm_config xen_hvm_config;
671 
672 	/* reads protected by irq_srcu, writes by irq_lock */
673 	struct hlist_head mask_notifier_list;
674 
675 	struct kvm_hv hyperv;
676 
677 	#ifdef CONFIG_KVM_MMU_AUDIT
678 	int audit_point;
679 	#endif
680 
681 	bool boot_vcpu_runs_old_kvmclock;
682 	u32 bsp_vcpu_id;
683 
684 	u64 disabled_quirks;
685 };
686 
687 struct kvm_vm_stat {
688 	u32 mmu_shadow_zapped;
689 	u32 mmu_pte_write;
690 	u32 mmu_pte_updated;
691 	u32 mmu_pde_zapped;
692 	u32 mmu_flooded;
693 	u32 mmu_recycled;
694 	u32 mmu_cache_miss;
695 	u32 mmu_unsync;
696 	u32 remote_tlb_flush;
697 	u32 lpages;
698 };
699 
700 struct kvm_vcpu_stat {
701 	u32 pf_fixed;
702 	u32 pf_guest;
703 	u32 tlb_flush;
704 	u32 invlpg;
705 
706 	u32 exits;
707 	u32 io_exits;
708 	u32 mmio_exits;
709 	u32 signal_exits;
710 	u32 irq_window_exits;
711 	u32 nmi_window_exits;
712 	u32 halt_exits;
713 	u32 halt_successful_poll;
714 	u32 halt_wakeup;
715 	u32 request_irq_exits;
716 	u32 irq_exits;
717 	u32 host_state_reload;
718 	u32 efer_reload;
719 	u32 fpu_reload;
720 	u32 insn_emulation;
721 	u32 insn_emulation_fail;
722 	u32 hypercalls;
723 	u32 irq_injections;
724 	u32 nmi_injections;
725 };
726 
727 struct x86_instruction_info;
728 
729 struct msr_data {
730 	bool host_initiated;
731 	u32 index;
732 	u64 data;
733 };
734 
735 struct kvm_lapic_irq {
736 	u32 vector;
737 	u16 delivery_mode;
738 	u16 dest_mode;
739 	bool level;
740 	u16 trig_mode;
741 	u32 shorthand;
742 	u32 dest_id;
743 	bool msi_redir_hint;
744 };
745 
746 struct kvm_x86_ops {
747 	int (*cpu_has_kvm_support)(void);          /* __init */
748 	int (*disabled_by_bios)(void);             /* __init */
749 	int (*hardware_enable)(void);
750 	void (*hardware_disable)(void);
751 	void (*check_processor_compatibility)(void *rtn);
752 	int (*hardware_setup)(void);               /* __init */
753 	void (*hardware_unsetup)(void);            /* __exit */
754 	bool (*cpu_has_accelerated_tpr)(void);
755 	bool (*cpu_has_high_real_mode_segbase)(void);
756 	void (*cpuid_update)(struct kvm_vcpu *vcpu);
757 
758 	/* Create, but do not attach this VCPU */
759 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
760 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
761 	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
762 
763 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
764 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
765 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
766 
767 	void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
768 	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
769 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
770 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
771 	void (*get_segment)(struct kvm_vcpu *vcpu,
772 			    struct kvm_segment *var, int seg);
773 	int (*get_cpl)(struct kvm_vcpu *vcpu);
774 	void (*set_segment)(struct kvm_vcpu *vcpu,
775 			    struct kvm_segment *var, int seg);
776 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
777 	void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
778 	void (*decache_cr3)(struct kvm_vcpu *vcpu);
779 	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
780 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
781 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
782 	int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
783 	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
784 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
785 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
786 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
787 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
788 	u64 (*get_dr6)(struct kvm_vcpu *vcpu);
789 	void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
790 	void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
791 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
792 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
793 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
794 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
795 	void (*fpu_activate)(struct kvm_vcpu *vcpu);
796 	void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
797 
798 	void (*tlb_flush)(struct kvm_vcpu *vcpu);
799 
800 	void (*run)(struct kvm_vcpu *vcpu);
801 	int (*handle_exit)(struct kvm_vcpu *vcpu);
802 	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
803 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
804 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
805 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
806 				unsigned char *hypercall_addr);
807 	void (*set_irq)(struct kvm_vcpu *vcpu);
808 	void (*set_nmi)(struct kvm_vcpu *vcpu);
809 	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
810 				bool has_error_code, u32 error_code,
811 				bool reinject);
812 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
813 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
814 	int (*nmi_allowed)(struct kvm_vcpu *vcpu);
815 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
816 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
817 	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
818 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
819 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
820 	int (*vm_has_apicv)(struct kvm *kvm);
821 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
822 	void (*hwapic_isr_update)(struct kvm *kvm, int isr);
823 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
824 	void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
825 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
826 	void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
827 	void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
828 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
829 	int (*get_tdp_level)(void);
830 	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
831 	int (*get_lpage_level)(void);
832 	bool (*rdtscp_supported)(void);
833 	bool (*invpcid_supported)(void);
834 	void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
835 
836 	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
837 
838 	void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
839 
840 	bool (*has_wbinvd_exit)(void);
841 
842 	void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
843 	u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
844 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
845 
846 	u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
847 	u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
848 
849 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
850 
851 	int (*check_intercept)(struct kvm_vcpu *vcpu,
852 			       struct x86_instruction_info *info,
853 			       enum x86_intercept_stage stage);
854 	void (*handle_external_intr)(struct kvm_vcpu *vcpu);
855 	bool (*mpx_supported)(void);
856 	bool (*xsaves_supported)(void);
857 
858 	int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
859 
860 	void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
861 
862 	/*
863 	 * Arch-specific dirty logging hooks. These hooks are only supposed to
864 	 * be valid if the specific arch has hardware-accelerated dirty logging
865 	 * mechanism. Currently only for PML on VMX.
866 	 *
867 	 *  - slot_enable_log_dirty:
868 	 *	called when enabling log dirty mode for the slot.
869 	 *  - slot_disable_log_dirty:
870 	 *	called when disabling log dirty mode for the slot.
871 	 *	also called when slot is created with log dirty disabled.
872 	 *  - flush_log_dirty:
873 	 *	called before reporting dirty_bitmap to userspace.
874 	 *  - enable_log_dirty_pt_masked:
875 	 *	called when reenabling log dirty for the GFNs in the mask after
876 	 *	corresponding bits are cleared in slot->dirty_bitmap.
877 	 */
878 	void (*slot_enable_log_dirty)(struct kvm *kvm,
879 				      struct kvm_memory_slot *slot);
880 	void (*slot_disable_log_dirty)(struct kvm *kvm,
881 				       struct kvm_memory_slot *slot);
882 	void (*flush_log_dirty)(struct kvm *kvm);
883 	void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
884 					   struct kvm_memory_slot *slot,
885 					   gfn_t offset, unsigned long mask);
886 	/* pmu operations of sub-arch */
887 	const struct kvm_pmu_ops *pmu_ops;
888 };
889 
890 struct kvm_arch_async_pf {
891 	u32 token;
892 	gfn_t gfn;
893 	unsigned long cr3;
894 	bool direct_map;
895 };
896 
897 extern struct kvm_x86_ops *kvm_x86_ops;
898 
899 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
900 					   s64 adjustment)
901 {
902 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
903 }
904 
905 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
906 {
907 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
908 }
909 
910 int kvm_mmu_module_init(void);
911 void kvm_mmu_module_exit(void);
912 
913 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
914 int kvm_mmu_create(struct kvm_vcpu *vcpu);
915 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
916 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
917 		u64 dirty_mask, u64 nx_mask, u64 x_mask);
918 
919 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
920 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
921 				      struct kvm_memory_slot *memslot);
922 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
923 				   const struct kvm_memory_slot *memslot);
924 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
925 				   struct kvm_memory_slot *memslot);
926 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
927 					struct kvm_memory_slot *memslot);
928 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
929 			    struct kvm_memory_slot *memslot);
930 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
931 				   struct kvm_memory_slot *slot,
932 				   gfn_t gfn_offset, unsigned long mask);
933 void kvm_mmu_zap_all(struct kvm *kvm);
934 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
935 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
936 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
937 
938 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
939 
940 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
941 			  const void *val, int bytes);
942 
943 struct kvm_irq_mask_notifier {
944 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
945 	int irq;
946 	struct hlist_node link;
947 };
948 
949 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
950 				    struct kvm_irq_mask_notifier *kimn);
951 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
952 				      struct kvm_irq_mask_notifier *kimn);
953 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
954 			     bool mask);
955 
956 extern bool tdp_enabled;
957 
958 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
959 
960 /* control of guest tsc rate supported? */
961 extern bool kvm_has_tsc_control;
962 /* minimum supported tsc_khz for guests */
963 extern u32  kvm_min_guest_tsc_khz;
964 /* maximum supported tsc_khz for guests */
965 extern u32  kvm_max_guest_tsc_khz;
966 
967 enum emulation_result {
968 	EMULATE_DONE,         /* no further processing */
969 	EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
970 	EMULATE_FAIL,         /* can't emulate this instruction */
971 };
972 
973 #define EMULTYPE_NO_DECODE	    (1 << 0)
974 #define EMULTYPE_TRAP_UD	    (1 << 1)
975 #define EMULTYPE_SKIP		    (1 << 2)
976 #define EMULTYPE_RETRY		    (1 << 3)
977 #define EMULTYPE_NO_REEXECUTE	    (1 << 4)
978 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
979 			    int emulation_type, void *insn, int insn_len);
980 
981 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
982 			int emulation_type)
983 {
984 	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
985 }
986 
987 void kvm_enable_efer_bits(u64);
988 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
989 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
990 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
991 
992 struct x86_emulate_ctxt;
993 
994 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
995 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
996 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
997 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
998 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
999 
1000 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1001 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1002 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1003 
1004 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1005 		    int reason, bool has_error_code, u32 error_code);
1006 
1007 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1008 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1009 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1010 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1011 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1012 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1013 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1014 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1015 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1016 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1017 
1018 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1019 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1020 
1021 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1022 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1023 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1024 
1025 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1026 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1027 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1028 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1029 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1030 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1031 			    gfn_t gfn, void *data, int offset, int len,
1032 			    u32 access);
1033 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1034 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1035 
1036 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1037 				       int irq_source_id, int level)
1038 {
1039 	/* Logical OR for level trig interrupt */
1040 	if (level)
1041 		__set_bit(irq_source_id, irq_state);
1042 	else
1043 		__clear_bit(irq_source_id, irq_state);
1044 
1045 	return !!(*irq_state);
1046 }
1047 
1048 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1049 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1050 
1051 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1052 
1053 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1054 		       const u8 *new, int bytes);
1055 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1056 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1057 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1058 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1059 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1060 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1061 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1062 			   struct x86_exception *exception);
1063 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1064 			      struct x86_exception *exception);
1065 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1066 			       struct x86_exception *exception);
1067 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1068 			       struct x86_exception *exception);
1069 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1070 				struct x86_exception *exception);
1071 
1072 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1073 
1074 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
1075 		       void *insn, int insn_len);
1076 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1077 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
1078 
1079 void kvm_enable_tdp(void);
1080 void kvm_disable_tdp(void);
1081 
1082 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1083 				  struct x86_exception *exception)
1084 {
1085 	return gpa;
1086 }
1087 
1088 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1089 {
1090 	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1091 
1092 	return (struct kvm_mmu_page *)page_private(page);
1093 }
1094 
1095 static inline u16 kvm_read_ldt(void)
1096 {
1097 	u16 ldt;
1098 	asm("sldt %0" : "=g"(ldt));
1099 	return ldt;
1100 }
1101 
1102 static inline void kvm_load_ldt(u16 sel)
1103 {
1104 	asm("lldt %0" : : "rm"(sel));
1105 }
1106 
1107 #ifdef CONFIG_X86_64
1108 static inline unsigned long read_msr(unsigned long msr)
1109 {
1110 	u64 value;
1111 
1112 	rdmsrl(msr, value);
1113 	return value;
1114 }
1115 #endif
1116 
1117 static inline u32 get_rdx_init_val(void)
1118 {
1119 	return 0x600; /* P6 family */
1120 }
1121 
1122 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1123 {
1124 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1125 }
1126 
1127 static inline u64 get_canonical(u64 la)
1128 {
1129 	return ((int64_t)la << 16) >> 16;
1130 }
1131 
1132 static inline bool is_noncanonical_address(u64 la)
1133 {
1134 #ifdef CONFIG_X86_64
1135 	return get_canonical(la) != la;
1136 #else
1137 	return false;
1138 #endif
1139 }
1140 
1141 #define TSS_IOPB_BASE_OFFSET 0x66
1142 #define TSS_BASE_SIZE 0x68
1143 #define TSS_IOPB_SIZE (65536 / 8)
1144 #define TSS_REDIRECTION_SIZE (256 / 8)
1145 #define RMODE_TSS_SIZE							\
1146 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1147 
1148 enum {
1149 	TASK_SWITCH_CALL = 0,
1150 	TASK_SWITCH_IRET = 1,
1151 	TASK_SWITCH_JMP = 2,
1152 	TASK_SWITCH_GATE = 3,
1153 };
1154 
1155 #define HF_GIF_MASK		(1 << 0)
1156 #define HF_HIF_MASK		(1 << 1)
1157 #define HF_VINTR_MASK		(1 << 2)
1158 #define HF_NMI_MASK		(1 << 3)
1159 #define HF_IRET_MASK		(1 << 4)
1160 #define HF_GUEST_MASK		(1 << 5) /* VCPU is in guest-mode */
1161 #define HF_SMM_MASK		(1 << 6)
1162 #define HF_SMM_INSIDE_NMI_MASK	(1 << 7)
1163 
1164 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1165 #define KVM_ADDRESS_SPACE_NUM 2
1166 
1167 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1168 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1169 
1170 /*
1171  * Hardware virtualization extension instructions may fault if a
1172  * reboot turns off virtualization while processes are running.
1173  * Trap the fault and ignore the instruction if that happens.
1174  */
1175 asmlinkage void kvm_spurious_fault(void);
1176 
1177 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)	\
1178 	"666: " insn "\n\t" \
1179 	"668: \n\t"                           \
1180 	".pushsection .fixup, \"ax\" \n" \
1181 	"667: \n\t" \
1182 	cleanup_insn "\n\t"		      \
1183 	"cmpb $0, kvm_rebooting \n\t"	      \
1184 	"jne 668b \n\t"      		      \
1185 	__ASM_SIZE(push) " $666b \n\t"	      \
1186 	"call kvm_spurious_fault \n\t"	      \
1187 	".popsection \n\t" \
1188 	_ASM_EXTABLE(666b, 667b)
1189 
1190 #define __kvm_handle_fault_on_reboot(insn)		\
1191 	____kvm_handle_fault_on_reboot(insn, "")
1192 
1193 #define KVM_ARCH_WANT_MMU_NOTIFIER
1194 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1195 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1196 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1197 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1198 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1199 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1200 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1201 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1202 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1203 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1204 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1205 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1206 					   unsigned long address);
1207 
1208 void kvm_define_shared_msr(unsigned index, u32 msr);
1209 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1210 
1211 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1212 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1213 
1214 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1215 				     struct kvm_async_pf *work);
1216 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1217 				 struct kvm_async_pf *work);
1218 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1219 			       struct kvm_async_pf *work);
1220 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1221 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1222 
1223 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1224 
1225 int kvm_is_in_guest(void);
1226 
1227 int __x86_set_memory_region(struct kvm *kvm,
1228 			    const struct kvm_userspace_memory_region *mem);
1229 int x86_set_memory_region(struct kvm *kvm,
1230 			  const struct kvm_userspace_memory_region *mem);
1231 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1232 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1233 
1234 #endif /* _ASM_X86_KVM_HOST_H */
1235