1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 #include <linux/irq.h> 21 22 #include <linux/kvm.h> 23 #include <linux/kvm_para.h> 24 #include <linux/kvm_types.h> 25 #include <linux/perf_event.h> 26 #include <linux/pvclock_gtod.h> 27 #include <linux/clocksource.h> 28 #include <linux/irqbypass.h> 29 #include <linux/hyperv.h> 30 31 #include <asm/apic.h> 32 #include <asm/pvclock-abi.h> 33 #include <asm/desc.h> 34 #include <asm/mtrr.h> 35 #include <asm/msr-index.h> 36 #include <asm/asm.h> 37 #include <asm/kvm_page_track.h> 38 #include <asm/hyperv-tlfs.h> 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 /* x86-specific vcpu->requests bit members */ 53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 58 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 59 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 60 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 61 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 62 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 63 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 64 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 65 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 66 #define KVM_REQ_MCLOCK_INPROGRESS \ 67 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 68 #define KVM_REQ_SCAN_IOAPIC \ 69 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 70 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 71 #define KVM_REQ_APIC_PAGE_RELOAD \ 72 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 74 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 75 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 76 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 77 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 78 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 79 80 #define CR0_RESERVED_BITS \ 81 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 82 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 83 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 84 85 #define CR3_PCID_INVD BIT_64(63) 86 #define CR4_RESERVED_BITS \ 87 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 88 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 89 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 90 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 91 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 92 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 93 94 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 95 96 97 98 #define INVALID_PAGE (~(hpa_t)0) 99 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 100 101 #define UNMAPPED_GVA (~(gpa_t)0) 102 103 /* KVM Hugepage definitions for x86 */ 104 #define KVM_NR_PAGE_SIZES 3 105 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 106 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 107 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 108 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 109 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 110 111 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 112 { 113 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 114 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 115 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 116 } 117 118 #define KVM_PERMILLE_MMU_PAGES 20 119 #define KVM_MIN_ALLOC_MMU_PAGES 64 120 #define KVM_MMU_HASH_SHIFT 12 121 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 122 #define KVM_MIN_FREE_MMU_PAGES 5 123 #define KVM_REFILL_PAGES 25 124 #define KVM_MAX_CPUID_ENTRIES 80 125 #define KVM_NR_FIXED_MTRR_REGION 88 126 #define KVM_NR_VAR_MTRR 8 127 128 #define ASYNC_PF_PER_VCPU 64 129 130 enum kvm_reg { 131 VCPU_REGS_RAX = 0, 132 VCPU_REGS_RCX = 1, 133 VCPU_REGS_RDX = 2, 134 VCPU_REGS_RBX = 3, 135 VCPU_REGS_RSP = 4, 136 VCPU_REGS_RBP = 5, 137 VCPU_REGS_RSI = 6, 138 VCPU_REGS_RDI = 7, 139 #ifdef CONFIG_X86_64 140 VCPU_REGS_R8 = 8, 141 VCPU_REGS_R9 = 9, 142 VCPU_REGS_R10 = 10, 143 VCPU_REGS_R11 = 11, 144 VCPU_REGS_R12 = 12, 145 VCPU_REGS_R13 = 13, 146 VCPU_REGS_R14 = 14, 147 VCPU_REGS_R15 = 15, 148 #endif 149 VCPU_REGS_RIP, 150 NR_VCPU_REGS 151 }; 152 153 enum kvm_reg_ex { 154 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 155 VCPU_EXREG_CR3, 156 VCPU_EXREG_RFLAGS, 157 VCPU_EXREG_SEGMENTS, 158 }; 159 160 enum { 161 VCPU_SREG_ES, 162 VCPU_SREG_CS, 163 VCPU_SREG_SS, 164 VCPU_SREG_DS, 165 VCPU_SREG_FS, 166 VCPU_SREG_GS, 167 VCPU_SREG_TR, 168 VCPU_SREG_LDTR, 169 }; 170 171 #include <asm/kvm_emulate.h> 172 173 #define KVM_NR_MEM_OBJS 40 174 175 #define KVM_NR_DB_REGS 4 176 177 #define DR6_BD (1 << 13) 178 #define DR6_BS (1 << 14) 179 #define DR6_RTM (1 << 16) 180 #define DR6_FIXED_1 0xfffe0ff0 181 #define DR6_INIT 0xffff0ff0 182 #define DR6_VOLATILE 0x0001e00f 183 184 #define DR7_BP_EN_MASK 0x000000ff 185 #define DR7_GE (1 << 9) 186 #define DR7_GD (1 << 13) 187 #define DR7_FIXED_1 0x00000400 188 #define DR7_VOLATILE 0xffff2bff 189 190 #define PFERR_PRESENT_BIT 0 191 #define PFERR_WRITE_BIT 1 192 #define PFERR_USER_BIT 2 193 #define PFERR_RSVD_BIT 3 194 #define PFERR_FETCH_BIT 4 195 #define PFERR_PK_BIT 5 196 #define PFERR_GUEST_FINAL_BIT 32 197 #define PFERR_GUEST_PAGE_BIT 33 198 199 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 200 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 201 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 202 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 203 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 204 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 205 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 206 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 207 208 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 209 PFERR_WRITE_MASK | \ 210 PFERR_PRESENT_MASK) 211 212 /* 213 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 214 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 215 * with the SVE bit in EPT PTEs. 216 */ 217 #define SPTE_SPECIAL_MASK (1ULL << 62) 218 219 /* apic attention bits */ 220 #define KVM_APIC_CHECK_VAPIC 0 221 /* 222 * The following bit is set with PV-EOI, unset on EOI. 223 * We detect PV-EOI changes by guest by comparing 224 * this bit with PV-EOI in guest memory. 225 * See the implementation in apic_update_pv_eoi. 226 */ 227 #define KVM_APIC_PV_EOI_PENDING 1 228 229 struct kvm_kernel_irq_routing_entry; 230 231 /* 232 * We don't want allocation failures within the mmu code, so we preallocate 233 * enough memory for a single page fault in a cache. 234 */ 235 struct kvm_mmu_memory_cache { 236 int nobjs; 237 void *objects[KVM_NR_MEM_OBJS]; 238 }; 239 240 /* 241 * the pages used as guest page table on soft mmu are tracked by 242 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 243 * by indirect shadow page can not be more than 15 bits. 244 * 245 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 246 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 247 */ 248 union kvm_mmu_page_role { 249 unsigned word; 250 struct { 251 unsigned level:4; 252 unsigned cr4_pae:1; 253 unsigned quadrant:2; 254 unsigned direct:1; 255 unsigned access:3; 256 unsigned invalid:1; 257 unsigned nxe:1; 258 unsigned cr0_wp:1; 259 unsigned smep_andnot_wp:1; 260 unsigned smap_andnot_wp:1; 261 unsigned ad_disabled:1; 262 unsigned guest_mode:1; 263 unsigned :6; 264 265 /* 266 * This is left at the top of the word so that 267 * kvm_memslots_for_spte_role can extract it with a 268 * simple shift. While there is room, give it a whole 269 * byte so it is also faster to load it from memory. 270 */ 271 unsigned smm:8; 272 }; 273 }; 274 275 struct kvm_rmap_head { 276 unsigned long val; 277 }; 278 279 struct kvm_mmu_page { 280 struct list_head link; 281 struct hlist_node hash_link; 282 283 /* 284 * The following two entries are used to key the shadow page in the 285 * hash table. 286 */ 287 gfn_t gfn; 288 union kvm_mmu_page_role role; 289 290 u64 *spt; 291 /* hold the gfn of each spte inside spt */ 292 gfn_t *gfns; 293 bool unsync; 294 int root_count; /* Currently serving as active root */ 295 unsigned int unsync_children; 296 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 297 298 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 299 unsigned long mmu_valid_gen; 300 301 DECLARE_BITMAP(unsync_child_bitmap, 512); 302 303 #ifdef CONFIG_X86_32 304 /* 305 * Used out of the mmu-lock to avoid reading spte values while an 306 * update is in progress; see the comments in __get_spte_lockless(). 307 */ 308 int clear_spte_count; 309 #endif 310 311 /* Number of writes since the last time traversal visited this page. */ 312 atomic_t write_flooding_count; 313 }; 314 315 struct kvm_pio_request { 316 unsigned long count; 317 int in; 318 int port; 319 int size; 320 }; 321 322 #define PT64_ROOT_MAX_LEVEL 5 323 324 struct rsvd_bits_validate { 325 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 326 u64 bad_mt_xwr; 327 }; 328 329 /* 330 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 331 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 332 * current mmu mode. 333 */ 334 struct kvm_mmu { 335 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 336 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 337 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 338 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 339 bool prefault); 340 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 341 struct x86_exception *fault); 342 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 343 struct x86_exception *exception); 344 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 345 struct x86_exception *exception); 346 int (*sync_page)(struct kvm_vcpu *vcpu, 347 struct kvm_mmu_page *sp); 348 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 349 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 350 u64 *spte, const void *pte); 351 hpa_t root_hpa; 352 union kvm_mmu_page_role base_role; 353 u8 root_level; 354 u8 shadow_root_level; 355 u8 ept_ad; 356 bool direct_map; 357 358 /* 359 * Bitmap; bit set = permission fault 360 * Byte index: page fault error code [4:1] 361 * Bit index: pte permissions in ACC_* format 362 */ 363 u8 permissions[16]; 364 365 /* 366 * The pkru_mask indicates if protection key checks are needed. It 367 * consists of 16 domains indexed by page fault error code bits [4:1], 368 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 369 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 370 */ 371 u32 pkru_mask; 372 373 u64 *pae_root; 374 u64 *lm_root; 375 376 /* 377 * check zero bits on shadow page table entries, these 378 * bits include not only hardware reserved bits but also 379 * the bits spte never used. 380 */ 381 struct rsvd_bits_validate shadow_zero_check; 382 383 struct rsvd_bits_validate guest_rsvd_check; 384 385 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 386 u8 last_nonleaf_level; 387 388 bool nx; 389 390 u64 pdptrs[4]; /* pae */ 391 }; 392 393 enum pmc_type { 394 KVM_PMC_GP = 0, 395 KVM_PMC_FIXED, 396 }; 397 398 struct kvm_pmc { 399 enum pmc_type type; 400 u8 idx; 401 u64 counter; 402 u64 eventsel; 403 struct perf_event *perf_event; 404 struct kvm_vcpu *vcpu; 405 }; 406 407 struct kvm_pmu { 408 unsigned nr_arch_gp_counters; 409 unsigned nr_arch_fixed_counters; 410 unsigned available_event_types; 411 u64 fixed_ctr_ctrl; 412 u64 global_ctrl; 413 u64 global_status; 414 u64 global_ovf_ctrl; 415 u64 counter_bitmask[2]; 416 u64 global_ctrl_mask; 417 u64 reserved_bits; 418 u8 version; 419 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 420 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 421 struct irq_work irq_work; 422 u64 reprogram_pmi; 423 }; 424 425 struct kvm_pmu_ops; 426 427 enum { 428 KVM_DEBUGREG_BP_ENABLED = 1, 429 KVM_DEBUGREG_WONT_EXIT = 2, 430 KVM_DEBUGREG_RELOAD = 4, 431 }; 432 433 struct kvm_mtrr_range { 434 u64 base; 435 u64 mask; 436 struct list_head node; 437 }; 438 439 struct kvm_mtrr { 440 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 441 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 442 u64 deftype; 443 444 struct list_head head; 445 }; 446 447 /* Hyper-V SynIC timer */ 448 struct kvm_vcpu_hv_stimer { 449 struct hrtimer timer; 450 int index; 451 u64 config; 452 u64 count; 453 u64 exp_time; 454 struct hv_message msg; 455 bool msg_pending; 456 }; 457 458 /* Hyper-V synthetic interrupt controller (SynIC)*/ 459 struct kvm_vcpu_hv_synic { 460 u64 version; 461 u64 control; 462 u64 msg_page; 463 u64 evt_page; 464 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 465 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 466 DECLARE_BITMAP(auto_eoi_bitmap, 256); 467 DECLARE_BITMAP(vec_bitmap, 256); 468 bool active; 469 bool dont_zero_synic_pages; 470 }; 471 472 /* Hyper-V per vcpu emulation context */ 473 struct kvm_vcpu_hv { 474 u32 vp_index; 475 u64 hv_vapic; 476 s64 runtime_offset; 477 struct kvm_vcpu_hv_synic synic; 478 struct kvm_hyperv_exit exit; 479 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 480 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 481 cpumask_t tlb_lush; 482 }; 483 484 struct kvm_vcpu_arch { 485 /* 486 * rip and regs accesses must go through 487 * kvm_{register,rip}_{read,write} functions. 488 */ 489 unsigned long regs[NR_VCPU_REGS]; 490 u32 regs_avail; 491 u32 regs_dirty; 492 493 unsigned long cr0; 494 unsigned long cr0_guest_owned_bits; 495 unsigned long cr2; 496 unsigned long cr3; 497 unsigned long cr4; 498 unsigned long cr4_guest_owned_bits; 499 unsigned long cr8; 500 u32 pkru; 501 u32 hflags; 502 u64 efer; 503 u64 apic_base; 504 struct kvm_lapic *apic; /* kernel irqchip context */ 505 bool apicv_active; 506 bool load_eoi_exitmap_pending; 507 DECLARE_BITMAP(ioapic_handled_vectors, 256); 508 unsigned long apic_attention; 509 int32_t apic_arb_prio; 510 int mp_state; 511 u64 ia32_misc_enable_msr; 512 u64 smbase; 513 u64 smi_count; 514 bool tpr_access_reporting; 515 u64 ia32_xss; 516 u64 microcode_version; 517 518 /* 519 * Paging state of the vcpu 520 * 521 * If the vcpu runs in guest mode with two level paging this still saves 522 * the paging mode of the l1 guest. This context is always used to 523 * handle faults. 524 */ 525 struct kvm_mmu mmu; 526 527 /* 528 * Paging state of an L2 guest (used for nested npt) 529 * 530 * This context will save all necessary information to walk page tables 531 * of the an L2 guest. This context is only initialized for page table 532 * walking and not for faulting since we never handle l2 page faults on 533 * the host. 534 */ 535 struct kvm_mmu nested_mmu; 536 537 /* 538 * Pointer to the mmu context currently used for 539 * gva_to_gpa translations. 540 */ 541 struct kvm_mmu *walk_mmu; 542 543 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 544 struct kvm_mmu_memory_cache mmu_page_cache; 545 struct kvm_mmu_memory_cache mmu_page_header_cache; 546 547 /* 548 * QEMU userspace and the guest each have their own FPU state. 549 * In vcpu_run, we switch between the user and guest FPU contexts. 550 * While running a VCPU, the VCPU thread will have the guest FPU 551 * context. 552 * 553 * Note that while the PKRU state lives inside the fpu registers, 554 * it is switched out separately at VMENTER and VMEXIT time. The 555 * "guest_fpu" state here contains the guest FPU context, with the 556 * host PRKU bits. 557 */ 558 struct fpu user_fpu; 559 struct fpu guest_fpu; 560 561 u64 xcr0; 562 u64 guest_supported_xcr0; 563 u32 guest_xstate_size; 564 565 struct kvm_pio_request pio; 566 void *pio_data; 567 568 u8 event_exit_inst_len; 569 570 struct kvm_queued_exception { 571 bool pending; 572 bool injected; 573 bool has_error_code; 574 u8 nr; 575 u32 error_code; 576 u8 nested_apf; 577 } exception; 578 579 struct kvm_queued_interrupt { 580 bool injected; 581 bool soft; 582 u8 nr; 583 } interrupt; 584 585 int halt_request; /* real mode on Intel only */ 586 587 int cpuid_nent; 588 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 589 590 int maxphyaddr; 591 592 /* emulate context */ 593 594 struct x86_emulate_ctxt emulate_ctxt; 595 bool emulate_regs_need_sync_to_vcpu; 596 bool emulate_regs_need_sync_from_vcpu; 597 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 598 599 gpa_t time; 600 struct pvclock_vcpu_time_info hv_clock; 601 unsigned int hw_tsc_khz; 602 struct gfn_to_hva_cache pv_time; 603 bool pv_time_enabled; 604 /* set guest stopped flag in pvclock flags field */ 605 bool pvclock_set_guest_stopped_request; 606 607 struct { 608 u64 msr_val; 609 u64 last_steal; 610 struct gfn_to_hva_cache stime; 611 struct kvm_steal_time steal; 612 } st; 613 614 u64 tsc_offset; 615 u64 last_guest_tsc; 616 u64 last_host_tsc; 617 u64 tsc_offset_adjustment; 618 u64 this_tsc_nsec; 619 u64 this_tsc_write; 620 u64 this_tsc_generation; 621 bool tsc_catchup; 622 bool tsc_always_catchup; 623 s8 virtual_tsc_shift; 624 u32 virtual_tsc_mult; 625 u32 virtual_tsc_khz; 626 s64 ia32_tsc_adjust_msr; 627 u64 tsc_scaling_ratio; 628 629 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 630 unsigned nmi_pending; /* NMI queued after currently running handler */ 631 bool nmi_injected; /* Trying to inject an NMI this entry */ 632 bool smi_pending; /* SMI queued after currently running handler */ 633 634 struct kvm_mtrr mtrr_state; 635 u64 pat; 636 637 unsigned switch_db_regs; 638 unsigned long db[KVM_NR_DB_REGS]; 639 unsigned long dr6; 640 unsigned long dr7; 641 unsigned long eff_db[KVM_NR_DB_REGS]; 642 unsigned long guest_debug_dr7; 643 u64 msr_platform_info; 644 u64 msr_misc_features_enables; 645 646 u64 mcg_cap; 647 u64 mcg_status; 648 u64 mcg_ctl; 649 u64 mcg_ext_ctl; 650 u64 *mce_banks; 651 652 /* Cache MMIO info */ 653 u64 mmio_gva; 654 unsigned access; 655 gfn_t mmio_gfn; 656 u64 mmio_gen; 657 658 struct kvm_pmu pmu; 659 660 /* used for guest single stepping over the given code position */ 661 unsigned long singlestep_rip; 662 663 struct kvm_vcpu_hv hyperv; 664 665 cpumask_var_t wbinvd_dirty_mask; 666 667 unsigned long last_retry_eip; 668 unsigned long last_retry_addr; 669 670 struct { 671 bool halted; 672 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 673 struct gfn_to_hva_cache data; 674 u64 msr_val; 675 u32 id; 676 bool send_user_only; 677 u32 host_apf_reason; 678 unsigned long nested_apf_token; 679 bool delivery_as_pf_vmexit; 680 } apf; 681 682 /* OSVW MSRs (AMD only) */ 683 struct { 684 u64 length; 685 u64 status; 686 } osvw; 687 688 struct { 689 u64 msr_val; 690 struct gfn_to_hva_cache data; 691 } pv_eoi; 692 693 /* 694 * Indicate whether the access faults on its page table in guest 695 * which is set when fix page fault and used to detect unhandeable 696 * instruction. 697 */ 698 bool write_fault_to_shadow_pgtable; 699 700 /* set at EPT violation at this point */ 701 unsigned long exit_qualification; 702 703 /* pv related host specific info */ 704 struct { 705 bool pv_unhalted; 706 } pv; 707 708 int pending_ioapic_eoi; 709 int pending_external_vector; 710 711 /* GPA available */ 712 bool gpa_available; 713 gpa_t gpa_val; 714 715 /* be preempted when it's in kernel-mode(cpl=0) */ 716 bool preempted_in_kernel; 717 718 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 719 bool l1tf_flush_l1d; 720 }; 721 722 struct kvm_lpage_info { 723 int disallow_lpage; 724 }; 725 726 struct kvm_arch_memory_slot { 727 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 728 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 729 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 730 }; 731 732 /* 733 * We use as the mode the number of bits allocated in the LDR for the 734 * logical processor ID. It happens that these are all powers of two. 735 * This makes it is very easy to detect cases where the APICs are 736 * configured for multiple modes; in that case, we cannot use the map and 737 * hence cannot use kvm_irq_delivery_to_apic_fast either. 738 */ 739 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 740 #define KVM_APIC_MODE_XAPIC_FLAT 8 741 #define KVM_APIC_MODE_X2APIC 16 742 743 struct kvm_apic_map { 744 struct rcu_head rcu; 745 u8 mode; 746 u32 max_apic_id; 747 union { 748 struct kvm_lapic *xapic_flat_map[8]; 749 struct kvm_lapic *xapic_cluster_map[16][4]; 750 }; 751 struct kvm_lapic *phys_map[]; 752 }; 753 754 /* Hyper-V emulation context */ 755 struct kvm_hv { 756 struct mutex hv_lock; 757 u64 hv_guest_os_id; 758 u64 hv_hypercall; 759 u64 hv_tsc_page; 760 761 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 762 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 763 u64 hv_crash_ctl; 764 765 HV_REFERENCE_TSC_PAGE tsc_ref; 766 767 struct idr conn_to_evt; 768 769 u64 hv_reenlightenment_control; 770 u64 hv_tsc_emulation_control; 771 u64 hv_tsc_emulation_status; 772 }; 773 774 enum kvm_irqchip_mode { 775 KVM_IRQCHIP_NONE, 776 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 777 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 778 }; 779 780 struct kvm_arch { 781 unsigned int n_used_mmu_pages; 782 unsigned int n_requested_mmu_pages; 783 unsigned int n_max_mmu_pages; 784 unsigned int indirect_shadow_pages; 785 unsigned long mmu_valid_gen; 786 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 787 /* 788 * Hash table of struct kvm_mmu_page. 789 */ 790 struct list_head active_mmu_pages; 791 struct list_head zapped_obsolete_pages; 792 struct kvm_page_track_notifier_node mmu_sp_tracker; 793 struct kvm_page_track_notifier_head track_notifier_head; 794 795 struct list_head assigned_dev_head; 796 struct iommu_domain *iommu_domain; 797 bool iommu_noncoherent; 798 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 799 atomic_t noncoherent_dma_count; 800 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 801 atomic_t assigned_device_count; 802 struct kvm_pic *vpic; 803 struct kvm_ioapic *vioapic; 804 struct kvm_pit *vpit; 805 atomic_t vapics_in_nmi_mode; 806 struct mutex apic_map_lock; 807 struct kvm_apic_map *apic_map; 808 809 bool apic_access_page_done; 810 811 gpa_t wall_clock; 812 813 bool mwait_in_guest; 814 bool hlt_in_guest; 815 bool pause_in_guest; 816 817 unsigned long irq_sources_bitmap; 818 s64 kvmclock_offset; 819 raw_spinlock_t tsc_write_lock; 820 u64 last_tsc_nsec; 821 u64 last_tsc_write; 822 u32 last_tsc_khz; 823 u64 cur_tsc_nsec; 824 u64 cur_tsc_write; 825 u64 cur_tsc_offset; 826 u64 cur_tsc_generation; 827 int nr_vcpus_matched_tsc; 828 829 spinlock_t pvclock_gtod_sync_lock; 830 bool use_master_clock; 831 u64 master_kernel_ns; 832 u64 master_cycle_now; 833 struct delayed_work kvmclock_update_work; 834 struct delayed_work kvmclock_sync_work; 835 836 struct kvm_xen_hvm_config xen_hvm_config; 837 838 /* reads protected by irq_srcu, writes by irq_lock */ 839 struct hlist_head mask_notifier_list; 840 841 struct kvm_hv hyperv; 842 843 #ifdef CONFIG_KVM_MMU_AUDIT 844 int audit_point; 845 #endif 846 847 bool backwards_tsc_observed; 848 bool boot_vcpu_runs_old_kvmclock; 849 u32 bsp_vcpu_id; 850 851 u64 disabled_quirks; 852 853 enum kvm_irqchip_mode irqchip_mode; 854 u8 nr_reserved_ioapic_pins; 855 856 bool disabled_lapic_found; 857 858 bool x2apic_format; 859 bool x2apic_broadcast_quirk_disabled; 860 }; 861 862 struct kvm_vm_stat { 863 ulong mmu_shadow_zapped; 864 ulong mmu_pte_write; 865 ulong mmu_pte_updated; 866 ulong mmu_pde_zapped; 867 ulong mmu_flooded; 868 ulong mmu_recycled; 869 ulong mmu_cache_miss; 870 ulong mmu_unsync; 871 ulong remote_tlb_flush; 872 ulong lpages; 873 ulong max_mmu_page_hash_collisions; 874 }; 875 876 struct kvm_vcpu_stat { 877 u64 pf_fixed; 878 u64 pf_guest; 879 u64 tlb_flush; 880 u64 invlpg; 881 882 u64 exits; 883 u64 io_exits; 884 u64 mmio_exits; 885 u64 signal_exits; 886 u64 irq_window_exits; 887 u64 nmi_window_exits; 888 u64 l1d_flush; 889 u64 halt_exits; 890 u64 halt_successful_poll; 891 u64 halt_attempted_poll; 892 u64 halt_poll_invalid; 893 u64 halt_wakeup; 894 u64 request_irq_exits; 895 u64 irq_exits; 896 u64 host_state_reload; 897 u64 fpu_reload; 898 u64 insn_emulation; 899 u64 insn_emulation_fail; 900 u64 hypercalls; 901 u64 irq_injections; 902 u64 nmi_injections; 903 u64 req_event; 904 }; 905 906 struct x86_instruction_info; 907 908 struct msr_data { 909 bool host_initiated; 910 u32 index; 911 u64 data; 912 }; 913 914 struct kvm_lapic_irq { 915 u32 vector; 916 u16 delivery_mode; 917 u16 dest_mode; 918 bool level; 919 u16 trig_mode; 920 u32 shorthand; 921 u32 dest_id; 922 bool msi_redir_hint; 923 }; 924 925 struct kvm_x86_ops { 926 int (*cpu_has_kvm_support)(void); /* __init */ 927 int (*disabled_by_bios)(void); /* __init */ 928 int (*hardware_enable)(void); 929 void (*hardware_disable)(void); 930 void (*check_processor_compatibility)(void *rtn); 931 int (*hardware_setup)(void); /* __init */ 932 void (*hardware_unsetup)(void); /* __exit */ 933 bool (*cpu_has_accelerated_tpr)(void); 934 bool (*has_emulated_msr)(int index); 935 void (*cpuid_update)(struct kvm_vcpu *vcpu); 936 937 struct kvm *(*vm_alloc)(void); 938 void (*vm_free)(struct kvm *); 939 int (*vm_init)(struct kvm *kvm); 940 void (*vm_destroy)(struct kvm *kvm); 941 942 /* Create, but do not attach this VCPU */ 943 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 944 void (*vcpu_free)(struct kvm_vcpu *vcpu); 945 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 946 947 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 948 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 949 void (*vcpu_put)(struct kvm_vcpu *vcpu); 950 951 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 952 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 953 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 954 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 955 void (*get_segment)(struct kvm_vcpu *vcpu, 956 struct kvm_segment *var, int seg); 957 int (*get_cpl)(struct kvm_vcpu *vcpu); 958 void (*set_segment)(struct kvm_vcpu *vcpu, 959 struct kvm_segment *var, int seg); 960 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 961 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 962 void (*decache_cr3)(struct kvm_vcpu *vcpu); 963 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 964 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 965 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 966 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 967 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 968 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 969 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 970 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 971 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 972 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 973 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 974 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 975 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 976 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 977 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 978 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 979 980 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 981 982 void (*run)(struct kvm_vcpu *vcpu); 983 int (*handle_exit)(struct kvm_vcpu *vcpu); 984 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 985 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 986 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 987 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 988 unsigned char *hypercall_addr); 989 void (*set_irq)(struct kvm_vcpu *vcpu); 990 void (*set_nmi)(struct kvm_vcpu *vcpu); 991 void (*queue_exception)(struct kvm_vcpu *vcpu); 992 void (*cancel_injection)(struct kvm_vcpu *vcpu); 993 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 994 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 995 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 996 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 997 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 998 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 999 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1000 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 1001 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1002 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1003 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1004 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1005 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1006 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1007 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1008 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1009 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1010 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1011 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1012 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1013 int (*get_lpage_level)(void); 1014 bool (*rdtscp_supported)(void); 1015 bool (*invpcid_supported)(void); 1016 1017 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1018 1019 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1020 1021 bool (*has_wbinvd_exit)(void); 1022 1023 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1024 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1025 1026 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1027 1028 int (*check_intercept)(struct kvm_vcpu *vcpu, 1029 struct x86_instruction_info *info, 1030 enum x86_intercept_stage stage); 1031 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1032 bool (*mpx_supported)(void); 1033 bool (*xsaves_supported)(void); 1034 bool (*umip_emulated)(void); 1035 1036 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1037 1038 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1039 1040 /* 1041 * Arch-specific dirty logging hooks. These hooks are only supposed to 1042 * be valid if the specific arch has hardware-accelerated dirty logging 1043 * mechanism. Currently only for PML on VMX. 1044 * 1045 * - slot_enable_log_dirty: 1046 * called when enabling log dirty mode for the slot. 1047 * - slot_disable_log_dirty: 1048 * called when disabling log dirty mode for the slot. 1049 * also called when slot is created with log dirty disabled. 1050 * - flush_log_dirty: 1051 * called before reporting dirty_bitmap to userspace. 1052 * - enable_log_dirty_pt_masked: 1053 * called when reenabling log dirty for the GFNs in the mask after 1054 * corresponding bits are cleared in slot->dirty_bitmap. 1055 */ 1056 void (*slot_enable_log_dirty)(struct kvm *kvm, 1057 struct kvm_memory_slot *slot); 1058 void (*slot_disable_log_dirty)(struct kvm *kvm, 1059 struct kvm_memory_slot *slot); 1060 void (*flush_log_dirty)(struct kvm *kvm); 1061 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1062 struct kvm_memory_slot *slot, 1063 gfn_t offset, unsigned long mask); 1064 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1065 1066 /* pmu operations of sub-arch */ 1067 const struct kvm_pmu_ops *pmu_ops; 1068 1069 /* 1070 * Architecture specific hooks for vCPU blocking due to 1071 * HLT instruction. 1072 * Returns for .pre_block(): 1073 * - 0 means continue to block the vCPU. 1074 * - 1 means we cannot block the vCPU since some event 1075 * happens during this period, such as, 'ON' bit in 1076 * posted-interrupts descriptor is set. 1077 */ 1078 int (*pre_block)(struct kvm_vcpu *vcpu); 1079 void (*post_block)(struct kvm_vcpu *vcpu); 1080 1081 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1082 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1083 1084 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1085 uint32_t guest_irq, bool set); 1086 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1087 1088 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1089 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1090 1091 void (*setup_mce)(struct kvm_vcpu *vcpu); 1092 1093 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1094 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1095 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase); 1096 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1097 1098 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1099 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1100 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1101 1102 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1103 }; 1104 1105 struct kvm_arch_async_pf { 1106 u32 token; 1107 gfn_t gfn; 1108 unsigned long cr3; 1109 bool direct_map; 1110 }; 1111 1112 extern struct kvm_x86_ops *kvm_x86_ops; 1113 1114 #define __KVM_HAVE_ARCH_VM_ALLOC 1115 static inline struct kvm *kvm_arch_alloc_vm(void) 1116 { 1117 return kvm_x86_ops->vm_alloc(); 1118 } 1119 1120 static inline void kvm_arch_free_vm(struct kvm *kvm) 1121 { 1122 return kvm_x86_ops->vm_free(kvm); 1123 } 1124 1125 int kvm_mmu_module_init(void); 1126 void kvm_mmu_module_exit(void); 1127 1128 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1129 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1130 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1131 void kvm_mmu_init_vm(struct kvm *kvm); 1132 void kvm_mmu_uninit_vm(struct kvm *kvm); 1133 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1134 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1135 u64 acc_track_mask, u64 me_mask); 1136 1137 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1138 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1139 struct kvm_memory_slot *memslot); 1140 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1141 const struct kvm_memory_slot *memslot); 1142 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1143 struct kvm_memory_slot *memslot); 1144 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1145 struct kvm_memory_slot *memslot); 1146 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1147 struct kvm_memory_slot *memslot); 1148 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1149 struct kvm_memory_slot *slot, 1150 gfn_t gfn_offset, unsigned long mask); 1151 void kvm_mmu_zap_all(struct kvm *kvm); 1152 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1153 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1154 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1155 1156 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1157 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1158 1159 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1160 const void *val, int bytes); 1161 1162 struct kvm_irq_mask_notifier { 1163 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1164 int irq; 1165 struct hlist_node link; 1166 }; 1167 1168 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1169 struct kvm_irq_mask_notifier *kimn); 1170 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1171 struct kvm_irq_mask_notifier *kimn); 1172 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1173 bool mask); 1174 1175 extern bool tdp_enabled; 1176 1177 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1178 1179 /* control of guest tsc rate supported? */ 1180 extern bool kvm_has_tsc_control; 1181 /* maximum supported tsc_khz for guests */ 1182 extern u32 kvm_max_guest_tsc_khz; 1183 /* number of bits of the fractional part of the TSC scaling ratio */ 1184 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1185 /* maximum allowed value of TSC scaling ratio */ 1186 extern u64 kvm_max_tsc_scaling_ratio; 1187 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1188 extern u64 kvm_default_tsc_scaling_ratio; 1189 1190 extern u64 kvm_mce_cap_supported; 1191 1192 enum emulation_result { 1193 EMULATE_DONE, /* no further processing */ 1194 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1195 EMULATE_FAIL, /* can't emulate this instruction */ 1196 }; 1197 1198 #define EMULTYPE_NO_DECODE (1 << 0) 1199 #define EMULTYPE_TRAP_UD (1 << 1) 1200 #define EMULTYPE_SKIP (1 << 2) 1201 #define EMULTYPE_RETRY (1 << 3) 1202 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1203 #define EMULTYPE_NO_UD_ON_FAIL (1 << 5) 1204 #define EMULTYPE_VMWARE (1 << 6) 1205 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1206 int emulation_type, void *insn, int insn_len); 1207 1208 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1209 int emulation_type) 1210 { 1211 return x86_emulate_instruction(vcpu, 0, 1212 emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0); 1213 } 1214 1215 void kvm_enable_efer_bits(u64); 1216 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1217 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1218 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1219 1220 struct x86_emulate_ctxt; 1221 1222 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1223 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1224 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1225 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1226 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1227 1228 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1229 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1230 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1231 1232 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1233 int reason, bool has_error_code, u32 error_code); 1234 1235 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1236 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1237 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1238 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1239 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1240 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1241 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1242 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1243 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1244 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1245 1246 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1247 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1248 1249 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1250 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1251 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1252 1253 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1254 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1255 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1256 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1257 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1258 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1259 gfn_t gfn, void *data, int offset, int len, 1260 u32 access); 1261 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1262 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1263 1264 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1265 int irq_source_id, int level) 1266 { 1267 /* Logical OR for level trig interrupt */ 1268 if (level) 1269 __set_bit(irq_source_id, irq_state); 1270 else 1271 __clear_bit(irq_source_id, irq_state); 1272 1273 return !!(*irq_state); 1274 } 1275 1276 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1277 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1278 1279 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1280 1281 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1282 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1283 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1284 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1285 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1286 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1287 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu); 1288 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1289 struct x86_exception *exception); 1290 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1291 struct x86_exception *exception); 1292 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1293 struct x86_exception *exception); 1294 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1295 struct x86_exception *exception); 1296 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1297 struct x86_exception *exception); 1298 1299 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1300 1301 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1302 1303 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1304 void *insn, int insn_len); 1305 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1306 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1307 1308 void kvm_enable_tdp(void); 1309 void kvm_disable_tdp(void); 1310 1311 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1312 struct x86_exception *exception) 1313 { 1314 return gpa; 1315 } 1316 1317 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1318 { 1319 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1320 1321 return (struct kvm_mmu_page *)page_private(page); 1322 } 1323 1324 static inline u16 kvm_read_ldt(void) 1325 { 1326 u16 ldt; 1327 asm("sldt %0" : "=g"(ldt)); 1328 return ldt; 1329 } 1330 1331 static inline void kvm_load_ldt(u16 sel) 1332 { 1333 asm("lldt %0" : : "rm"(sel)); 1334 } 1335 1336 #ifdef CONFIG_X86_64 1337 static inline unsigned long read_msr(unsigned long msr) 1338 { 1339 u64 value; 1340 1341 rdmsrl(msr, value); 1342 return value; 1343 } 1344 #endif 1345 1346 static inline u32 get_rdx_init_val(void) 1347 { 1348 return 0x600; /* P6 family */ 1349 } 1350 1351 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1352 { 1353 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1354 } 1355 1356 #define TSS_IOPB_BASE_OFFSET 0x66 1357 #define TSS_BASE_SIZE 0x68 1358 #define TSS_IOPB_SIZE (65536 / 8) 1359 #define TSS_REDIRECTION_SIZE (256 / 8) 1360 #define RMODE_TSS_SIZE \ 1361 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1362 1363 enum { 1364 TASK_SWITCH_CALL = 0, 1365 TASK_SWITCH_IRET = 1, 1366 TASK_SWITCH_JMP = 2, 1367 TASK_SWITCH_GATE = 3, 1368 }; 1369 1370 #define HF_GIF_MASK (1 << 0) 1371 #define HF_HIF_MASK (1 << 1) 1372 #define HF_VINTR_MASK (1 << 2) 1373 #define HF_NMI_MASK (1 << 3) 1374 #define HF_IRET_MASK (1 << 4) 1375 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1376 #define HF_SMM_MASK (1 << 6) 1377 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1378 1379 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1380 #define KVM_ADDRESS_SPACE_NUM 2 1381 1382 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1383 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1384 1385 /* 1386 * Hardware virtualization extension instructions may fault if a 1387 * reboot turns off virtualization while processes are running. 1388 * Trap the fault and ignore the instruction if that happens. 1389 */ 1390 asmlinkage void kvm_spurious_fault(void); 1391 1392 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1393 "666: " insn "\n\t" \ 1394 "668: \n\t" \ 1395 ".pushsection .fixup, \"ax\" \n" \ 1396 "667: \n\t" \ 1397 cleanup_insn "\n\t" \ 1398 "cmpb $0, kvm_rebooting \n\t" \ 1399 "jne 668b \n\t" \ 1400 __ASM_SIZE(push) " $666b \n\t" \ 1401 "call kvm_spurious_fault \n\t" \ 1402 ".popsection \n\t" \ 1403 _ASM_EXTABLE(666b, 667b) 1404 1405 #define __kvm_handle_fault_on_reboot(insn) \ 1406 ____kvm_handle_fault_on_reboot(insn, "") 1407 1408 #define KVM_ARCH_WANT_MMU_NOTIFIER 1409 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1410 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1411 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1412 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1413 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1414 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1415 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1416 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1417 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1418 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1419 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1420 1421 u64 kvm_get_arch_capabilities(void); 1422 void kvm_define_shared_msr(unsigned index, u32 msr); 1423 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1424 1425 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1426 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1427 1428 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1429 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1430 1431 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1432 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1433 1434 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1435 struct kvm_async_pf *work); 1436 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1437 struct kvm_async_pf *work); 1438 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1439 struct kvm_async_pf *work); 1440 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1441 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1442 1443 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1444 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1445 1446 int kvm_is_in_guest(void); 1447 1448 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1449 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1450 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1451 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1452 1453 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1454 struct kvm_vcpu **dest_vcpu); 1455 1456 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1457 struct kvm_lapic_irq *irq); 1458 1459 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1460 { 1461 if (kvm_x86_ops->vcpu_blocking) 1462 kvm_x86_ops->vcpu_blocking(vcpu); 1463 } 1464 1465 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1466 { 1467 if (kvm_x86_ops->vcpu_unblocking) 1468 kvm_x86_ops->vcpu_unblocking(vcpu); 1469 } 1470 1471 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1472 1473 static inline int kvm_cpu_get_apicid(int mps_cpu) 1474 { 1475 #ifdef CONFIG_X86_LOCAL_APIC 1476 return default_cpu_present_to_apicid(mps_cpu); 1477 #else 1478 WARN_ON_ONCE(1); 1479 return BAD_APICID; 1480 #endif 1481 } 1482 1483 #define put_smstate(type, buf, offset, val) \ 1484 *(type *)((buf) + (offset) - 0x7e00) = val 1485 1486 #endif /* _ASM_X86_KVM_HOST_H */ 1487