1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_HV_TLB_FLUSH \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 93 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 94 95 #define CR0_RESERVED_BITS \ 96 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 97 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 98 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 99 100 #define CR4_RESERVED_BITS \ 101 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 102 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 103 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 104 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 105 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 106 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 107 108 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 109 110 111 112 #define INVALID_PAGE (~(hpa_t)0) 113 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 114 115 #define UNMAPPED_GVA (~(gpa_t)0) 116 117 /* KVM Hugepage definitions for x86 */ 118 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 119 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 120 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 121 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 122 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 123 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 124 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 125 126 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 127 { 128 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 129 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 130 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 131 } 132 133 #define KVM_PERMILLE_MMU_PAGES 20 134 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 135 #define KVM_MMU_HASH_SHIFT 12 136 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 137 #define KVM_MIN_FREE_MMU_PAGES 5 138 #define KVM_REFILL_PAGES 25 139 #define KVM_MAX_CPUID_ENTRIES 256 140 #define KVM_NR_FIXED_MTRR_REGION 88 141 #define KVM_NR_VAR_MTRR 8 142 143 #define ASYNC_PF_PER_VCPU 64 144 145 enum kvm_reg { 146 VCPU_REGS_RAX = __VCPU_REGS_RAX, 147 VCPU_REGS_RCX = __VCPU_REGS_RCX, 148 VCPU_REGS_RDX = __VCPU_REGS_RDX, 149 VCPU_REGS_RBX = __VCPU_REGS_RBX, 150 VCPU_REGS_RSP = __VCPU_REGS_RSP, 151 VCPU_REGS_RBP = __VCPU_REGS_RBP, 152 VCPU_REGS_RSI = __VCPU_REGS_RSI, 153 VCPU_REGS_RDI = __VCPU_REGS_RDI, 154 #ifdef CONFIG_X86_64 155 VCPU_REGS_R8 = __VCPU_REGS_R8, 156 VCPU_REGS_R9 = __VCPU_REGS_R9, 157 VCPU_REGS_R10 = __VCPU_REGS_R10, 158 VCPU_REGS_R11 = __VCPU_REGS_R11, 159 VCPU_REGS_R12 = __VCPU_REGS_R12, 160 VCPU_REGS_R13 = __VCPU_REGS_R13, 161 VCPU_REGS_R14 = __VCPU_REGS_R14, 162 VCPU_REGS_R15 = __VCPU_REGS_R15, 163 #endif 164 VCPU_REGS_RIP, 165 NR_VCPU_REGS, 166 167 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 168 VCPU_EXREG_CR0, 169 VCPU_EXREG_CR3, 170 VCPU_EXREG_CR4, 171 VCPU_EXREG_RFLAGS, 172 VCPU_EXREG_SEGMENTS, 173 VCPU_EXREG_EXIT_INFO_1, 174 VCPU_EXREG_EXIT_INFO_2, 175 }; 176 177 enum { 178 VCPU_SREG_ES, 179 VCPU_SREG_CS, 180 VCPU_SREG_SS, 181 VCPU_SREG_DS, 182 VCPU_SREG_FS, 183 VCPU_SREG_GS, 184 VCPU_SREG_TR, 185 VCPU_SREG_LDTR, 186 }; 187 188 enum exit_fastpath_completion { 189 EXIT_FASTPATH_NONE, 190 EXIT_FASTPATH_REENTER_GUEST, 191 EXIT_FASTPATH_EXIT_HANDLED, 192 }; 193 typedef enum exit_fastpath_completion fastpath_t; 194 195 struct x86_emulate_ctxt; 196 struct x86_exception; 197 enum x86_intercept; 198 enum x86_intercept_stage; 199 200 #define KVM_NR_DB_REGS 4 201 202 #define DR6_BD (1 << 13) 203 #define DR6_BS (1 << 14) 204 #define DR6_BT (1 << 15) 205 #define DR6_RTM (1 << 16) 206 /* 207 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 208 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 209 * they will never be 0 for now, but when they are defined 210 * in the future it will require no code change. 211 * 212 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 213 */ 214 #define DR6_ACTIVE_LOW 0xffff0ff0 215 #define DR6_VOLATILE 0x0001e00f 216 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 217 218 #define DR7_BP_EN_MASK 0x000000ff 219 #define DR7_GE (1 << 9) 220 #define DR7_GD (1 << 13) 221 #define DR7_FIXED_1 0x00000400 222 #define DR7_VOLATILE 0xffff2bff 223 224 #define KVM_GUESTDBG_VALID_MASK \ 225 (KVM_GUESTDBG_ENABLE | \ 226 KVM_GUESTDBG_SINGLESTEP | \ 227 KVM_GUESTDBG_USE_HW_BP | \ 228 KVM_GUESTDBG_USE_SW_BP | \ 229 KVM_GUESTDBG_INJECT_BP | \ 230 KVM_GUESTDBG_INJECT_DB) 231 232 233 #define PFERR_PRESENT_BIT 0 234 #define PFERR_WRITE_BIT 1 235 #define PFERR_USER_BIT 2 236 #define PFERR_RSVD_BIT 3 237 #define PFERR_FETCH_BIT 4 238 #define PFERR_PK_BIT 5 239 #define PFERR_SGX_BIT 15 240 #define PFERR_GUEST_FINAL_BIT 32 241 #define PFERR_GUEST_PAGE_BIT 33 242 243 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 244 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 245 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 246 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 247 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 248 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 249 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 250 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 251 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 252 253 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 254 PFERR_WRITE_MASK | \ 255 PFERR_PRESENT_MASK) 256 257 /* apic attention bits */ 258 #define KVM_APIC_CHECK_VAPIC 0 259 /* 260 * The following bit is set with PV-EOI, unset on EOI. 261 * We detect PV-EOI changes by guest by comparing 262 * this bit with PV-EOI in guest memory. 263 * See the implementation in apic_update_pv_eoi. 264 */ 265 #define KVM_APIC_PV_EOI_PENDING 1 266 267 struct kvm_kernel_irq_routing_entry; 268 269 /* 270 * the pages used as guest page table on soft mmu are tracked by 271 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 272 * by indirect shadow page can not be more than 15 bits. 273 * 274 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 275 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 276 */ 277 union kvm_mmu_page_role { 278 u32 word; 279 struct { 280 unsigned level:4; 281 unsigned gpte_is_8_bytes:1; 282 unsigned quadrant:2; 283 unsigned direct:1; 284 unsigned access:3; 285 unsigned invalid:1; 286 unsigned nxe:1; 287 unsigned cr0_wp:1; 288 unsigned smep_andnot_wp:1; 289 unsigned smap_andnot_wp:1; 290 unsigned ad_disabled:1; 291 unsigned guest_mode:1; 292 unsigned :6; 293 294 /* 295 * This is left at the top of the word so that 296 * kvm_memslots_for_spte_role can extract it with a 297 * simple shift. While there is room, give it a whole 298 * byte so it is also faster to load it from memory. 299 */ 300 unsigned smm:8; 301 }; 302 }; 303 304 union kvm_mmu_extended_role { 305 /* 306 * This structure complements kvm_mmu_page_role caching everything needed for 307 * MMU configuration. If nothing in both these structures changed, MMU 308 * re-configuration can be skipped. @valid bit is set on first usage so we don't 309 * treat all-zero structure as valid data. 310 */ 311 u32 word; 312 struct { 313 unsigned int valid:1; 314 unsigned int execonly:1; 315 unsigned int cr0_pg:1; 316 unsigned int cr4_pae:1; 317 unsigned int cr4_pse:1; 318 unsigned int cr4_pke:1; 319 unsigned int cr4_smap:1; 320 unsigned int cr4_smep:1; 321 unsigned int maxphyaddr:6; 322 }; 323 }; 324 325 union kvm_mmu_role { 326 u64 as_u64; 327 struct { 328 union kvm_mmu_page_role base; 329 union kvm_mmu_extended_role ext; 330 }; 331 }; 332 333 struct kvm_rmap_head { 334 unsigned long val; 335 }; 336 337 struct kvm_pio_request { 338 unsigned long linear_rip; 339 unsigned long count; 340 int in; 341 int port; 342 int size; 343 }; 344 345 #define PT64_ROOT_MAX_LEVEL 5 346 347 struct rsvd_bits_validate { 348 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 349 u64 bad_mt_xwr; 350 }; 351 352 struct kvm_mmu_root_info { 353 gpa_t pgd; 354 hpa_t hpa; 355 }; 356 357 #define KVM_MMU_ROOT_INFO_INVALID \ 358 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 359 360 #define KVM_MMU_NUM_PREV_ROOTS 3 361 362 #define KVM_HAVE_MMU_RWLOCK 363 364 struct kvm_mmu_page; 365 366 /* 367 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 368 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 369 * current mmu mode. 370 */ 371 struct kvm_mmu { 372 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 373 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 374 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 375 bool prefault); 376 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 377 struct x86_exception *fault); 378 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 379 u32 access, struct x86_exception *exception); 380 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 381 struct x86_exception *exception); 382 int (*sync_page)(struct kvm_vcpu *vcpu, 383 struct kvm_mmu_page *sp); 384 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 385 hpa_t root_hpa; 386 gpa_t root_pgd; 387 union kvm_mmu_role mmu_role; 388 u8 root_level; 389 u8 shadow_root_level; 390 u8 ept_ad; 391 bool direct_map; 392 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 393 394 /* 395 * Bitmap; bit set = permission fault 396 * Byte index: page fault error code [4:1] 397 * Bit index: pte permissions in ACC_* format 398 */ 399 u8 permissions[16]; 400 401 /* 402 * The pkru_mask indicates if protection key checks are needed. It 403 * consists of 16 domains indexed by page fault error code bits [4:1], 404 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 405 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 406 */ 407 u32 pkru_mask; 408 409 u64 *pae_root; 410 u64 *lm_root; 411 412 /* 413 * check zero bits on shadow page table entries, these 414 * bits include not only hardware reserved bits but also 415 * the bits spte never used. 416 */ 417 struct rsvd_bits_validate shadow_zero_check; 418 419 struct rsvd_bits_validate guest_rsvd_check; 420 421 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 422 u8 last_nonleaf_level; 423 424 bool nx; 425 426 u64 pdptrs[4]; /* pae */ 427 }; 428 429 struct kvm_tlb_range { 430 u64 start_gfn; 431 u64 pages; 432 }; 433 434 enum pmc_type { 435 KVM_PMC_GP = 0, 436 KVM_PMC_FIXED, 437 }; 438 439 struct kvm_pmc { 440 enum pmc_type type; 441 u8 idx; 442 u64 counter; 443 u64 eventsel; 444 struct perf_event *perf_event; 445 struct kvm_vcpu *vcpu; 446 /* 447 * eventsel value for general purpose counters, 448 * ctrl value for fixed counters. 449 */ 450 u64 current_config; 451 }; 452 453 struct kvm_pmu { 454 unsigned nr_arch_gp_counters; 455 unsigned nr_arch_fixed_counters; 456 unsigned available_event_types; 457 u64 fixed_ctr_ctrl; 458 u64 global_ctrl; 459 u64 global_status; 460 u64 global_ovf_ctrl; 461 u64 counter_bitmask[2]; 462 u64 global_ctrl_mask; 463 u64 global_ovf_ctrl_mask; 464 u64 reserved_bits; 465 u8 version; 466 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 467 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 468 struct irq_work irq_work; 469 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 470 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 471 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 472 473 /* 474 * The gate to release perf_events not marked in 475 * pmc_in_use only once in a vcpu time slice. 476 */ 477 bool need_cleanup; 478 479 /* 480 * The total number of programmed perf_events and it helps to avoid 481 * redundant check before cleanup if guest don't use vPMU at all. 482 */ 483 u8 event_count; 484 }; 485 486 struct kvm_pmu_ops; 487 488 enum { 489 KVM_DEBUGREG_BP_ENABLED = 1, 490 KVM_DEBUGREG_WONT_EXIT = 2, 491 KVM_DEBUGREG_RELOAD = 4, 492 }; 493 494 struct kvm_mtrr_range { 495 u64 base; 496 u64 mask; 497 struct list_head node; 498 }; 499 500 struct kvm_mtrr { 501 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 502 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 503 u64 deftype; 504 505 struct list_head head; 506 }; 507 508 /* Hyper-V SynIC timer */ 509 struct kvm_vcpu_hv_stimer { 510 struct hrtimer timer; 511 int index; 512 union hv_stimer_config config; 513 u64 count; 514 u64 exp_time; 515 struct hv_message msg; 516 bool msg_pending; 517 }; 518 519 /* Hyper-V synthetic interrupt controller (SynIC)*/ 520 struct kvm_vcpu_hv_synic { 521 u64 version; 522 u64 control; 523 u64 msg_page; 524 u64 evt_page; 525 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 526 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 527 DECLARE_BITMAP(auto_eoi_bitmap, 256); 528 DECLARE_BITMAP(vec_bitmap, 256); 529 bool active; 530 bool dont_zero_synic_pages; 531 }; 532 533 /* Hyper-V per vcpu emulation context */ 534 struct kvm_vcpu_hv { 535 struct kvm_vcpu *vcpu; 536 u32 vp_index; 537 u64 hv_vapic; 538 s64 runtime_offset; 539 struct kvm_vcpu_hv_synic synic; 540 struct kvm_hyperv_exit exit; 541 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 542 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 543 cpumask_t tlb_flush; 544 }; 545 546 /* Xen HVM per vcpu emulation context */ 547 struct kvm_vcpu_xen { 548 u64 hypercall_rip; 549 u32 current_runstate; 550 bool vcpu_info_set; 551 bool vcpu_time_info_set; 552 bool runstate_set; 553 struct gfn_to_hva_cache vcpu_info_cache; 554 struct gfn_to_hva_cache vcpu_time_info_cache; 555 struct gfn_to_hva_cache runstate_cache; 556 u64 last_steal; 557 u64 runstate_entry_time; 558 u64 runstate_times[4]; 559 }; 560 561 struct kvm_vcpu_arch { 562 /* 563 * rip and regs accesses must go through 564 * kvm_{register,rip}_{read,write} functions. 565 */ 566 unsigned long regs[NR_VCPU_REGS]; 567 u32 regs_avail; 568 u32 regs_dirty; 569 570 unsigned long cr0; 571 unsigned long cr0_guest_owned_bits; 572 unsigned long cr2; 573 unsigned long cr3; 574 unsigned long cr4; 575 unsigned long cr4_guest_owned_bits; 576 unsigned long cr4_guest_rsvd_bits; 577 unsigned long cr8; 578 u32 host_pkru; 579 u32 pkru; 580 u32 hflags; 581 u64 efer; 582 u64 apic_base; 583 struct kvm_lapic *apic; /* kernel irqchip context */ 584 bool apicv_active; 585 bool load_eoi_exitmap_pending; 586 DECLARE_BITMAP(ioapic_handled_vectors, 256); 587 unsigned long apic_attention; 588 int32_t apic_arb_prio; 589 int mp_state; 590 u64 ia32_misc_enable_msr; 591 u64 smbase; 592 u64 smi_count; 593 bool tpr_access_reporting; 594 bool xsaves_enabled; 595 u64 ia32_xss; 596 u64 microcode_version; 597 u64 arch_capabilities; 598 u64 perf_capabilities; 599 600 /* 601 * Paging state of the vcpu 602 * 603 * If the vcpu runs in guest mode with two level paging this still saves 604 * the paging mode of the l1 guest. This context is always used to 605 * handle faults. 606 */ 607 struct kvm_mmu *mmu; 608 609 /* Non-nested MMU for L1 */ 610 struct kvm_mmu root_mmu; 611 612 /* L1 MMU when running nested */ 613 struct kvm_mmu guest_mmu; 614 615 /* 616 * Paging state of an L2 guest (used for nested npt) 617 * 618 * This context will save all necessary information to walk page tables 619 * of an L2 guest. This context is only initialized for page table 620 * walking and not for faulting since we never handle l2 page faults on 621 * the host. 622 */ 623 struct kvm_mmu nested_mmu; 624 625 /* 626 * Pointer to the mmu context currently used for 627 * gva_to_gpa translations. 628 */ 629 struct kvm_mmu *walk_mmu; 630 631 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 632 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 633 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 634 struct kvm_mmu_memory_cache mmu_page_header_cache; 635 636 /* 637 * QEMU userspace and the guest each have their own FPU state. 638 * In vcpu_run, we switch between the user and guest FPU contexts. 639 * While running a VCPU, the VCPU thread will have the guest FPU 640 * context. 641 * 642 * Note that while the PKRU state lives inside the fpu registers, 643 * it is switched out separately at VMENTER and VMEXIT time. The 644 * "guest_fpu" state here contains the guest FPU context, with the 645 * host PRKU bits. 646 */ 647 struct fpu *user_fpu; 648 struct fpu *guest_fpu; 649 650 u64 xcr0; 651 u64 guest_supported_xcr0; 652 653 struct kvm_pio_request pio; 654 void *pio_data; 655 void *guest_ins_data; 656 657 u8 event_exit_inst_len; 658 659 struct kvm_queued_exception { 660 bool pending; 661 bool injected; 662 bool has_error_code; 663 u8 nr; 664 u32 error_code; 665 unsigned long payload; 666 bool has_payload; 667 u8 nested_apf; 668 } exception; 669 670 struct kvm_queued_interrupt { 671 bool injected; 672 bool soft; 673 u8 nr; 674 } interrupt; 675 676 int halt_request; /* real mode on Intel only */ 677 678 int cpuid_nent; 679 struct kvm_cpuid_entry2 *cpuid_entries; 680 681 u64 reserved_gpa_bits; 682 int maxphyaddr; 683 int max_tdp_level; 684 685 /* emulate context */ 686 687 struct x86_emulate_ctxt *emulate_ctxt; 688 bool emulate_regs_need_sync_to_vcpu; 689 bool emulate_regs_need_sync_from_vcpu; 690 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 691 692 gpa_t time; 693 struct pvclock_vcpu_time_info hv_clock; 694 unsigned int hw_tsc_khz; 695 struct gfn_to_hva_cache pv_time; 696 bool pv_time_enabled; 697 /* set guest stopped flag in pvclock flags field */ 698 bool pvclock_set_guest_stopped_request; 699 700 struct { 701 u8 preempted; 702 u64 msr_val; 703 u64 last_steal; 704 struct gfn_to_pfn_cache cache; 705 } st; 706 707 u64 l1_tsc_offset; 708 u64 tsc_offset; 709 u64 last_guest_tsc; 710 u64 last_host_tsc; 711 u64 tsc_offset_adjustment; 712 u64 this_tsc_nsec; 713 u64 this_tsc_write; 714 u64 this_tsc_generation; 715 bool tsc_catchup; 716 bool tsc_always_catchup; 717 s8 virtual_tsc_shift; 718 u32 virtual_tsc_mult; 719 u32 virtual_tsc_khz; 720 s64 ia32_tsc_adjust_msr; 721 u64 msr_ia32_power_ctl; 722 u64 tsc_scaling_ratio; 723 724 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 725 unsigned nmi_pending; /* NMI queued after currently running handler */ 726 bool nmi_injected; /* Trying to inject an NMI this entry */ 727 bool smi_pending; /* SMI queued after currently running handler */ 728 729 struct kvm_mtrr mtrr_state; 730 u64 pat; 731 732 unsigned switch_db_regs; 733 unsigned long db[KVM_NR_DB_REGS]; 734 unsigned long dr6; 735 unsigned long dr7; 736 unsigned long eff_db[KVM_NR_DB_REGS]; 737 unsigned long guest_debug_dr7; 738 u64 msr_platform_info; 739 u64 msr_misc_features_enables; 740 741 u64 mcg_cap; 742 u64 mcg_status; 743 u64 mcg_ctl; 744 u64 mcg_ext_ctl; 745 u64 *mce_banks; 746 747 /* Cache MMIO info */ 748 u64 mmio_gva; 749 unsigned mmio_access; 750 gfn_t mmio_gfn; 751 u64 mmio_gen; 752 753 struct kvm_pmu pmu; 754 755 /* used for guest single stepping over the given code position */ 756 unsigned long singlestep_rip; 757 758 bool hyperv_enabled; 759 struct kvm_vcpu_hv *hyperv; 760 struct kvm_vcpu_xen xen; 761 762 cpumask_var_t wbinvd_dirty_mask; 763 764 unsigned long last_retry_eip; 765 unsigned long last_retry_addr; 766 767 struct { 768 bool halted; 769 gfn_t gfns[ASYNC_PF_PER_VCPU]; 770 struct gfn_to_hva_cache data; 771 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 772 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 773 u16 vec; 774 u32 id; 775 bool send_user_only; 776 u32 host_apf_flags; 777 unsigned long nested_apf_token; 778 bool delivery_as_pf_vmexit; 779 bool pageready_pending; 780 } apf; 781 782 /* OSVW MSRs (AMD only) */ 783 struct { 784 u64 length; 785 u64 status; 786 } osvw; 787 788 struct { 789 u64 msr_val; 790 struct gfn_to_hva_cache data; 791 } pv_eoi; 792 793 u64 msr_kvm_poll_control; 794 795 /* 796 * Indicates the guest is trying to write a gfn that contains one or 797 * more of the PTEs used to translate the write itself, i.e. the access 798 * is changing its own translation in the guest page tables. KVM exits 799 * to userspace if emulation of the faulting instruction fails and this 800 * flag is set, as KVM cannot make forward progress. 801 * 802 * If emulation fails for a write to guest page tables, KVM unprotects 803 * (zaps) the shadow page for the target gfn and resumes the guest to 804 * retry the non-emulatable instruction (on hardware). Unprotecting the 805 * gfn doesn't allow forward progress for a self-changing access because 806 * doing so also zaps the translation for the gfn, i.e. retrying the 807 * instruction will hit a !PRESENT fault, which results in a new shadow 808 * page and sends KVM back to square one. 809 */ 810 bool write_fault_to_shadow_pgtable; 811 812 /* set at EPT violation at this point */ 813 unsigned long exit_qualification; 814 815 /* pv related host specific info */ 816 struct { 817 bool pv_unhalted; 818 } pv; 819 820 int pending_ioapic_eoi; 821 int pending_external_vector; 822 823 /* be preempted when it's in kernel-mode(cpl=0) */ 824 bool preempted_in_kernel; 825 826 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 827 bool l1tf_flush_l1d; 828 829 /* Host CPU on which VM-entry was most recently attempted */ 830 unsigned int last_vmentry_cpu; 831 832 /* AMD MSRC001_0015 Hardware Configuration */ 833 u64 msr_hwcr; 834 835 /* pv related cpuid info */ 836 struct { 837 /* 838 * value of the eax register in the KVM_CPUID_FEATURES CPUID 839 * leaf. 840 */ 841 u32 features; 842 843 /* 844 * indicates whether pv emulation should be disabled if features 845 * are not present in the guest's cpuid 846 */ 847 bool enforce; 848 } pv_cpuid; 849 850 /* Protected Guests */ 851 bool guest_state_protected; 852 }; 853 854 struct kvm_lpage_info { 855 int disallow_lpage; 856 }; 857 858 struct kvm_arch_memory_slot { 859 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 860 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 861 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 862 }; 863 864 /* 865 * We use as the mode the number of bits allocated in the LDR for the 866 * logical processor ID. It happens that these are all powers of two. 867 * This makes it is very easy to detect cases where the APICs are 868 * configured for multiple modes; in that case, we cannot use the map and 869 * hence cannot use kvm_irq_delivery_to_apic_fast either. 870 */ 871 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 872 #define KVM_APIC_MODE_XAPIC_FLAT 8 873 #define KVM_APIC_MODE_X2APIC 16 874 875 struct kvm_apic_map { 876 struct rcu_head rcu; 877 u8 mode; 878 u32 max_apic_id; 879 union { 880 struct kvm_lapic *xapic_flat_map[8]; 881 struct kvm_lapic *xapic_cluster_map[16][4]; 882 }; 883 struct kvm_lapic *phys_map[]; 884 }; 885 886 /* Hyper-V synthetic debugger (SynDbg)*/ 887 struct kvm_hv_syndbg { 888 struct { 889 u64 control; 890 u64 status; 891 u64 send_page; 892 u64 recv_page; 893 u64 pending_page; 894 } control; 895 u64 options; 896 }; 897 898 /* Current state of Hyper-V TSC page clocksource */ 899 enum hv_tsc_page_status { 900 /* TSC page was not set up or disabled */ 901 HV_TSC_PAGE_UNSET = 0, 902 /* TSC page MSR was written by the guest, update pending */ 903 HV_TSC_PAGE_GUEST_CHANGED, 904 /* TSC page MSR was written by KVM userspace, update pending */ 905 HV_TSC_PAGE_HOST_CHANGED, 906 /* TSC page was properly set up and is currently active */ 907 HV_TSC_PAGE_SET, 908 /* TSC page is currently being updated and therefore is inactive */ 909 HV_TSC_PAGE_UPDATING, 910 /* TSC page was set up with an inaccessible GPA */ 911 HV_TSC_PAGE_BROKEN, 912 }; 913 914 /* Hyper-V emulation context */ 915 struct kvm_hv { 916 struct mutex hv_lock; 917 u64 hv_guest_os_id; 918 u64 hv_hypercall; 919 u64 hv_tsc_page; 920 enum hv_tsc_page_status hv_tsc_page_status; 921 922 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 923 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 924 u64 hv_crash_ctl; 925 926 struct ms_hyperv_tsc_page tsc_ref; 927 928 struct idr conn_to_evt; 929 930 u64 hv_reenlightenment_control; 931 u64 hv_tsc_emulation_control; 932 u64 hv_tsc_emulation_status; 933 934 /* How many vCPUs have VP index != vCPU index */ 935 atomic_t num_mismatched_vp_indexes; 936 937 struct hv_partition_assist_pg *hv_pa_pg; 938 struct kvm_hv_syndbg hv_syndbg; 939 }; 940 941 struct msr_bitmap_range { 942 u32 flags; 943 u32 nmsrs; 944 u32 base; 945 unsigned long *bitmap; 946 }; 947 948 /* Xen emulation context */ 949 struct kvm_xen { 950 bool long_mode; 951 bool shinfo_set; 952 u8 upcall_vector; 953 struct gfn_to_hva_cache shinfo_cache; 954 }; 955 956 enum kvm_irqchip_mode { 957 KVM_IRQCHIP_NONE, 958 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 959 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 960 }; 961 962 struct kvm_x86_msr_filter { 963 u8 count; 964 bool default_allow:1; 965 struct msr_bitmap_range ranges[16]; 966 }; 967 968 #define APICV_INHIBIT_REASON_DISABLE 0 969 #define APICV_INHIBIT_REASON_HYPERV 1 970 #define APICV_INHIBIT_REASON_NESTED 2 971 #define APICV_INHIBIT_REASON_IRQWIN 3 972 #define APICV_INHIBIT_REASON_PIT_REINJ 4 973 #define APICV_INHIBIT_REASON_X2APIC 5 974 975 struct kvm_arch { 976 unsigned long n_used_mmu_pages; 977 unsigned long n_requested_mmu_pages; 978 unsigned long n_max_mmu_pages; 979 unsigned int indirect_shadow_pages; 980 u8 mmu_valid_gen; 981 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 982 struct list_head active_mmu_pages; 983 struct list_head zapped_obsolete_pages; 984 struct list_head lpage_disallowed_mmu_pages; 985 struct kvm_page_track_notifier_node mmu_sp_tracker; 986 struct kvm_page_track_notifier_head track_notifier_head; 987 988 struct list_head assigned_dev_head; 989 struct iommu_domain *iommu_domain; 990 bool iommu_noncoherent; 991 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 992 atomic_t noncoherent_dma_count; 993 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 994 atomic_t assigned_device_count; 995 struct kvm_pic *vpic; 996 struct kvm_ioapic *vioapic; 997 struct kvm_pit *vpit; 998 atomic_t vapics_in_nmi_mode; 999 struct mutex apic_map_lock; 1000 struct kvm_apic_map __rcu *apic_map; 1001 atomic_t apic_map_dirty; 1002 1003 bool apic_access_page_done; 1004 unsigned long apicv_inhibit_reasons; 1005 1006 gpa_t wall_clock; 1007 1008 bool mwait_in_guest; 1009 bool hlt_in_guest; 1010 bool pause_in_guest; 1011 bool cstate_in_guest; 1012 1013 unsigned long irq_sources_bitmap; 1014 s64 kvmclock_offset; 1015 raw_spinlock_t tsc_write_lock; 1016 u64 last_tsc_nsec; 1017 u64 last_tsc_write; 1018 u32 last_tsc_khz; 1019 u64 cur_tsc_nsec; 1020 u64 cur_tsc_write; 1021 u64 cur_tsc_offset; 1022 u64 cur_tsc_generation; 1023 int nr_vcpus_matched_tsc; 1024 1025 spinlock_t pvclock_gtod_sync_lock; 1026 bool use_master_clock; 1027 u64 master_kernel_ns; 1028 u64 master_cycle_now; 1029 struct delayed_work kvmclock_update_work; 1030 struct delayed_work kvmclock_sync_work; 1031 1032 struct kvm_xen_hvm_config xen_hvm_config; 1033 1034 /* reads protected by irq_srcu, writes by irq_lock */ 1035 struct hlist_head mask_notifier_list; 1036 1037 struct kvm_hv hyperv; 1038 struct kvm_xen xen; 1039 1040 #ifdef CONFIG_KVM_MMU_AUDIT 1041 int audit_point; 1042 #endif 1043 1044 bool backwards_tsc_observed; 1045 bool boot_vcpu_runs_old_kvmclock; 1046 u32 bsp_vcpu_id; 1047 1048 u64 disabled_quirks; 1049 int cpu_dirty_logging_count; 1050 1051 enum kvm_irqchip_mode irqchip_mode; 1052 u8 nr_reserved_ioapic_pins; 1053 1054 bool disabled_lapic_found; 1055 1056 bool x2apic_format; 1057 bool x2apic_broadcast_quirk_disabled; 1058 1059 bool guest_can_read_msr_platform_info; 1060 bool exception_payload_enabled; 1061 1062 bool bus_lock_detection_enabled; 1063 1064 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1065 u32 user_space_msr_mask; 1066 struct kvm_x86_msr_filter __rcu *msr_filter; 1067 1068 /* Guest can access the SGX PROVISIONKEY. */ 1069 bool sgx_provisioning_allowed; 1070 1071 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1072 struct task_struct *nx_lpage_recovery_thread; 1073 1074 #ifdef CONFIG_X86_64 1075 /* 1076 * Whether the TDP MMU is enabled for this VM. This contains a 1077 * snapshot of the TDP MMU module parameter from when the VM was 1078 * created and remains unchanged for the life of the VM. If this is 1079 * true, TDP MMU handler functions will run for various MMU 1080 * operations. 1081 */ 1082 bool tdp_mmu_enabled; 1083 1084 /* 1085 * List of struct kvm_mmu_pages being used as roots. 1086 * All struct kvm_mmu_pages in the list should have 1087 * tdp_mmu_page set. 1088 * 1089 * For reads, this list is protected by: 1090 * the MMU lock in read mode + RCU or 1091 * the MMU lock in write mode 1092 * 1093 * For writes, this list is protected by: 1094 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1095 * the MMU lock in write mode 1096 * 1097 * Roots will remain in the list until their tdp_mmu_root_count 1098 * drops to zero, at which point the thread that decremented the 1099 * count to zero should removed the root from the list and clean 1100 * it up, freeing the root after an RCU grace period. 1101 */ 1102 struct list_head tdp_mmu_roots; 1103 1104 /* 1105 * List of struct kvmp_mmu_pages not being used as roots. 1106 * All struct kvm_mmu_pages in the list should have 1107 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1108 */ 1109 struct list_head tdp_mmu_pages; 1110 1111 /* 1112 * Protects accesses to the following fields when the MMU lock 1113 * is held in read mode: 1114 * - tdp_mmu_roots (above) 1115 * - tdp_mmu_pages (above) 1116 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1117 * - lpage_disallowed_mmu_pages 1118 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1119 * by the TDP MMU 1120 * It is acceptable, but not necessary, to acquire this lock when 1121 * the thread holds the MMU lock in write mode. 1122 */ 1123 spinlock_t tdp_mmu_pages_lock; 1124 #endif /* CONFIG_X86_64 */ 1125 }; 1126 1127 struct kvm_vm_stat { 1128 ulong mmu_shadow_zapped; 1129 ulong mmu_pte_write; 1130 ulong mmu_pde_zapped; 1131 ulong mmu_flooded; 1132 ulong mmu_recycled; 1133 ulong mmu_cache_miss; 1134 ulong mmu_unsync; 1135 ulong remote_tlb_flush; 1136 ulong lpages; 1137 ulong nx_lpage_splits; 1138 ulong max_mmu_page_hash_collisions; 1139 }; 1140 1141 struct kvm_vcpu_stat { 1142 u64 pf_fixed; 1143 u64 pf_guest; 1144 u64 tlb_flush; 1145 u64 invlpg; 1146 1147 u64 exits; 1148 u64 io_exits; 1149 u64 mmio_exits; 1150 u64 signal_exits; 1151 u64 irq_window_exits; 1152 u64 nmi_window_exits; 1153 u64 l1d_flush; 1154 u64 halt_exits; 1155 u64 halt_successful_poll; 1156 u64 halt_attempted_poll; 1157 u64 halt_poll_invalid; 1158 u64 halt_wakeup; 1159 u64 request_irq_exits; 1160 u64 irq_exits; 1161 u64 host_state_reload; 1162 u64 fpu_reload; 1163 u64 insn_emulation; 1164 u64 insn_emulation_fail; 1165 u64 hypercalls; 1166 u64 irq_injections; 1167 u64 nmi_injections; 1168 u64 req_event; 1169 u64 halt_poll_success_ns; 1170 u64 halt_poll_fail_ns; 1171 u64 nested_run; 1172 u64 directed_yield_attempted; 1173 u64 directed_yield_successful; 1174 }; 1175 1176 struct x86_instruction_info; 1177 1178 struct msr_data { 1179 bool host_initiated; 1180 u32 index; 1181 u64 data; 1182 }; 1183 1184 struct kvm_lapic_irq { 1185 u32 vector; 1186 u16 delivery_mode; 1187 u16 dest_mode; 1188 bool level; 1189 u16 trig_mode; 1190 u32 shorthand; 1191 u32 dest_id; 1192 bool msi_redir_hint; 1193 }; 1194 1195 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1196 { 1197 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1198 } 1199 1200 struct kvm_x86_ops { 1201 int (*hardware_enable)(void); 1202 void (*hardware_disable)(void); 1203 void (*hardware_unsetup)(void); 1204 bool (*cpu_has_accelerated_tpr)(void); 1205 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1206 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1207 1208 unsigned int vm_size; 1209 int (*vm_init)(struct kvm *kvm); 1210 void (*vm_destroy)(struct kvm *kvm); 1211 1212 /* Create, but do not attach this VCPU */ 1213 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1214 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1215 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1216 1217 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1218 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1219 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1220 1221 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1222 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1223 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1224 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1225 void (*get_segment)(struct kvm_vcpu *vcpu, 1226 struct kvm_segment *var, int seg); 1227 int (*get_cpl)(struct kvm_vcpu *vcpu); 1228 void (*set_segment)(struct kvm_vcpu *vcpu, 1229 struct kvm_segment *var, int seg); 1230 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1231 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1232 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1233 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1234 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1235 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1236 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1237 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1238 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1239 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1240 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1241 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1242 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1243 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1244 1245 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1246 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1247 int (*tlb_remote_flush)(struct kvm *kvm); 1248 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1249 struct kvm_tlb_range *range); 1250 1251 /* 1252 * Flush any TLB entries associated with the given GVA. 1253 * Does not need to flush GPA->HPA mappings. 1254 * Can potentially get non-canonical addresses through INVLPGs, which 1255 * the implementation may choose to ignore if appropriate. 1256 */ 1257 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1258 1259 /* 1260 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1261 * does not need to flush GPA->HPA mappings. 1262 */ 1263 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1264 1265 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1266 int (*handle_exit)(struct kvm_vcpu *vcpu, 1267 enum exit_fastpath_completion exit_fastpath); 1268 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1269 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1270 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1271 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1272 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1273 unsigned char *hypercall_addr); 1274 void (*set_irq)(struct kvm_vcpu *vcpu); 1275 void (*set_nmi)(struct kvm_vcpu *vcpu); 1276 void (*queue_exception)(struct kvm_vcpu *vcpu); 1277 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1278 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1279 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1280 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1281 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1282 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1283 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1284 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1285 bool (*check_apicv_inhibit_reasons)(ulong bit); 1286 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1287 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1288 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1289 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1290 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1291 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1292 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1293 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1294 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1295 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1296 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1297 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1298 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1299 1300 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1301 int root_level); 1302 1303 bool (*has_wbinvd_exit)(void); 1304 1305 /* Returns actual tsc_offset set in active VMCS */ 1306 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1307 1308 /* 1309 * Retrieve somewhat arbitrary exit information. Intended to be used 1310 * only from within tracepoints to avoid VMREADs when tracing is off. 1311 */ 1312 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1313 u32 *exit_int_info, u32 *exit_int_info_err_code); 1314 1315 int (*check_intercept)(struct kvm_vcpu *vcpu, 1316 struct x86_instruction_info *info, 1317 enum x86_intercept_stage stage, 1318 struct x86_exception *exception); 1319 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1320 1321 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1322 1323 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1324 1325 /* 1326 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1327 * value indicates CPU dirty logging is unsupported or disabled. 1328 */ 1329 int cpu_dirty_log_size; 1330 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1331 1332 /* pmu operations of sub-arch */ 1333 const struct kvm_pmu_ops *pmu_ops; 1334 const struct kvm_x86_nested_ops *nested_ops; 1335 1336 /* 1337 * Architecture specific hooks for vCPU blocking due to 1338 * HLT instruction. 1339 * Returns for .pre_block(): 1340 * - 0 means continue to block the vCPU. 1341 * - 1 means we cannot block the vCPU since some event 1342 * happens during this period, such as, 'ON' bit in 1343 * posted-interrupts descriptor is set. 1344 */ 1345 int (*pre_block)(struct kvm_vcpu *vcpu); 1346 void (*post_block)(struct kvm_vcpu *vcpu); 1347 1348 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1349 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1350 1351 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1352 uint32_t guest_irq, bool set); 1353 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1354 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1355 1356 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1357 bool *expired); 1358 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1359 1360 void (*setup_mce)(struct kvm_vcpu *vcpu); 1361 1362 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1363 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1364 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1365 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1366 1367 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1368 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1369 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1370 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1371 1372 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1373 1374 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1375 1376 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1377 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1378 1379 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1380 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1381 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1382 1383 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1384 }; 1385 1386 struct kvm_x86_nested_ops { 1387 int (*check_events)(struct kvm_vcpu *vcpu); 1388 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1389 void (*triple_fault)(struct kvm_vcpu *vcpu); 1390 int (*get_state)(struct kvm_vcpu *vcpu, 1391 struct kvm_nested_state __user *user_kvm_nested_state, 1392 unsigned user_data_size); 1393 int (*set_state)(struct kvm_vcpu *vcpu, 1394 struct kvm_nested_state __user *user_kvm_nested_state, 1395 struct kvm_nested_state *kvm_state); 1396 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1397 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1398 1399 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1400 uint16_t *vmcs_version); 1401 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1402 }; 1403 1404 struct kvm_x86_init_ops { 1405 int (*cpu_has_kvm_support)(void); 1406 int (*disabled_by_bios)(void); 1407 int (*check_processor_compatibility)(void); 1408 int (*hardware_setup)(void); 1409 1410 struct kvm_x86_ops *runtime_ops; 1411 }; 1412 1413 struct kvm_arch_async_pf { 1414 u32 token; 1415 gfn_t gfn; 1416 unsigned long cr3; 1417 bool direct_map; 1418 }; 1419 1420 extern u64 __read_mostly host_efer; 1421 extern bool __read_mostly allow_smaller_maxphyaddr; 1422 extern struct kvm_x86_ops kvm_x86_ops; 1423 1424 #define KVM_X86_OP(func) \ 1425 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1426 #define KVM_X86_OP_NULL KVM_X86_OP 1427 #include <asm/kvm-x86-ops.h> 1428 1429 static inline void kvm_ops_static_call_update(void) 1430 { 1431 #define KVM_X86_OP(func) \ 1432 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1433 #define KVM_X86_OP_NULL KVM_X86_OP 1434 #include <asm/kvm-x86-ops.h> 1435 } 1436 1437 #define __KVM_HAVE_ARCH_VM_ALLOC 1438 static inline struct kvm *kvm_arch_alloc_vm(void) 1439 { 1440 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1441 } 1442 void kvm_arch_free_vm(struct kvm *kvm); 1443 1444 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1445 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1446 { 1447 if (kvm_x86_ops.tlb_remote_flush && 1448 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1449 return 0; 1450 else 1451 return -ENOTSUPP; 1452 } 1453 1454 int kvm_mmu_module_init(void); 1455 void kvm_mmu_module_exit(void); 1456 1457 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1458 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1459 void kvm_mmu_init_vm(struct kvm *kvm); 1460 void kvm_mmu_uninit_vm(struct kvm *kvm); 1461 1462 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1463 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1464 struct kvm_memory_slot *memslot, 1465 int start_level); 1466 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1467 const struct kvm_memory_slot *memslot); 1468 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1469 struct kvm_memory_slot *memslot); 1470 void kvm_mmu_zap_all(struct kvm *kvm); 1471 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1472 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1473 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1474 1475 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1476 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1477 1478 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1479 const void *val, int bytes); 1480 1481 struct kvm_irq_mask_notifier { 1482 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1483 int irq; 1484 struct hlist_node link; 1485 }; 1486 1487 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1488 struct kvm_irq_mask_notifier *kimn); 1489 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1490 struct kvm_irq_mask_notifier *kimn); 1491 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1492 bool mask); 1493 1494 extern bool tdp_enabled; 1495 1496 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1497 1498 /* control of guest tsc rate supported? */ 1499 extern bool kvm_has_tsc_control; 1500 /* maximum supported tsc_khz for guests */ 1501 extern u32 kvm_max_guest_tsc_khz; 1502 /* number of bits of the fractional part of the TSC scaling ratio */ 1503 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1504 /* maximum allowed value of TSC scaling ratio */ 1505 extern u64 kvm_max_tsc_scaling_ratio; 1506 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1507 extern u64 kvm_default_tsc_scaling_ratio; 1508 /* bus lock detection supported? */ 1509 extern bool kvm_has_bus_lock_exit; 1510 1511 extern u64 kvm_mce_cap_supported; 1512 1513 /* 1514 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1515 * userspace I/O) to indicate that the emulation context 1516 * should be reused as is, i.e. skip initialization of 1517 * emulation context, instruction fetch and decode. 1518 * 1519 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1520 * Indicates that only select instructions (tagged with 1521 * EmulateOnUD) should be emulated (to minimize the emulator 1522 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1523 * 1524 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1525 * decode the instruction length. For use *only* by 1526 * kvm_x86_ops.skip_emulated_instruction() implementations. 1527 * 1528 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1529 * retry native execution under certain conditions, 1530 * Can only be set in conjunction with EMULTYPE_PF. 1531 * 1532 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1533 * triggered by KVM's magic "force emulation" prefix, 1534 * which is opt in via module param (off by default). 1535 * Bypasses EmulateOnUD restriction despite emulating 1536 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1537 * Used to test the full emulator from userspace. 1538 * 1539 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1540 * backdoor emulation, which is opt in via module param. 1541 * VMware backdoor emulation handles select instructions 1542 * and reinjects the #GP for all other cases. 1543 * 1544 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1545 * case the CR2/GPA value pass on the stack is valid. 1546 */ 1547 #define EMULTYPE_NO_DECODE (1 << 0) 1548 #define EMULTYPE_TRAP_UD (1 << 1) 1549 #define EMULTYPE_SKIP (1 << 2) 1550 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1551 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1552 #define EMULTYPE_VMWARE_GP (1 << 5) 1553 #define EMULTYPE_PF (1 << 6) 1554 1555 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1556 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1557 void *insn, int insn_len); 1558 1559 void kvm_enable_efer_bits(u64); 1560 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1561 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1562 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1563 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1564 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1565 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1566 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1567 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1568 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1569 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1570 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1571 1572 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1573 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1574 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1575 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1576 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1577 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1578 1579 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1580 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1581 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1582 1583 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1584 int reason, bool has_error_code, u32 error_code); 1585 1586 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1587 1588 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1589 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1590 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1591 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1592 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1593 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1594 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1595 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1596 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1597 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1598 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1599 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1600 1601 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1602 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1603 1604 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1605 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1606 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1607 1608 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1609 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1610 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1611 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1612 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1613 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1614 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1615 struct x86_exception *fault); 1616 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1617 gfn_t gfn, void *data, int offset, int len, 1618 u32 access); 1619 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1620 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1621 1622 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1623 int irq_source_id, int level) 1624 { 1625 /* Logical OR for level trig interrupt */ 1626 if (level) 1627 __set_bit(irq_source_id, irq_state); 1628 else 1629 __clear_bit(irq_source_id, irq_state); 1630 1631 return !!(*irq_state); 1632 } 1633 1634 #define KVM_MMU_ROOT_CURRENT BIT(0) 1635 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1636 #define KVM_MMU_ROOTS_ALL (~0UL) 1637 1638 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1639 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1640 1641 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1642 1643 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1644 1645 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1646 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1647 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1648 ulong roots_to_free); 1649 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1650 struct x86_exception *exception); 1651 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1652 struct x86_exception *exception); 1653 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1654 struct x86_exception *exception); 1655 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1656 struct x86_exception *exception); 1657 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1658 struct x86_exception *exception); 1659 1660 bool kvm_apicv_activated(struct kvm *kvm); 1661 void kvm_apicv_init(struct kvm *kvm, bool enable); 1662 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1663 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1664 unsigned long bit); 1665 1666 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1667 1668 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1669 void *insn, int insn_len); 1670 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1671 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1672 gva_t gva, hpa_t root_hpa); 1673 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1674 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1675 bool skip_mmu_sync); 1676 1677 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1678 int tdp_huge_page_level); 1679 1680 static inline u16 kvm_read_ldt(void) 1681 { 1682 u16 ldt; 1683 asm("sldt %0" : "=g"(ldt)); 1684 return ldt; 1685 } 1686 1687 static inline void kvm_load_ldt(u16 sel) 1688 { 1689 asm("lldt %0" : : "rm"(sel)); 1690 } 1691 1692 #ifdef CONFIG_X86_64 1693 static inline unsigned long read_msr(unsigned long msr) 1694 { 1695 u64 value; 1696 1697 rdmsrl(msr, value); 1698 return value; 1699 } 1700 #endif 1701 1702 static inline u32 get_rdx_init_val(void) 1703 { 1704 return 0x600; /* P6 family */ 1705 } 1706 1707 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1708 { 1709 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1710 } 1711 1712 #define TSS_IOPB_BASE_OFFSET 0x66 1713 #define TSS_BASE_SIZE 0x68 1714 #define TSS_IOPB_SIZE (65536 / 8) 1715 #define TSS_REDIRECTION_SIZE (256 / 8) 1716 #define RMODE_TSS_SIZE \ 1717 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1718 1719 enum { 1720 TASK_SWITCH_CALL = 0, 1721 TASK_SWITCH_IRET = 1, 1722 TASK_SWITCH_JMP = 2, 1723 TASK_SWITCH_GATE = 3, 1724 }; 1725 1726 #define HF_GIF_MASK (1 << 0) 1727 #define HF_NMI_MASK (1 << 3) 1728 #define HF_IRET_MASK (1 << 4) 1729 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1730 #define HF_SMM_MASK (1 << 6) 1731 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1732 1733 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1734 #define KVM_ADDRESS_SPACE_NUM 2 1735 1736 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1737 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1738 1739 asmlinkage void kvm_spurious_fault(void); 1740 1741 /* 1742 * Hardware virtualization extension instructions may fault if a 1743 * reboot turns off virtualization while processes are running. 1744 * Usually after catching the fault we just panic; during reboot 1745 * instead the instruction is ignored. 1746 */ 1747 #define __kvm_handle_fault_on_reboot(insn) \ 1748 "666: \n\t" \ 1749 insn "\n\t" \ 1750 "jmp 668f \n\t" \ 1751 "667: \n\t" \ 1752 "1: \n\t" \ 1753 ".pushsection .discard.instr_begin \n\t" \ 1754 ".long 1b - . \n\t" \ 1755 ".popsection \n\t" \ 1756 "call kvm_spurious_fault \n\t" \ 1757 "1: \n\t" \ 1758 ".pushsection .discard.instr_end \n\t" \ 1759 ".long 1b - . \n\t" \ 1760 ".popsection \n\t" \ 1761 "668: \n\t" \ 1762 _ASM_EXTABLE(666b, 667b) 1763 1764 #define KVM_ARCH_WANT_MMU_NOTIFIER 1765 1766 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1767 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1768 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1769 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1770 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1771 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1772 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1773 1774 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1775 unsigned long ipi_bitmap_high, u32 min, 1776 unsigned long icr, int op_64_bit); 1777 1778 void kvm_define_user_return_msr(unsigned index, u32 msr); 1779 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1780 1781 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1782 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1783 1784 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1785 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1786 1787 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1788 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1789 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1790 unsigned long *vcpu_bitmap); 1791 1792 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1793 struct kvm_async_pf *work); 1794 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1795 struct kvm_async_pf *work); 1796 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1797 struct kvm_async_pf *work); 1798 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1799 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1800 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1801 1802 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1803 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1804 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1805 1806 int kvm_is_in_guest(void); 1807 1808 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1809 u32 size); 1810 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1811 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1812 1813 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1814 struct kvm_vcpu **dest_vcpu); 1815 1816 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1817 struct kvm_lapic_irq *irq); 1818 1819 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1820 { 1821 /* We can only post Fixed and LowPrio IRQs */ 1822 return (irq->delivery_mode == APIC_DM_FIXED || 1823 irq->delivery_mode == APIC_DM_LOWEST); 1824 } 1825 1826 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1827 { 1828 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1829 } 1830 1831 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1832 { 1833 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1834 } 1835 1836 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1837 1838 static inline int kvm_cpu_get_apicid(int mps_cpu) 1839 { 1840 #ifdef CONFIG_X86_LOCAL_APIC 1841 return default_cpu_present_to_apicid(mps_cpu); 1842 #else 1843 WARN_ON_ONCE(1); 1844 return BAD_APICID; 1845 #endif 1846 } 1847 1848 #define put_smstate(type, buf, offset, val) \ 1849 *(type *)((buf) + (offset) - 0x7e00) = val 1850 1851 #define GET_SMSTATE(type, buf, offset) \ 1852 (*(type *)((buf) + (offset) - 0x7e00)) 1853 1854 int kvm_cpu_dirty_log_size(void); 1855 1856 #endif /* _ASM_X86_KVM_HOST_H */ 1857