1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 1024 41 42 /* 43 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs 44 * might be larger than the actual number of VCPUs because the 45 * APIC ID encodes CPU topology information. 46 * 47 * In the worst case, we'll need less than one extra bit for the 48 * Core ID, and less than one extra bit for the Package (Die) ID, 49 * so ratio of 4 should be enough. 50 */ 51 #define KVM_VCPU_ID_RATIO 4 52 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO) 53 54 /* memory slots that are not exposed to userspace */ 55 #define KVM_PRIVATE_MEM_SLOTS 3 56 57 #define KVM_HALT_POLL_NS_DEFAULT 200000 58 59 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 60 61 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 62 KVM_DIRTY_LOG_INITIALLY_SET) 63 64 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 65 KVM_BUS_LOCK_DETECTION_EXIT) 66 67 /* x86-specific vcpu->requests bit members */ 68 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 69 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 70 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 71 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 72 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 73 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 74 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 75 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 76 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 77 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 78 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 79 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 80 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 81 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 82 #define KVM_REQ_MCLOCK_INPROGRESS \ 83 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 84 #define KVM_REQ_SCAN_IOAPIC \ 85 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 87 #define KVM_REQ_APIC_PAGE_RELOAD \ 88 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 89 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 90 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 91 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 92 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 93 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 94 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 95 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 96 #define KVM_REQ_APICV_UPDATE \ 97 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 98 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 99 #define KVM_REQ_TLB_FLUSH_GUEST \ 100 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 101 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 102 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 103 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 104 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 105 106 #define CR0_RESERVED_BITS \ 107 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 108 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 109 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 110 111 #define CR4_RESERVED_BITS \ 112 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 113 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 114 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 115 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 116 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 117 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 118 119 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 120 121 122 123 #define INVALID_PAGE (~(hpa_t)0) 124 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 125 126 #define UNMAPPED_GVA (~(gpa_t)0) 127 #define INVALID_GPA (~(gpa_t)0) 128 129 /* KVM Hugepage definitions for x86 */ 130 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 131 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 132 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 133 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 134 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 135 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 136 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 137 138 #define KVM_PERMILLE_MMU_PAGES 20 139 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 140 #define KVM_MMU_HASH_SHIFT 12 141 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 142 #define KVM_MIN_FREE_MMU_PAGES 5 143 #define KVM_REFILL_PAGES 25 144 #define KVM_MAX_CPUID_ENTRIES 256 145 #define KVM_NR_FIXED_MTRR_REGION 88 146 #define KVM_NR_VAR_MTRR 8 147 148 #define ASYNC_PF_PER_VCPU 64 149 150 enum kvm_reg { 151 VCPU_REGS_RAX = __VCPU_REGS_RAX, 152 VCPU_REGS_RCX = __VCPU_REGS_RCX, 153 VCPU_REGS_RDX = __VCPU_REGS_RDX, 154 VCPU_REGS_RBX = __VCPU_REGS_RBX, 155 VCPU_REGS_RSP = __VCPU_REGS_RSP, 156 VCPU_REGS_RBP = __VCPU_REGS_RBP, 157 VCPU_REGS_RSI = __VCPU_REGS_RSI, 158 VCPU_REGS_RDI = __VCPU_REGS_RDI, 159 #ifdef CONFIG_X86_64 160 VCPU_REGS_R8 = __VCPU_REGS_R8, 161 VCPU_REGS_R9 = __VCPU_REGS_R9, 162 VCPU_REGS_R10 = __VCPU_REGS_R10, 163 VCPU_REGS_R11 = __VCPU_REGS_R11, 164 VCPU_REGS_R12 = __VCPU_REGS_R12, 165 VCPU_REGS_R13 = __VCPU_REGS_R13, 166 VCPU_REGS_R14 = __VCPU_REGS_R14, 167 VCPU_REGS_R15 = __VCPU_REGS_R15, 168 #endif 169 VCPU_REGS_RIP, 170 NR_VCPU_REGS, 171 172 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 173 VCPU_EXREG_CR0, 174 VCPU_EXREG_CR3, 175 VCPU_EXREG_CR4, 176 VCPU_EXREG_RFLAGS, 177 VCPU_EXREG_SEGMENTS, 178 VCPU_EXREG_EXIT_INFO_1, 179 VCPU_EXREG_EXIT_INFO_2, 180 }; 181 182 enum { 183 VCPU_SREG_ES, 184 VCPU_SREG_CS, 185 VCPU_SREG_SS, 186 VCPU_SREG_DS, 187 VCPU_SREG_FS, 188 VCPU_SREG_GS, 189 VCPU_SREG_TR, 190 VCPU_SREG_LDTR, 191 }; 192 193 enum exit_fastpath_completion { 194 EXIT_FASTPATH_NONE, 195 EXIT_FASTPATH_REENTER_GUEST, 196 EXIT_FASTPATH_EXIT_HANDLED, 197 }; 198 typedef enum exit_fastpath_completion fastpath_t; 199 200 struct x86_emulate_ctxt; 201 struct x86_exception; 202 enum x86_intercept; 203 enum x86_intercept_stage; 204 205 #define KVM_NR_DB_REGS 4 206 207 #define DR6_BUS_LOCK (1 << 11) 208 #define DR6_BD (1 << 13) 209 #define DR6_BS (1 << 14) 210 #define DR6_BT (1 << 15) 211 #define DR6_RTM (1 << 16) 212 /* 213 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 214 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 215 * they will never be 0 for now, but when they are defined 216 * in the future it will require no code change. 217 * 218 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 219 */ 220 #define DR6_ACTIVE_LOW 0xffff0ff0 221 #define DR6_VOLATILE 0x0001e80f 222 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 223 224 #define DR7_BP_EN_MASK 0x000000ff 225 #define DR7_GE (1 << 9) 226 #define DR7_GD (1 << 13) 227 #define DR7_FIXED_1 0x00000400 228 #define DR7_VOLATILE 0xffff2bff 229 230 #define KVM_GUESTDBG_VALID_MASK \ 231 (KVM_GUESTDBG_ENABLE | \ 232 KVM_GUESTDBG_SINGLESTEP | \ 233 KVM_GUESTDBG_USE_HW_BP | \ 234 KVM_GUESTDBG_USE_SW_BP | \ 235 KVM_GUESTDBG_INJECT_BP | \ 236 KVM_GUESTDBG_INJECT_DB | \ 237 KVM_GUESTDBG_BLOCKIRQ) 238 239 240 #define PFERR_PRESENT_BIT 0 241 #define PFERR_WRITE_BIT 1 242 #define PFERR_USER_BIT 2 243 #define PFERR_RSVD_BIT 3 244 #define PFERR_FETCH_BIT 4 245 #define PFERR_PK_BIT 5 246 #define PFERR_SGX_BIT 15 247 #define PFERR_GUEST_FINAL_BIT 32 248 #define PFERR_GUEST_PAGE_BIT 33 249 250 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 251 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 252 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 253 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 254 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 255 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 256 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 257 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 258 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 259 260 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 261 PFERR_WRITE_MASK | \ 262 PFERR_PRESENT_MASK) 263 264 /* apic attention bits */ 265 #define KVM_APIC_CHECK_VAPIC 0 266 /* 267 * The following bit is set with PV-EOI, unset on EOI. 268 * We detect PV-EOI changes by guest by comparing 269 * this bit with PV-EOI in guest memory. 270 * See the implementation in apic_update_pv_eoi. 271 */ 272 #define KVM_APIC_PV_EOI_PENDING 1 273 274 struct kvm_kernel_irq_routing_entry; 275 276 /* 277 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 278 * also includes TDP pages) to determine whether or not a page can be used in 279 * the given MMU context. This is a subset of the overall kvm_mmu_role to 280 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 281 * 2 bytes per gfn instead of 4 bytes per gfn. 282 * 283 * Indirect upper-level shadow pages are tracked for write-protection via 284 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 285 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 286 * gfn_track will overflow and explosions will ensure. 287 * 288 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 289 * cannot be reused. The ability to reuse a SP is tracked by its role, which 290 * incorporates various mode bits and properties of the SP. Roughly speaking, 291 * the number of unique SPs that can theoretically be created is 2^n, where n 292 * is the number of bits that are used to compute the role. 293 * 294 * But, even though there are 18 bits in the mask below, not all combinations 295 * of modes and flags are possible. The maximum number of possible upper-level 296 * shadow pages for a single gfn is in the neighborhood of 2^13. 297 * 298 * - invalid shadow pages are not accounted. 299 * - level is effectively limited to four combinations, not 16 as the number 300 * bits would imply, as 4k SPs are not tracked (allowed to go unsync). 301 * - level is effectively unused for non-PAE paging because there is exactly 302 * one upper level (see 4k SP exception above). 303 * - quadrant is used only for non-PAE paging and is exclusive with 304 * gpte_is_8_bytes. 305 * - execonly and ad_disabled are used only for nested EPT, which makes it 306 * exclusive with quadrant. 307 */ 308 union kvm_mmu_page_role { 309 u32 word; 310 struct { 311 unsigned level:4; 312 unsigned gpte_is_8_bytes:1; 313 unsigned quadrant:2; 314 unsigned direct:1; 315 unsigned access:3; 316 unsigned invalid:1; 317 unsigned efer_nx:1; 318 unsigned cr0_wp:1; 319 unsigned smep_andnot_wp:1; 320 unsigned smap_andnot_wp:1; 321 unsigned ad_disabled:1; 322 unsigned guest_mode:1; 323 unsigned :6; 324 325 /* 326 * This is left at the top of the word so that 327 * kvm_memslots_for_spte_role can extract it with a 328 * simple shift. While there is room, give it a whole 329 * byte so it is also faster to load it from memory. 330 */ 331 unsigned smm:8; 332 }; 333 }; 334 335 /* 336 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 337 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 338 * including on nested transitions, if nothing in the full role changes then 339 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 340 * don't treat all-zero structure as valid data. 341 * 342 * The properties that are tracked in the extended role but not the page role 343 * are for things that either (a) do not affect the validity of the shadow page 344 * or (b) are indirectly reflected in the shadow page's role. For example, 345 * CR4.PKE only affects permission checks for software walks of the guest page 346 * tables (because KVM doesn't support Protection Keys with shadow paging), and 347 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 348 * 349 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 350 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 351 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 352 * SMAP aware regardless of CR0.WP. 353 */ 354 union kvm_mmu_extended_role { 355 u32 word; 356 struct { 357 unsigned int valid:1; 358 unsigned int execonly:1; 359 unsigned int cr0_pg:1; 360 unsigned int cr4_pae:1; 361 unsigned int cr4_pse:1; 362 unsigned int cr4_pke:1; 363 unsigned int cr4_smap:1; 364 unsigned int cr4_smep:1; 365 unsigned int cr4_la57:1; 366 unsigned int efer_lma:1; 367 }; 368 }; 369 370 union kvm_mmu_role { 371 u64 as_u64; 372 struct { 373 union kvm_mmu_page_role base; 374 union kvm_mmu_extended_role ext; 375 }; 376 }; 377 378 struct kvm_rmap_head { 379 unsigned long val; 380 }; 381 382 struct kvm_pio_request { 383 unsigned long linear_rip; 384 unsigned long count; 385 int in; 386 int port; 387 int size; 388 }; 389 390 #define PT64_ROOT_MAX_LEVEL 5 391 392 struct rsvd_bits_validate { 393 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 394 u64 bad_mt_xwr; 395 }; 396 397 struct kvm_mmu_root_info { 398 gpa_t pgd; 399 hpa_t hpa; 400 }; 401 402 #define KVM_MMU_ROOT_INFO_INVALID \ 403 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 404 405 #define KVM_MMU_NUM_PREV_ROOTS 3 406 407 #define KVM_HAVE_MMU_RWLOCK 408 409 struct kvm_mmu_page; 410 struct kvm_page_fault; 411 412 /* 413 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 414 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 415 * current mmu mode. 416 */ 417 struct kvm_mmu { 418 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 419 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 420 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault); 421 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 422 struct x86_exception *fault); 423 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 424 u32 access, struct x86_exception *exception); 425 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 426 struct x86_exception *exception); 427 int (*sync_page)(struct kvm_vcpu *vcpu, 428 struct kvm_mmu_page *sp); 429 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 430 hpa_t root_hpa; 431 gpa_t root_pgd; 432 union kvm_mmu_role mmu_role; 433 u8 root_level; 434 u8 shadow_root_level; 435 u8 ept_ad; 436 bool direct_map; 437 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 438 439 /* 440 * Bitmap; bit set = permission fault 441 * Byte index: page fault error code [4:1] 442 * Bit index: pte permissions in ACC_* format 443 */ 444 u8 permissions[16]; 445 446 /* 447 * The pkru_mask indicates if protection key checks are needed. It 448 * consists of 16 domains indexed by page fault error code bits [4:1], 449 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 450 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 451 */ 452 u32 pkru_mask; 453 454 u64 *pae_root; 455 u64 *pml4_root; 456 u64 *pml5_root; 457 458 /* 459 * check zero bits on shadow page table entries, these 460 * bits include not only hardware reserved bits but also 461 * the bits spte never used. 462 */ 463 struct rsvd_bits_validate shadow_zero_check; 464 465 struct rsvd_bits_validate guest_rsvd_check; 466 467 u64 pdptrs[4]; /* pae */ 468 }; 469 470 struct kvm_tlb_range { 471 u64 start_gfn; 472 u64 pages; 473 }; 474 475 enum pmc_type { 476 KVM_PMC_GP = 0, 477 KVM_PMC_FIXED, 478 }; 479 480 struct kvm_pmc { 481 enum pmc_type type; 482 u8 idx; 483 u64 counter; 484 u64 eventsel; 485 struct perf_event *perf_event; 486 struct kvm_vcpu *vcpu; 487 /* 488 * eventsel value for general purpose counters, 489 * ctrl value for fixed counters. 490 */ 491 u64 current_config; 492 bool is_paused; 493 }; 494 495 struct kvm_pmu { 496 unsigned nr_arch_gp_counters; 497 unsigned nr_arch_fixed_counters; 498 unsigned available_event_types; 499 u64 fixed_ctr_ctrl; 500 u64 global_ctrl; 501 u64 global_status; 502 u64 counter_bitmask[2]; 503 u64 global_ctrl_mask; 504 u64 global_ovf_ctrl_mask; 505 u64 reserved_bits; 506 u8 version; 507 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 508 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 509 struct irq_work irq_work; 510 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 511 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 512 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 513 514 /* 515 * The gate to release perf_events not marked in 516 * pmc_in_use only once in a vcpu time slice. 517 */ 518 bool need_cleanup; 519 520 /* 521 * The total number of programmed perf_events and it helps to avoid 522 * redundant check before cleanup if guest don't use vPMU at all. 523 */ 524 u8 event_count; 525 }; 526 527 struct kvm_pmu_ops; 528 529 enum { 530 KVM_DEBUGREG_BP_ENABLED = 1, 531 KVM_DEBUGREG_WONT_EXIT = 2, 532 }; 533 534 struct kvm_mtrr_range { 535 u64 base; 536 u64 mask; 537 struct list_head node; 538 }; 539 540 struct kvm_mtrr { 541 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 542 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 543 u64 deftype; 544 545 struct list_head head; 546 }; 547 548 /* Hyper-V SynIC timer */ 549 struct kvm_vcpu_hv_stimer { 550 struct hrtimer timer; 551 int index; 552 union hv_stimer_config config; 553 u64 count; 554 u64 exp_time; 555 struct hv_message msg; 556 bool msg_pending; 557 }; 558 559 /* Hyper-V synthetic interrupt controller (SynIC)*/ 560 struct kvm_vcpu_hv_synic { 561 u64 version; 562 u64 control; 563 u64 msg_page; 564 u64 evt_page; 565 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 566 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 567 DECLARE_BITMAP(auto_eoi_bitmap, 256); 568 DECLARE_BITMAP(vec_bitmap, 256); 569 bool active; 570 bool dont_zero_synic_pages; 571 }; 572 573 /* Hyper-V per vcpu emulation context */ 574 struct kvm_vcpu_hv { 575 struct kvm_vcpu *vcpu; 576 u32 vp_index; 577 u64 hv_vapic; 578 s64 runtime_offset; 579 struct kvm_vcpu_hv_synic synic; 580 struct kvm_hyperv_exit exit; 581 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 582 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 583 bool enforce_cpuid; 584 struct { 585 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 586 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 587 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 588 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 589 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 590 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 591 } cpuid_cache; 592 }; 593 594 /* Xen HVM per vcpu emulation context */ 595 struct kvm_vcpu_xen { 596 u64 hypercall_rip; 597 u32 current_runstate; 598 bool vcpu_info_set; 599 bool vcpu_time_info_set; 600 bool runstate_set; 601 struct gfn_to_hva_cache vcpu_info_cache; 602 struct gfn_to_hva_cache vcpu_time_info_cache; 603 struct gfn_to_hva_cache runstate_cache; 604 u64 last_steal; 605 u64 runstate_entry_time; 606 u64 runstate_times[4]; 607 }; 608 609 struct kvm_vcpu_arch { 610 /* 611 * rip and regs accesses must go through 612 * kvm_{register,rip}_{read,write} functions. 613 */ 614 unsigned long regs[NR_VCPU_REGS]; 615 u32 regs_avail; 616 u32 regs_dirty; 617 618 unsigned long cr0; 619 unsigned long cr0_guest_owned_bits; 620 unsigned long cr2; 621 unsigned long cr3; 622 unsigned long cr4; 623 unsigned long cr4_guest_owned_bits; 624 unsigned long cr4_guest_rsvd_bits; 625 unsigned long cr8; 626 u32 host_pkru; 627 u32 pkru; 628 u32 hflags; 629 u64 efer; 630 u64 apic_base; 631 struct kvm_lapic *apic; /* kernel irqchip context */ 632 bool apicv_active; 633 bool load_eoi_exitmap_pending; 634 DECLARE_BITMAP(ioapic_handled_vectors, 256); 635 unsigned long apic_attention; 636 int32_t apic_arb_prio; 637 int mp_state; 638 u64 ia32_misc_enable_msr; 639 u64 smbase; 640 u64 smi_count; 641 bool tpr_access_reporting; 642 bool xsaves_enabled; 643 u64 ia32_xss; 644 u64 microcode_version; 645 u64 arch_capabilities; 646 u64 perf_capabilities; 647 648 /* 649 * Paging state of the vcpu 650 * 651 * If the vcpu runs in guest mode with two level paging this still saves 652 * the paging mode of the l1 guest. This context is always used to 653 * handle faults. 654 */ 655 struct kvm_mmu *mmu; 656 657 /* Non-nested MMU for L1 */ 658 struct kvm_mmu root_mmu; 659 660 /* L1 MMU when running nested */ 661 struct kvm_mmu guest_mmu; 662 663 /* 664 * Paging state of an L2 guest (used for nested npt) 665 * 666 * This context will save all necessary information to walk page tables 667 * of an L2 guest. This context is only initialized for page table 668 * walking and not for faulting since we never handle l2 page faults on 669 * the host. 670 */ 671 struct kvm_mmu nested_mmu; 672 673 /* 674 * Pointer to the mmu context currently used for 675 * gva_to_gpa translations. 676 */ 677 struct kvm_mmu *walk_mmu; 678 679 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 680 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 681 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 682 struct kvm_mmu_memory_cache mmu_page_header_cache; 683 684 /* 685 * QEMU userspace and the guest each have their own FPU state. 686 * In vcpu_run, we switch between the user and guest FPU contexts. 687 * While running a VCPU, the VCPU thread will have the guest FPU 688 * context. 689 * 690 * Note that while the PKRU state lives inside the fpu registers, 691 * it is switched out separately at VMENTER and VMEXIT time. The 692 * "guest_fpstate" state here contains the guest FPU context, with the 693 * host PRKU bits. 694 */ 695 struct fpu_guest guest_fpu; 696 697 u64 xcr0; 698 u64 guest_supported_xcr0; 699 700 struct kvm_pio_request pio; 701 void *pio_data; 702 void *sev_pio_data; 703 unsigned sev_pio_count; 704 705 u8 event_exit_inst_len; 706 707 struct kvm_queued_exception { 708 bool pending; 709 bool injected; 710 bool has_error_code; 711 u8 nr; 712 u32 error_code; 713 unsigned long payload; 714 bool has_payload; 715 u8 nested_apf; 716 } exception; 717 718 struct kvm_queued_interrupt { 719 bool injected; 720 bool soft; 721 u8 nr; 722 } interrupt; 723 724 int halt_request; /* real mode on Intel only */ 725 726 int cpuid_nent; 727 struct kvm_cpuid_entry2 *cpuid_entries; 728 u32 kvm_cpuid_base; 729 730 u64 reserved_gpa_bits; 731 int maxphyaddr; 732 733 /* emulate context */ 734 735 struct x86_emulate_ctxt *emulate_ctxt; 736 bool emulate_regs_need_sync_to_vcpu; 737 bool emulate_regs_need_sync_from_vcpu; 738 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 739 740 gpa_t time; 741 struct pvclock_vcpu_time_info hv_clock; 742 unsigned int hw_tsc_khz; 743 struct gfn_to_hva_cache pv_time; 744 bool pv_time_enabled; 745 /* set guest stopped flag in pvclock flags field */ 746 bool pvclock_set_guest_stopped_request; 747 748 struct { 749 u8 preempted; 750 u64 msr_val; 751 u64 last_steal; 752 struct gfn_to_hva_cache cache; 753 } st; 754 755 u64 l1_tsc_offset; 756 u64 tsc_offset; /* current tsc offset */ 757 u64 last_guest_tsc; 758 u64 last_host_tsc; 759 u64 tsc_offset_adjustment; 760 u64 this_tsc_nsec; 761 u64 this_tsc_write; 762 u64 this_tsc_generation; 763 bool tsc_catchup; 764 bool tsc_always_catchup; 765 s8 virtual_tsc_shift; 766 u32 virtual_tsc_mult; 767 u32 virtual_tsc_khz; 768 s64 ia32_tsc_adjust_msr; 769 u64 msr_ia32_power_ctl; 770 u64 l1_tsc_scaling_ratio; 771 u64 tsc_scaling_ratio; /* current scaling ratio */ 772 773 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 774 unsigned nmi_pending; /* NMI queued after currently running handler */ 775 bool nmi_injected; /* Trying to inject an NMI this entry */ 776 bool smi_pending; /* SMI queued after currently running handler */ 777 778 struct kvm_mtrr mtrr_state; 779 u64 pat; 780 781 unsigned switch_db_regs; 782 unsigned long db[KVM_NR_DB_REGS]; 783 unsigned long dr6; 784 unsigned long dr7; 785 unsigned long eff_db[KVM_NR_DB_REGS]; 786 unsigned long guest_debug_dr7; 787 u64 msr_platform_info; 788 u64 msr_misc_features_enables; 789 790 u64 mcg_cap; 791 u64 mcg_status; 792 u64 mcg_ctl; 793 u64 mcg_ext_ctl; 794 u64 *mce_banks; 795 796 /* Cache MMIO info */ 797 u64 mmio_gva; 798 unsigned mmio_access; 799 gfn_t mmio_gfn; 800 u64 mmio_gen; 801 802 struct kvm_pmu pmu; 803 804 /* used for guest single stepping over the given code position */ 805 unsigned long singlestep_rip; 806 807 bool hyperv_enabled; 808 struct kvm_vcpu_hv *hyperv; 809 struct kvm_vcpu_xen xen; 810 811 cpumask_var_t wbinvd_dirty_mask; 812 813 unsigned long last_retry_eip; 814 unsigned long last_retry_addr; 815 816 struct { 817 bool halted; 818 gfn_t gfns[ASYNC_PF_PER_VCPU]; 819 struct gfn_to_hva_cache data; 820 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 821 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 822 u16 vec; 823 u32 id; 824 bool send_user_only; 825 u32 host_apf_flags; 826 unsigned long nested_apf_token; 827 bool delivery_as_pf_vmexit; 828 bool pageready_pending; 829 } apf; 830 831 /* OSVW MSRs (AMD only) */ 832 struct { 833 u64 length; 834 u64 status; 835 } osvw; 836 837 struct { 838 u64 msr_val; 839 struct gfn_to_hva_cache data; 840 } pv_eoi; 841 842 u64 msr_kvm_poll_control; 843 844 /* 845 * Indicates the guest is trying to write a gfn that contains one or 846 * more of the PTEs used to translate the write itself, i.e. the access 847 * is changing its own translation in the guest page tables. KVM exits 848 * to userspace if emulation of the faulting instruction fails and this 849 * flag is set, as KVM cannot make forward progress. 850 * 851 * If emulation fails for a write to guest page tables, KVM unprotects 852 * (zaps) the shadow page for the target gfn and resumes the guest to 853 * retry the non-emulatable instruction (on hardware). Unprotecting the 854 * gfn doesn't allow forward progress for a self-changing access because 855 * doing so also zaps the translation for the gfn, i.e. retrying the 856 * instruction will hit a !PRESENT fault, which results in a new shadow 857 * page and sends KVM back to square one. 858 */ 859 bool write_fault_to_shadow_pgtable; 860 861 /* set at EPT violation at this point */ 862 unsigned long exit_qualification; 863 864 /* pv related host specific info */ 865 struct { 866 bool pv_unhalted; 867 } pv; 868 869 int pending_ioapic_eoi; 870 int pending_external_vector; 871 872 /* be preempted when it's in kernel-mode(cpl=0) */ 873 bool preempted_in_kernel; 874 875 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 876 bool l1tf_flush_l1d; 877 878 /* Host CPU on which VM-entry was most recently attempted */ 879 int last_vmentry_cpu; 880 881 /* AMD MSRC001_0015 Hardware Configuration */ 882 u64 msr_hwcr; 883 884 /* pv related cpuid info */ 885 struct { 886 /* 887 * value of the eax register in the KVM_CPUID_FEATURES CPUID 888 * leaf. 889 */ 890 u32 features; 891 892 /* 893 * indicates whether pv emulation should be disabled if features 894 * are not present in the guest's cpuid 895 */ 896 bool enforce; 897 } pv_cpuid; 898 899 /* Protected Guests */ 900 bool guest_state_protected; 901 902 /* 903 * Set when PDPTS were loaded directly by the userspace without 904 * reading the guest memory 905 */ 906 bool pdptrs_from_userspace; 907 908 #if IS_ENABLED(CONFIG_HYPERV) 909 hpa_t hv_root_tdp; 910 #endif 911 }; 912 913 struct kvm_lpage_info { 914 int disallow_lpage; 915 }; 916 917 struct kvm_arch_memory_slot { 918 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 919 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 920 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 921 }; 922 923 /* 924 * We use as the mode the number of bits allocated in the LDR for the 925 * logical processor ID. It happens that these are all powers of two. 926 * This makes it is very easy to detect cases where the APICs are 927 * configured for multiple modes; in that case, we cannot use the map and 928 * hence cannot use kvm_irq_delivery_to_apic_fast either. 929 */ 930 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 931 #define KVM_APIC_MODE_XAPIC_FLAT 8 932 #define KVM_APIC_MODE_X2APIC 16 933 934 struct kvm_apic_map { 935 struct rcu_head rcu; 936 u8 mode; 937 u32 max_apic_id; 938 union { 939 struct kvm_lapic *xapic_flat_map[8]; 940 struct kvm_lapic *xapic_cluster_map[16][4]; 941 }; 942 struct kvm_lapic *phys_map[]; 943 }; 944 945 /* Hyper-V synthetic debugger (SynDbg)*/ 946 struct kvm_hv_syndbg { 947 struct { 948 u64 control; 949 u64 status; 950 u64 send_page; 951 u64 recv_page; 952 u64 pending_page; 953 } control; 954 u64 options; 955 }; 956 957 /* Current state of Hyper-V TSC page clocksource */ 958 enum hv_tsc_page_status { 959 /* TSC page was not set up or disabled */ 960 HV_TSC_PAGE_UNSET = 0, 961 /* TSC page MSR was written by the guest, update pending */ 962 HV_TSC_PAGE_GUEST_CHANGED, 963 /* TSC page MSR was written by KVM userspace, update pending */ 964 HV_TSC_PAGE_HOST_CHANGED, 965 /* TSC page was properly set up and is currently active */ 966 HV_TSC_PAGE_SET, 967 /* TSC page is currently being updated and therefore is inactive */ 968 HV_TSC_PAGE_UPDATING, 969 /* TSC page was set up with an inaccessible GPA */ 970 HV_TSC_PAGE_BROKEN, 971 }; 972 973 /* Hyper-V emulation context */ 974 struct kvm_hv { 975 struct mutex hv_lock; 976 u64 hv_guest_os_id; 977 u64 hv_hypercall; 978 u64 hv_tsc_page; 979 enum hv_tsc_page_status hv_tsc_page_status; 980 981 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 982 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 983 u64 hv_crash_ctl; 984 985 struct ms_hyperv_tsc_page tsc_ref; 986 987 struct idr conn_to_evt; 988 989 u64 hv_reenlightenment_control; 990 u64 hv_tsc_emulation_control; 991 u64 hv_tsc_emulation_status; 992 993 /* How many vCPUs have VP index != vCPU index */ 994 atomic_t num_mismatched_vp_indexes; 995 996 /* 997 * How many SynICs use 'AutoEOI' feature 998 * (protected by arch.apicv_update_lock) 999 */ 1000 unsigned int synic_auto_eoi_used; 1001 1002 struct hv_partition_assist_pg *hv_pa_pg; 1003 struct kvm_hv_syndbg hv_syndbg; 1004 }; 1005 1006 struct msr_bitmap_range { 1007 u32 flags; 1008 u32 nmsrs; 1009 u32 base; 1010 unsigned long *bitmap; 1011 }; 1012 1013 /* Xen emulation context */ 1014 struct kvm_xen { 1015 bool long_mode; 1016 u8 upcall_vector; 1017 gfn_t shinfo_gfn; 1018 }; 1019 1020 enum kvm_irqchip_mode { 1021 KVM_IRQCHIP_NONE, 1022 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1023 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1024 }; 1025 1026 struct kvm_x86_msr_filter { 1027 u8 count; 1028 bool default_allow:1; 1029 struct msr_bitmap_range ranges[16]; 1030 }; 1031 1032 #define APICV_INHIBIT_REASON_DISABLE 0 1033 #define APICV_INHIBIT_REASON_HYPERV 1 1034 #define APICV_INHIBIT_REASON_NESTED 2 1035 #define APICV_INHIBIT_REASON_IRQWIN 3 1036 #define APICV_INHIBIT_REASON_PIT_REINJ 4 1037 #define APICV_INHIBIT_REASON_X2APIC 5 1038 #define APICV_INHIBIT_REASON_BLOCKIRQ 6 1039 1040 struct kvm_arch { 1041 unsigned long n_used_mmu_pages; 1042 unsigned long n_requested_mmu_pages; 1043 unsigned long n_max_mmu_pages; 1044 unsigned int indirect_shadow_pages; 1045 u8 mmu_valid_gen; 1046 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1047 struct list_head active_mmu_pages; 1048 struct list_head zapped_obsolete_pages; 1049 struct list_head lpage_disallowed_mmu_pages; 1050 struct kvm_page_track_notifier_node mmu_sp_tracker; 1051 struct kvm_page_track_notifier_head track_notifier_head; 1052 /* 1053 * Protects marking pages unsync during page faults, as TDP MMU page 1054 * faults only take mmu_lock for read. For simplicity, the unsync 1055 * pages lock is always taken when marking pages unsync regardless of 1056 * whether mmu_lock is held for read or write. 1057 */ 1058 spinlock_t mmu_unsync_pages_lock; 1059 1060 struct list_head assigned_dev_head; 1061 struct iommu_domain *iommu_domain; 1062 bool iommu_noncoherent; 1063 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1064 atomic_t noncoherent_dma_count; 1065 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1066 atomic_t assigned_device_count; 1067 struct kvm_pic *vpic; 1068 struct kvm_ioapic *vioapic; 1069 struct kvm_pit *vpit; 1070 atomic_t vapics_in_nmi_mode; 1071 struct mutex apic_map_lock; 1072 struct kvm_apic_map __rcu *apic_map; 1073 atomic_t apic_map_dirty; 1074 1075 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */ 1076 struct rw_semaphore apicv_update_lock; 1077 1078 bool apic_access_memslot_enabled; 1079 unsigned long apicv_inhibit_reasons; 1080 1081 gpa_t wall_clock; 1082 1083 bool mwait_in_guest; 1084 bool hlt_in_guest; 1085 bool pause_in_guest; 1086 bool cstate_in_guest; 1087 1088 unsigned long irq_sources_bitmap; 1089 s64 kvmclock_offset; 1090 1091 /* 1092 * This also protects nr_vcpus_matched_tsc which is read from a 1093 * preemption-disabled region, so it must be a raw spinlock. 1094 */ 1095 raw_spinlock_t tsc_write_lock; 1096 u64 last_tsc_nsec; 1097 u64 last_tsc_write; 1098 u32 last_tsc_khz; 1099 u64 last_tsc_offset; 1100 u64 cur_tsc_nsec; 1101 u64 cur_tsc_write; 1102 u64 cur_tsc_offset; 1103 u64 cur_tsc_generation; 1104 int nr_vcpus_matched_tsc; 1105 1106 seqcount_raw_spinlock_t pvclock_sc; 1107 bool use_master_clock; 1108 u64 master_kernel_ns; 1109 u64 master_cycle_now; 1110 struct delayed_work kvmclock_update_work; 1111 struct delayed_work kvmclock_sync_work; 1112 1113 struct kvm_xen_hvm_config xen_hvm_config; 1114 1115 /* reads protected by irq_srcu, writes by irq_lock */ 1116 struct hlist_head mask_notifier_list; 1117 1118 struct kvm_hv hyperv; 1119 struct kvm_xen xen; 1120 1121 #ifdef CONFIG_KVM_MMU_AUDIT 1122 int audit_point; 1123 #endif 1124 1125 bool backwards_tsc_observed; 1126 bool boot_vcpu_runs_old_kvmclock; 1127 u32 bsp_vcpu_id; 1128 1129 u64 disabled_quirks; 1130 int cpu_dirty_logging_count; 1131 1132 enum kvm_irqchip_mode irqchip_mode; 1133 u8 nr_reserved_ioapic_pins; 1134 1135 bool disabled_lapic_found; 1136 1137 bool x2apic_format; 1138 bool x2apic_broadcast_quirk_disabled; 1139 1140 bool guest_can_read_msr_platform_info; 1141 bool exception_payload_enabled; 1142 1143 bool bus_lock_detection_enabled; 1144 /* 1145 * If exit_on_emulation_error is set, and the in-kernel instruction 1146 * emulator fails to emulate an instruction, allow userspace 1147 * the opportunity to look at it. 1148 */ 1149 bool exit_on_emulation_error; 1150 1151 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1152 u32 user_space_msr_mask; 1153 struct kvm_x86_msr_filter __rcu *msr_filter; 1154 1155 u32 hypercall_exit_enabled; 1156 1157 /* Guest can access the SGX PROVISIONKEY. */ 1158 bool sgx_provisioning_allowed; 1159 1160 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1161 struct task_struct *nx_lpage_recovery_thread; 1162 1163 #ifdef CONFIG_X86_64 1164 /* 1165 * Whether the TDP MMU is enabled for this VM. This contains a 1166 * snapshot of the TDP MMU module parameter from when the VM was 1167 * created and remains unchanged for the life of the VM. If this is 1168 * true, TDP MMU handler functions will run for various MMU 1169 * operations. 1170 */ 1171 bool tdp_mmu_enabled; 1172 1173 /* 1174 * List of struct kvm_mmu_pages being used as roots. 1175 * All struct kvm_mmu_pages in the list should have 1176 * tdp_mmu_page set. 1177 * 1178 * For reads, this list is protected by: 1179 * the MMU lock in read mode + RCU or 1180 * the MMU lock in write mode 1181 * 1182 * For writes, this list is protected by: 1183 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1184 * the MMU lock in write mode 1185 * 1186 * Roots will remain in the list until their tdp_mmu_root_count 1187 * drops to zero, at which point the thread that decremented the 1188 * count to zero should removed the root from the list and clean 1189 * it up, freeing the root after an RCU grace period. 1190 */ 1191 struct list_head tdp_mmu_roots; 1192 1193 /* 1194 * List of struct kvmp_mmu_pages not being used as roots. 1195 * All struct kvm_mmu_pages in the list should have 1196 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1197 */ 1198 struct list_head tdp_mmu_pages; 1199 1200 /* 1201 * Protects accesses to the following fields when the MMU lock 1202 * is held in read mode: 1203 * - tdp_mmu_roots (above) 1204 * - tdp_mmu_pages (above) 1205 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1206 * - lpage_disallowed_mmu_pages 1207 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1208 * by the TDP MMU 1209 * It is acceptable, but not necessary, to acquire this lock when 1210 * the thread holds the MMU lock in write mode. 1211 */ 1212 spinlock_t tdp_mmu_pages_lock; 1213 #endif /* CONFIG_X86_64 */ 1214 1215 /* 1216 * If set, at least one shadow root has been allocated. This flag 1217 * is used as one input when determining whether certain memslot 1218 * related allocations are necessary. 1219 */ 1220 bool shadow_root_allocated; 1221 1222 #if IS_ENABLED(CONFIG_HYPERV) 1223 hpa_t hv_root_tdp; 1224 spinlock_t hv_root_tdp_lock; 1225 #endif 1226 }; 1227 1228 struct kvm_vm_stat { 1229 struct kvm_vm_stat_generic generic; 1230 u64 mmu_shadow_zapped; 1231 u64 mmu_pte_write; 1232 u64 mmu_pde_zapped; 1233 u64 mmu_flooded; 1234 u64 mmu_recycled; 1235 u64 mmu_cache_miss; 1236 u64 mmu_unsync; 1237 union { 1238 struct { 1239 atomic64_t pages_4k; 1240 atomic64_t pages_2m; 1241 atomic64_t pages_1g; 1242 }; 1243 atomic64_t pages[KVM_NR_PAGE_SIZES]; 1244 }; 1245 u64 nx_lpage_splits; 1246 u64 max_mmu_page_hash_collisions; 1247 u64 max_mmu_rmap_size; 1248 }; 1249 1250 struct kvm_vcpu_stat { 1251 struct kvm_vcpu_stat_generic generic; 1252 u64 pf_fixed; 1253 u64 pf_guest; 1254 u64 tlb_flush; 1255 u64 invlpg; 1256 1257 u64 exits; 1258 u64 io_exits; 1259 u64 mmio_exits; 1260 u64 signal_exits; 1261 u64 irq_window_exits; 1262 u64 nmi_window_exits; 1263 u64 l1d_flush; 1264 u64 halt_exits; 1265 u64 request_irq_exits; 1266 u64 irq_exits; 1267 u64 host_state_reload; 1268 u64 fpu_reload; 1269 u64 insn_emulation; 1270 u64 insn_emulation_fail; 1271 u64 hypercalls; 1272 u64 irq_injections; 1273 u64 nmi_injections; 1274 u64 req_event; 1275 u64 nested_run; 1276 u64 directed_yield_attempted; 1277 u64 directed_yield_successful; 1278 u64 guest_mode; 1279 }; 1280 1281 struct x86_instruction_info; 1282 1283 struct msr_data { 1284 bool host_initiated; 1285 u32 index; 1286 u64 data; 1287 }; 1288 1289 struct kvm_lapic_irq { 1290 u32 vector; 1291 u16 delivery_mode; 1292 u16 dest_mode; 1293 bool level; 1294 u16 trig_mode; 1295 u32 shorthand; 1296 u32 dest_id; 1297 bool msi_redir_hint; 1298 }; 1299 1300 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1301 { 1302 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1303 } 1304 1305 struct kvm_x86_ops { 1306 const char *name; 1307 1308 int (*hardware_enable)(void); 1309 void (*hardware_disable)(void); 1310 void (*hardware_unsetup)(void); 1311 bool (*cpu_has_accelerated_tpr)(void); 1312 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1313 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1314 1315 unsigned int vm_size; 1316 int (*vm_init)(struct kvm *kvm); 1317 void (*vm_destroy)(struct kvm *kvm); 1318 1319 /* Create, but do not attach this VCPU */ 1320 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1321 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1322 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1323 1324 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1325 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1326 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1327 1328 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1329 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1330 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1331 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1332 void (*get_segment)(struct kvm_vcpu *vcpu, 1333 struct kvm_segment *var, int seg); 1334 int (*get_cpl)(struct kvm_vcpu *vcpu); 1335 void (*set_segment)(struct kvm_vcpu *vcpu, 1336 struct kvm_segment *var, int seg); 1337 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1338 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1339 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1340 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1341 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1342 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1343 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1344 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1345 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1346 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1347 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1348 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1349 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1350 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1351 1352 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1353 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1354 int (*tlb_remote_flush)(struct kvm *kvm); 1355 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1356 struct kvm_tlb_range *range); 1357 1358 /* 1359 * Flush any TLB entries associated with the given GVA. 1360 * Does not need to flush GPA->HPA mappings. 1361 * Can potentially get non-canonical addresses through INVLPGs, which 1362 * the implementation may choose to ignore if appropriate. 1363 */ 1364 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1365 1366 /* 1367 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1368 * does not need to flush GPA->HPA mappings. 1369 */ 1370 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1371 1372 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1373 int (*handle_exit)(struct kvm_vcpu *vcpu, 1374 enum exit_fastpath_completion exit_fastpath); 1375 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1376 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1377 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1378 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1379 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1380 unsigned char *hypercall_addr); 1381 void (*set_irq)(struct kvm_vcpu *vcpu); 1382 void (*set_nmi)(struct kvm_vcpu *vcpu); 1383 void (*queue_exception)(struct kvm_vcpu *vcpu); 1384 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1385 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1386 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1387 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1388 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1389 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1390 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1391 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1392 bool (*check_apicv_inhibit_reasons)(ulong bit); 1393 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1394 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1395 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1396 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1397 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1398 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1399 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1400 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1401 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1402 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1403 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1404 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1405 1406 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1407 int root_level); 1408 1409 bool (*has_wbinvd_exit)(void); 1410 1411 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1412 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1413 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1414 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1415 1416 /* 1417 * Retrieve somewhat arbitrary exit information. Intended to 1418 * be used only from within tracepoints or error paths. 1419 */ 1420 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason, 1421 u64 *info1, u64 *info2, 1422 u32 *exit_int_info, u32 *exit_int_info_err_code); 1423 1424 int (*check_intercept)(struct kvm_vcpu *vcpu, 1425 struct x86_instruction_info *info, 1426 enum x86_intercept_stage stage, 1427 struct x86_exception *exception); 1428 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1429 1430 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1431 1432 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1433 1434 /* 1435 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1436 * value indicates CPU dirty logging is unsupported or disabled. 1437 */ 1438 int cpu_dirty_log_size; 1439 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1440 1441 /* pmu operations of sub-arch */ 1442 const struct kvm_pmu_ops *pmu_ops; 1443 const struct kvm_x86_nested_ops *nested_ops; 1444 1445 /* 1446 * Architecture specific hooks for vCPU blocking due to 1447 * HLT instruction. 1448 * Returns for .pre_block(): 1449 * - 0 means continue to block the vCPU. 1450 * - 1 means we cannot block the vCPU since some event 1451 * happens during this period, such as, 'ON' bit in 1452 * posted-interrupts descriptor is set. 1453 */ 1454 int (*pre_block)(struct kvm_vcpu *vcpu); 1455 void (*post_block)(struct kvm_vcpu *vcpu); 1456 1457 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1458 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1459 1460 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1461 uint32_t guest_irq, bool set); 1462 void (*start_assignment)(struct kvm *kvm); 1463 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1464 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1465 1466 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1467 bool *expired); 1468 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1469 1470 void (*setup_mce)(struct kvm_vcpu *vcpu); 1471 1472 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1473 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1474 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1475 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1476 1477 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1478 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1479 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1480 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1481 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1482 1483 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1484 1485 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1486 1487 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1488 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1489 1490 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1491 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1492 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1493 1494 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1495 }; 1496 1497 struct kvm_x86_nested_ops { 1498 int (*check_events)(struct kvm_vcpu *vcpu); 1499 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1500 void (*triple_fault)(struct kvm_vcpu *vcpu); 1501 int (*get_state)(struct kvm_vcpu *vcpu, 1502 struct kvm_nested_state __user *user_kvm_nested_state, 1503 unsigned user_data_size); 1504 int (*set_state)(struct kvm_vcpu *vcpu, 1505 struct kvm_nested_state __user *user_kvm_nested_state, 1506 struct kvm_nested_state *kvm_state); 1507 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1508 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1509 1510 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1511 uint16_t *vmcs_version); 1512 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1513 }; 1514 1515 struct kvm_x86_init_ops { 1516 int (*cpu_has_kvm_support)(void); 1517 int (*disabled_by_bios)(void); 1518 int (*check_processor_compatibility)(void); 1519 int (*hardware_setup)(void); 1520 1521 struct kvm_x86_ops *runtime_ops; 1522 }; 1523 1524 struct kvm_arch_async_pf { 1525 u32 token; 1526 gfn_t gfn; 1527 unsigned long cr3; 1528 bool direct_map; 1529 }; 1530 1531 extern u32 __read_mostly kvm_nr_uret_msrs; 1532 extern u64 __read_mostly host_efer; 1533 extern bool __read_mostly allow_smaller_maxphyaddr; 1534 extern bool __read_mostly enable_apicv; 1535 extern struct kvm_x86_ops kvm_x86_ops; 1536 1537 #define KVM_X86_OP(func) \ 1538 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1539 #define KVM_X86_OP_NULL KVM_X86_OP 1540 #include <asm/kvm-x86-ops.h> 1541 1542 static inline void kvm_ops_static_call_update(void) 1543 { 1544 #define KVM_X86_OP(func) \ 1545 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1546 #define KVM_X86_OP_NULL KVM_X86_OP 1547 #include <asm/kvm-x86-ops.h> 1548 } 1549 1550 #define __KVM_HAVE_ARCH_VM_ALLOC 1551 static inline struct kvm *kvm_arch_alloc_vm(void) 1552 { 1553 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1554 } 1555 1556 #define __KVM_HAVE_ARCH_VM_FREE 1557 void kvm_arch_free_vm(struct kvm *kvm); 1558 1559 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1560 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1561 { 1562 if (kvm_x86_ops.tlb_remote_flush && 1563 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1564 return 0; 1565 else 1566 return -ENOTSUPP; 1567 } 1568 1569 int kvm_mmu_module_init(void); 1570 void kvm_mmu_module_exit(void); 1571 1572 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1573 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1574 void kvm_mmu_init_vm(struct kvm *kvm); 1575 void kvm_mmu_uninit_vm(struct kvm *kvm); 1576 1577 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1578 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1579 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1580 const struct kvm_memory_slot *memslot, 1581 int start_level); 1582 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1583 const struct kvm_memory_slot *memslot); 1584 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1585 const struct kvm_memory_slot *memslot); 1586 void kvm_mmu_zap_all(struct kvm *kvm); 1587 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1588 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1589 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1590 1591 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1592 1593 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1594 const void *val, int bytes); 1595 1596 struct kvm_irq_mask_notifier { 1597 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1598 int irq; 1599 struct hlist_node link; 1600 }; 1601 1602 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1603 struct kvm_irq_mask_notifier *kimn); 1604 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1605 struct kvm_irq_mask_notifier *kimn); 1606 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1607 bool mask); 1608 1609 extern bool tdp_enabled; 1610 1611 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1612 1613 /* control of guest tsc rate supported? */ 1614 extern bool kvm_has_tsc_control; 1615 /* maximum supported tsc_khz for guests */ 1616 extern u32 kvm_max_guest_tsc_khz; 1617 /* number of bits of the fractional part of the TSC scaling ratio */ 1618 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1619 /* maximum allowed value of TSC scaling ratio */ 1620 extern u64 kvm_max_tsc_scaling_ratio; 1621 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1622 extern u64 kvm_default_tsc_scaling_ratio; 1623 /* bus lock detection supported? */ 1624 extern bool kvm_has_bus_lock_exit; 1625 1626 extern u64 kvm_mce_cap_supported; 1627 1628 /* 1629 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1630 * userspace I/O) to indicate that the emulation context 1631 * should be reused as is, i.e. skip initialization of 1632 * emulation context, instruction fetch and decode. 1633 * 1634 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1635 * Indicates that only select instructions (tagged with 1636 * EmulateOnUD) should be emulated (to minimize the emulator 1637 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1638 * 1639 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1640 * decode the instruction length. For use *only* by 1641 * kvm_x86_ops.skip_emulated_instruction() implementations. 1642 * 1643 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1644 * retry native execution under certain conditions, 1645 * Can only be set in conjunction with EMULTYPE_PF. 1646 * 1647 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1648 * triggered by KVM's magic "force emulation" prefix, 1649 * which is opt in via module param (off by default). 1650 * Bypasses EmulateOnUD restriction despite emulating 1651 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1652 * Used to test the full emulator from userspace. 1653 * 1654 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1655 * backdoor emulation, which is opt in via module param. 1656 * VMware backdoor emulation handles select instructions 1657 * and reinjects the #GP for all other cases. 1658 * 1659 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1660 * case the CR2/GPA value pass on the stack is valid. 1661 */ 1662 #define EMULTYPE_NO_DECODE (1 << 0) 1663 #define EMULTYPE_TRAP_UD (1 << 1) 1664 #define EMULTYPE_SKIP (1 << 2) 1665 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1666 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1667 #define EMULTYPE_VMWARE_GP (1 << 5) 1668 #define EMULTYPE_PF (1 << 6) 1669 1670 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1671 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1672 void *insn, int insn_len); 1673 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, 1674 u64 *data, u8 ndata); 1675 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu); 1676 1677 void kvm_enable_efer_bits(u64); 1678 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1679 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1680 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1681 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1682 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1683 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1684 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1685 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1686 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1687 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1688 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1689 1690 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1691 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1692 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1693 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1694 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1695 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1696 1697 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1698 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1699 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1700 1701 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1702 int reason, bool has_error_code, u32 error_code); 1703 1704 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1705 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1706 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1707 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1708 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1709 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1710 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1711 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1712 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1713 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1714 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1715 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1716 1717 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1718 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1719 1720 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1721 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1722 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1723 1724 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1725 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1726 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1727 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1729 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1730 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1731 struct x86_exception *fault); 1732 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1733 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1734 1735 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1736 int irq_source_id, int level) 1737 { 1738 /* Logical OR for level trig interrupt */ 1739 if (level) 1740 __set_bit(irq_source_id, irq_state); 1741 else 1742 __clear_bit(irq_source_id, irq_state); 1743 1744 return !!(*irq_state); 1745 } 1746 1747 #define KVM_MMU_ROOT_CURRENT BIT(0) 1748 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1749 #define KVM_MMU_ROOTS_ALL (~0UL) 1750 1751 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1752 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1753 1754 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1755 1756 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1757 1758 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1759 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1760 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1761 ulong roots_to_free); 1762 void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu); 1763 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1764 struct x86_exception *exception); 1765 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1766 struct x86_exception *exception); 1767 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1768 struct x86_exception *exception); 1769 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1770 struct x86_exception *exception); 1771 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1772 struct x86_exception *exception); 1773 1774 bool kvm_apicv_activated(struct kvm *kvm); 1775 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1776 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1777 unsigned long bit); 1778 1779 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, 1780 unsigned long bit); 1781 1782 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1783 1784 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1785 void *insn, int insn_len); 1786 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1787 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1788 gva_t gva, hpa_t root_hpa); 1789 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1790 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1791 1792 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, 1793 int tdp_max_root_level, int tdp_huge_page_level); 1794 1795 static inline u16 kvm_read_ldt(void) 1796 { 1797 u16 ldt; 1798 asm("sldt %0" : "=g"(ldt)); 1799 return ldt; 1800 } 1801 1802 static inline void kvm_load_ldt(u16 sel) 1803 { 1804 asm("lldt %0" : : "rm"(sel)); 1805 } 1806 1807 #ifdef CONFIG_X86_64 1808 static inline unsigned long read_msr(unsigned long msr) 1809 { 1810 u64 value; 1811 1812 rdmsrl(msr, value); 1813 return value; 1814 } 1815 #endif 1816 1817 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1818 { 1819 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1820 } 1821 1822 #define TSS_IOPB_BASE_OFFSET 0x66 1823 #define TSS_BASE_SIZE 0x68 1824 #define TSS_IOPB_SIZE (65536 / 8) 1825 #define TSS_REDIRECTION_SIZE (256 / 8) 1826 #define RMODE_TSS_SIZE \ 1827 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1828 1829 enum { 1830 TASK_SWITCH_CALL = 0, 1831 TASK_SWITCH_IRET = 1, 1832 TASK_SWITCH_JMP = 2, 1833 TASK_SWITCH_GATE = 3, 1834 }; 1835 1836 #define HF_GIF_MASK (1 << 0) 1837 #define HF_NMI_MASK (1 << 3) 1838 #define HF_IRET_MASK (1 << 4) 1839 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1840 #define HF_SMM_MASK (1 << 6) 1841 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1842 1843 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1844 #define KVM_ADDRESS_SPACE_NUM 2 1845 1846 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1847 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1848 1849 #define KVM_ARCH_WANT_MMU_NOTIFIER 1850 1851 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1852 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1853 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1854 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1855 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1856 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1857 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1858 1859 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1860 unsigned long ipi_bitmap_high, u32 min, 1861 unsigned long icr, int op_64_bit); 1862 1863 int kvm_add_user_return_msr(u32 msr); 1864 int kvm_find_user_return_msr(u32 msr); 1865 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1866 1867 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1868 { 1869 return kvm_find_user_return_msr(msr) >= 0; 1870 } 1871 1872 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio); 1873 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1874 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 1875 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 1876 1877 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1878 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1879 1880 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1881 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1882 unsigned long *vcpu_bitmap); 1883 1884 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1885 struct kvm_async_pf *work); 1886 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1887 struct kvm_async_pf *work); 1888 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1889 struct kvm_async_pf *work); 1890 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1891 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1892 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1893 1894 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1895 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1896 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1897 1898 int kvm_is_in_guest(void); 1899 1900 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1901 u32 size); 1902 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1903 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1904 1905 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1906 struct kvm_vcpu **dest_vcpu); 1907 1908 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1909 struct kvm_lapic_irq *irq); 1910 1911 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1912 { 1913 /* We can only post Fixed and LowPrio IRQs */ 1914 return (irq->delivery_mode == APIC_DM_FIXED || 1915 irq->delivery_mode == APIC_DM_LOWEST); 1916 } 1917 1918 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1919 { 1920 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1921 } 1922 1923 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1924 { 1925 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1926 } 1927 1928 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1929 1930 static inline int kvm_cpu_get_apicid(int mps_cpu) 1931 { 1932 #ifdef CONFIG_X86_LOCAL_APIC 1933 return default_cpu_present_to_apicid(mps_cpu); 1934 #else 1935 WARN_ON_ONCE(1); 1936 return BAD_APICID; 1937 #endif 1938 } 1939 1940 #define put_smstate(type, buf, offset, val) \ 1941 *(type *)((buf) + (offset) - 0x7e00) = val 1942 1943 #define GET_SMSTATE(type, buf, offset) \ 1944 (*(type *)((buf) + (offset) - 0x7e00)) 1945 1946 int kvm_cpu_dirty_log_size(void); 1947 1948 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); 1949 1950 #define KVM_CLOCK_VALID_FLAGS \ 1951 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC) 1952 1953 #endif /* _ASM_X86_KVM_HOST_H */ 1954