1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define KVM_MAX_VCPUS 288 39 #define KVM_SOFT_MAX_VCPUS 240 40 #define KVM_MAX_VCPU_ID 1023 41 #define KVM_USER_MEM_SLOTS 509 42 /* memory slots that are not exposed to userspace */ 43 #define KVM_PRIVATE_MEM_SLOTS 3 44 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 /* x86-specific vcpu->requests bit members */ 51 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 52 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 53 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 54 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 55 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 56 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5) 57 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 58 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 59 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 60 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 61 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 62 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 63 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 64 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 65 #define KVM_REQ_MCLOCK_INPROGRESS \ 66 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 67 #define KVM_REQ_SCAN_IOAPIC \ 68 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 70 #define KVM_REQ_APIC_PAGE_RELOAD \ 71 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 73 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 74 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 75 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 76 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 77 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 78 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 79 80 #define CR0_RESERVED_BITS \ 81 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 82 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 83 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 84 85 #define CR4_RESERVED_BITS \ 86 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 87 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 88 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 89 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 90 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 91 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 92 93 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 94 95 96 97 #define INVALID_PAGE (~(hpa_t)0) 98 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 99 100 #define UNMAPPED_GVA (~(gpa_t)0) 101 102 /* KVM Hugepage definitions for x86 */ 103 enum { 104 PT_PAGE_TABLE_LEVEL = 1, 105 PT_DIRECTORY_LEVEL = 2, 106 PT_PDPE_LEVEL = 3, 107 /* set max level to the biggest one */ 108 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL, 109 }; 110 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \ 111 PT_PAGE_TABLE_LEVEL + 1) 112 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 113 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 114 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 115 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 116 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 117 118 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 119 { 120 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 121 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 122 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 123 } 124 125 #define KVM_PERMILLE_MMU_PAGES 20 126 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 127 #define KVM_MMU_HASH_SHIFT 12 128 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 129 #define KVM_MIN_FREE_MMU_PAGES 5 130 #define KVM_REFILL_PAGES 25 131 #define KVM_MAX_CPUID_ENTRIES 80 132 #define KVM_NR_FIXED_MTRR_REGION 88 133 #define KVM_NR_VAR_MTRR 8 134 135 #define ASYNC_PF_PER_VCPU 64 136 137 enum kvm_reg { 138 VCPU_REGS_RAX = __VCPU_REGS_RAX, 139 VCPU_REGS_RCX = __VCPU_REGS_RCX, 140 VCPU_REGS_RDX = __VCPU_REGS_RDX, 141 VCPU_REGS_RBX = __VCPU_REGS_RBX, 142 VCPU_REGS_RSP = __VCPU_REGS_RSP, 143 VCPU_REGS_RBP = __VCPU_REGS_RBP, 144 VCPU_REGS_RSI = __VCPU_REGS_RSI, 145 VCPU_REGS_RDI = __VCPU_REGS_RDI, 146 #ifdef CONFIG_X86_64 147 VCPU_REGS_R8 = __VCPU_REGS_R8, 148 VCPU_REGS_R9 = __VCPU_REGS_R9, 149 VCPU_REGS_R10 = __VCPU_REGS_R10, 150 VCPU_REGS_R11 = __VCPU_REGS_R11, 151 VCPU_REGS_R12 = __VCPU_REGS_R12, 152 VCPU_REGS_R13 = __VCPU_REGS_R13, 153 VCPU_REGS_R14 = __VCPU_REGS_R14, 154 VCPU_REGS_R15 = __VCPU_REGS_R15, 155 #endif 156 VCPU_REGS_RIP, 157 NR_VCPU_REGS 158 }; 159 160 enum kvm_reg_ex { 161 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 162 VCPU_EXREG_CR3, 163 VCPU_EXREG_RFLAGS, 164 VCPU_EXREG_SEGMENTS, 165 }; 166 167 enum { 168 VCPU_SREG_ES, 169 VCPU_SREG_CS, 170 VCPU_SREG_SS, 171 VCPU_SREG_DS, 172 VCPU_SREG_FS, 173 VCPU_SREG_GS, 174 VCPU_SREG_TR, 175 VCPU_SREG_LDTR, 176 }; 177 178 #include <asm/kvm_emulate.h> 179 180 #define KVM_NR_MEM_OBJS 40 181 182 #define KVM_NR_DB_REGS 4 183 184 #define DR6_BD (1 << 13) 185 #define DR6_BS (1 << 14) 186 #define DR6_BT (1 << 15) 187 #define DR6_RTM (1 << 16) 188 #define DR6_FIXED_1 0xfffe0ff0 189 #define DR6_INIT 0xffff0ff0 190 #define DR6_VOLATILE 0x0001e00f 191 192 #define DR7_BP_EN_MASK 0x000000ff 193 #define DR7_GE (1 << 9) 194 #define DR7_GD (1 << 13) 195 #define DR7_FIXED_1 0x00000400 196 #define DR7_VOLATILE 0xffff2bff 197 198 #define PFERR_PRESENT_BIT 0 199 #define PFERR_WRITE_BIT 1 200 #define PFERR_USER_BIT 2 201 #define PFERR_RSVD_BIT 3 202 #define PFERR_FETCH_BIT 4 203 #define PFERR_PK_BIT 5 204 #define PFERR_GUEST_FINAL_BIT 32 205 #define PFERR_GUEST_PAGE_BIT 33 206 207 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 208 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 209 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 210 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 211 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 212 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 213 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 214 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 215 216 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 217 PFERR_WRITE_MASK | \ 218 PFERR_PRESENT_MASK) 219 220 /* 221 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 222 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 223 * with the SVE bit in EPT PTEs. 224 */ 225 #define SPTE_SPECIAL_MASK (1ULL << 62) 226 227 /* apic attention bits */ 228 #define KVM_APIC_CHECK_VAPIC 0 229 /* 230 * The following bit is set with PV-EOI, unset on EOI. 231 * We detect PV-EOI changes by guest by comparing 232 * this bit with PV-EOI in guest memory. 233 * See the implementation in apic_update_pv_eoi. 234 */ 235 #define KVM_APIC_PV_EOI_PENDING 1 236 237 struct kvm_kernel_irq_routing_entry; 238 239 /* 240 * We don't want allocation failures within the mmu code, so we preallocate 241 * enough memory for a single page fault in a cache. 242 */ 243 struct kvm_mmu_memory_cache { 244 int nobjs; 245 void *objects[KVM_NR_MEM_OBJS]; 246 }; 247 248 /* 249 * the pages used as guest page table on soft mmu are tracked by 250 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 251 * by indirect shadow page can not be more than 15 bits. 252 * 253 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 254 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 255 */ 256 union kvm_mmu_page_role { 257 u32 word; 258 struct { 259 unsigned level:4; 260 unsigned gpte_is_8_bytes:1; 261 unsigned quadrant:2; 262 unsigned direct:1; 263 unsigned access:3; 264 unsigned invalid:1; 265 unsigned nxe:1; 266 unsigned cr0_wp:1; 267 unsigned smep_andnot_wp:1; 268 unsigned smap_andnot_wp:1; 269 unsigned ad_disabled:1; 270 unsigned guest_mode:1; 271 unsigned :6; 272 273 /* 274 * This is left at the top of the word so that 275 * kvm_memslots_for_spte_role can extract it with a 276 * simple shift. While there is room, give it a whole 277 * byte so it is also faster to load it from memory. 278 */ 279 unsigned smm:8; 280 }; 281 }; 282 283 union kvm_mmu_extended_role { 284 /* 285 * This structure complements kvm_mmu_page_role caching everything needed for 286 * MMU configuration. If nothing in both these structures changed, MMU 287 * re-configuration can be skipped. @valid bit is set on first usage so we don't 288 * treat all-zero structure as valid data. 289 */ 290 u32 word; 291 struct { 292 unsigned int valid:1; 293 unsigned int execonly:1; 294 unsigned int cr0_pg:1; 295 unsigned int cr4_pae:1; 296 unsigned int cr4_pse:1; 297 unsigned int cr4_pke:1; 298 unsigned int cr4_smap:1; 299 unsigned int cr4_smep:1; 300 unsigned int cr4_la57:1; 301 unsigned int maxphyaddr:6; 302 }; 303 }; 304 305 union kvm_mmu_role { 306 u64 as_u64; 307 struct { 308 union kvm_mmu_page_role base; 309 union kvm_mmu_extended_role ext; 310 }; 311 }; 312 313 struct kvm_rmap_head { 314 unsigned long val; 315 }; 316 317 struct kvm_mmu_page { 318 struct list_head link; 319 struct hlist_node hash_link; 320 bool unsync; 321 bool mmio_cached; 322 323 /* 324 * The following two entries are used to key the shadow page in the 325 * hash table. 326 */ 327 union kvm_mmu_page_role role; 328 gfn_t gfn; 329 330 u64 *spt; 331 /* hold the gfn of each spte inside spt */ 332 gfn_t *gfns; 333 int root_count; /* Currently serving as active root */ 334 unsigned int unsync_children; 335 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 336 DECLARE_BITMAP(unsync_child_bitmap, 512); 337 338 #ifdef CONFIG_X86_32 339 /* 340 * Used out of the mmu-lock to avoid reading spte values while an 341 * update is in progress; see the comments in __get_spte_lockless(). 342 */ 343 int clear_spte_count; 344 #endif 345 346 /* Number of writes since the last time traversal visited this page. */ 347 atomic_t write_flooding_count; 348 }; 349 350 struct kvm_pio_request { 351 unsigned long linear_rip; 352 unsigned long count; 353 int in; 354 int port; 355 int size; 356 }; 357 358 #define PT64_ROOT_MAX_LEVEL 5 359 360 struct rsvd_bits_validate { 361 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 362 u64 bad_mt_xwr; 363 }; 364 365 struct kvm_mmu_root_info { 366 gpa_t cr3; 367 hpa_t hpa; 368 }; 369 370 #define KVM_MMU_ROOT_INFO_INVALID \ 371 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE }) 372 373 #define KVM_MMU_NUM_PREV_ROOTS 3 374 375 /* 376 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 377 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 378 * current mmu mode. 379 */ 380 struct kvm_mmu { 381 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 382 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 383 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 384 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 385 bool prefault); 386 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 387 struct x86_exception *fault); 388 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 389 struct x86_exception *exception); 390 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 391 struct x86_exception *exception); 392 int (*sync_page)(struct kvm_vcpu *vcpu, 393 struct kvm_mmu_page *sp); 394 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 395 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 396 u64 *spte, const void *pte); 397 hpa_t root_hpa; 398 gpa_t root_cr3; 399 union kvm_mmu_role mmu_role; 400 u8 root_level; 401 u8 shadow_root_level; 402 u8 ept_ad; 403 bool direct_map; 404 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 405 406 /* 407 * Bitmap; bit set = permission fault 408 * Byte index: page fault error code [4:1] 409 * Bit index: pte permissions in ACC_* format 410 */ 411 u8 permissions[16]; 412 413 /* 414 * The pkru_mask indicates if protection key checks are needed. It 415 * consists of 16 domains indexed by page fault error code bits [4:1], 416 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 417 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 418 */ 419 u32 pkru_mask; 420 421 u64 *pae_root; 422 u64 *lm_root; 423 424 /* 425 * check zero bits on shadow page table entries, these 426 * bits include not only hardware reserved bits but also 427 * the bits spte never used. 428 */ 429 struct rsvd_bits_validate shadow_zero_check; 430 431 struct rsvd_bits_validate guest_rsvd_check; 432 433 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 434 u8 last_nonleaf_level; 435 436 bool nx; 437 438 u64 pdptrs[4]; /* pae */ 439 }; 440 441 struct kvm_tlb_range { 442 u64 start_gfn; 443 u64 pages; 444 }; 445 446 enum pmc_type { 447 KVM_PMC_GP = 0, 448 KVM_PMC_FIXED, 449 }; 450 451 struct kvm_pmc { 452 enum pmc_type type; 453 u8 idx; 454 u64 counter; 455 u64 eventsel; 456 struct perf_event *perf_event; 457 struct kvm_vcpu *vcpu; 458 }; 459 460 struct kvm_pmu { 461 unsigned nr_arch_gp_counters; 462 unsigned nr_arch_fixed_counters; 463 unsigned available_event_types; 464 u64 fixed_ctr_ctrl; 465 u64 global_ctrl; 466 u64 global_status; 467 u64 global_ovf_ctrl; 468 u64 counter_bitmask[2]; 469 u64 global_ctrl_mask; 470 u64 global_ovf_ctrl_mask; 471 u64 reserved_bits; 472 u8 version; 473 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 474 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 475 struct irq_work irq_work; 476 u64 reprogram_pmi; 477 }; 478 479 struct kvm_pmu_ops; 480 481 enum { 482 KVM_DEBUGREG_BP_ENABLED = 1, 483 KVM_DEBUGREG_WONT_EXIT = 2, 484 KVM_DEBUGREG_RELOAD = 4, 485 }; 486 487 struct kvm_mtrr_range { 488 u64 base; 489 u64 mask; 490 struct list_head node; 491 }; 492 493 struct kvm_mtrr { 494 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 495 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 496 u64 deftype; 497 498 struct list_head head; 499 }; 500 501 /* Hyper-V SynIC timer */ 502 struct kvm_vcpu_hv_stimer { 503 struct hrtimer timer; 504 int index; 505 union hv_stimer_config config; 506 u64 count; 507 u64 exp_time; 508 struct hv_message msg; 509 bool msg_pending; 510 }; 511 512 /* Hyper-V synthetic interrupt controller (SynIC)*/ 513 struct kvm_vcpu_hv_synic { 514 u64 version; 515 u64 control; 516 u64 msg_page; 517 u64 evt_page; 518 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 519 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 520 DECLARE_BITMAP(auto_eoi_bitmap, 256); 521 DECLARE_BITMAP(vec_bitmap, 256); 522 bool active; 523 bool dont_zero_synic_pages; 524 }; 525 526 /* Hyper-V per vcpu emulation context */ 527 struct kvm_vcpu_hv { 528 u32 vp_index; 529 u64 hv_vapic; 530 s64 runtime_offset; 531 struct kvm_vcpu_hv_synic synic; 532 struct kvm_hyperv_exit exit; 533 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 534 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 535 cpumask_t tlb_flush; 536 }; 537 538 struct kvm_vcpu_arch { 539 /* 540 * rip and regs accesses must go through 541 * kvm_{register,rip}_{read,write} functions. 542 */ 543 unsigned long regs[NR_VCPU_REGS]; 544 u32 regs_avail; 545 u32 regs_dirty; 546 547 unsigned long cr0; 548 unsigned long cr0_guest_owned_bits; 549 unsigned long cr2; 550 unsigned long cr3; 551 unsigned long cr4; 552 unsigned long cr4_guest_owned_bits; 553 unsigned long cr8; 554 u32 pkru; 555 u32 hflags; 556 u64 efer; 557 u64 apic_base; 558 struct kvm_lapic *apic; /* kernel irqchip context */ 559 bool apicv_active; 560 bool load_eoi_exitmap_pending; 561 DECLARE_BITMAP(ioapic_handled_vectors, 256); 562 unsigned long apic_attention; 563 int32_t apic_arb_prio; 564 int mp_state; 565 u64 ia32_misc_enable_msr; 566 u64 smbase; 567 u64 smi_count; 568 bool tpr_access_reporting; 569 u64 ia32_xss; 570 u64 microcode_version; 571 u64 arch_capabilities; 572 573 /* 574 * Paging state of the vcpu 575 * 576 * If the vcpu runs in guest mode with two level paging this still saves 577 * the paging mode of the l1 guest. This context is always used to 578 * handle faults. 579 */ 580 struct kvm_mmu *mmu; 581 582 /* Non-nested MMU for L1 */ 583 struct kvm_mmu root_mmu; 584 585 /* L1 MMU when running nested */ 586 struct kvm_mmu guest_mmu; 587 588 /* 589 * Paging state of an L2 guest (used for nested npt) 590 * 591 * This context will save all necessary information to walk page tables 592 * of the an L2 guest. This context is only initialized for page table 593 * walking and not for faulting since we never handle l2 page faults on 594 * the host. 595 */ 596 struct kvm_mmu nested_mmu; 597 598 /* 599 * Pointer to the mmu context currently used for 600 * gva_to_gpa translations. 601 */ 602 struct kvm_mmu *walk_mmu; 603 604 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 605 struct kvm_mmu_memory_cache mmu_page_cache; 606 struct kvm_mmu_memory_cache mmu_page_header_cache; 607 608 /* 609 * QEMU userspace and the guest each have their own FPU state. 610 * In vcpu_run, we switch between the user, maintained in the 611 * task_struct struct, and guest FPU contexts. While running a VCPU, 612 * the VCPU thread will have the guest FPU context. 613 * 614 * Note that while the PKRU state lives inside the fpu registers, 615 * it is switched out separately at VMENTER and VMEXIT time. The 616 * "guest_fpu" state here contains the guest FPU context, with the 617 * host PRKU bits. 618 */ 619 struct fpu *guest_fpu; 620 621 u64 xcr0; 622 u64 guest_supported_xcr0; 623 u32 guest_xstate_size; 624 625 struct kvm_pio_request pio; 626 void *pio_data; 627 628 u8 event_exit_inst_len; 629 630 struct kvm_queued_exception { 631 bool pending; 632 bool injected; 633 bool has_error_code; 634 u8 nr; 635 u32 error_code; 636 unsigned long payload; 637 bool has_payload; 638 u8 nested_apf; 639 } exception; 640 641 struct kvm_queued_interrupt { 642 bool injected; 643 bool soft; 644 u8 nr; 645 } interrupt; 646 647 int halt_request; /* real mode on Intel only */ 648 649 int cpuid_nent; 650 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 651 652 int maxphyaddr; 653 654 /* emulate context */ 655 656 struct x86_emulate_ctxt emulate_ctxt; 657 bool emulate_regs_need_sync_to_vcpu; 658 bool emulate_regs_need_sync_from_vcpu; 659 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 660 661 gpa_t time; 662 struct pvclock_vcpu_time_info hv_clock; 663 unsigned int hw_tsc_khz; 664 struct gfn_to_hva_cache pv_time; 665 bool pv_time_enabled; 666 /* set guest stopped flag in pvclock flags field */ 667 bool pvclock_set_guest_stopped_request; 668 669 struct { 670 u64 msr_val; 671 u64 last_steal; 672 struct gfn_to_hva_cache stime; 673 struct kvm_steal_time steal; 674 } st; 675 676 u64 tsc_offset; 677 u64 last_guest_tsc; 678 u64 last_host_tsc; 679 u64 tsc_offset_adjustment; 680 u64 this_tsc_nsec; 681 u64 this_tsc_write; 682 u64 this_tsc_generation; 683 bool tsc_catchup; 684 bool tsc_always_catchup; 685 s8 virtual_tsc_shift; 686 u32 virtual_tsc_mult; 687 u32 virtual_tsc_khz; 688 s64 ia32_tsc_adjust_msr; 689 u64 tsc_scaling_ratio; 690 691 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 692 unsigned nmi_pending; /* NMI queued after currently running handler */ 693 bool nmi_injected; /* Trying to inject an NMI this entry */ 694 bool smi_pending; /* SMI queued after currently running handler */ 695 696 struct kvm_mtrr mtrr_state; 697 u64 pat; 698 699 unsigned switch_db_regs; 700 unsigned long db[KVM_NR_DB_REGS]; 701 unsigned long dr6; 702 unsigned long dr7; 703 unsigned long eff_db[KVM_NR_DB_REGS]; 704 unsigned long guest_debug_dr7; 705 u64 msr_platform_info; 706 u64 msr_misc_features_enables; 707 708 u64 mcg_cap; 709 u64 mcg_status; 710 u64 mcg_ctl; 711 u64 mcg_ext_ctl; 712 u64 *mce_banks; 713 714 /* Cache MMIO info */ 715 u64 mmio_gva; 716 unsigned access; 717 gfn_t mmio_gfn; 718 u64 mmio_gen; 719 720 struct kvm_pmu pmu; 721 722 /* used for guest single stepping over the given code position */ 723 unsigned long singlestep_rip; 724 725 struct kvm_vcpu_hv hyperv; 726 727 cpumask_var_t wbinvd_dirty_mask; 728 729 unsigned long last_retry_eip; 730 unsigned long last_retry_addr; 731 732 struct { 733 bool halted; 734 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 735 struct gfn_to_hva_cache data; 736 u64 msr_val; 737 u32 id; 738 bool send_user_only; 739 u32 host_apf_reason; 740 unsigned long nested_apf_token; 741 bool delivery_as_pf_vmexit; 742 } apf; 743 744 /* OSVW MSRs (AMD only) */ 745 struct { 746 u64 length; 747 u64 status; 748 } osvw; 749 750 struct { 751 u64 msr_val; 752 struct gfn_to_hva_cache data; 753 } pv_eoi; 754 755 /* 756 * Indicate whether the access faults on its page table in guest 757 * which is set when fix page fault and used to detect unhandeable 758 * instruction. 759 */ 760 bool write_fault_to_shadow_pgtable; 761 762 /* set at EPT violation at this point */ 763 unsigned long exit_qualification; 764 765 /* pv related host specific info */ 766 struct { 767 bool pv_unhalted; 768 } pv; 769 770 int pending_ioapic_eoi; 771 int pending_external_vector; 772 773 /* GPA available */ 774 bool gpa_available; 775 gpa_t gpa_val; 776 777 /* be preempted when it's in kernel-mode(cpl=0) */ 778 bool preempted_in_kernel; 779 780 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 781 bool l1tf_flush_l1d; 782 783 /* AMD MSRC001_0015 Hardware Configuration */ 784 u64 msr_hwcr; 785 }; 786 787 struct kvm_lpage_info { 788 int disallow_lpage; 789 }; 790 791 struct kvm_arch_memory_slot { 792 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 793 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 794 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 795 }; 796 797 /* 798 * We use as the mode the number of bits allocated in the LDR for the 799 * logical processor ID. It happens that these are all powers of two. 800 * This makes it is very easy to detect cases where the APICs are 801 * configured for multiple modes; in that case, we cannot use the map and 802 * hence cannot use kvm_irq_delivery_to_apic_fast either. 803 */ 804 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 805 #define KVM_APIC_MODE_XAPIC_FLAT 8 806 #define KVM_APIC_MODE_X2APIC 16 807 808 struct kvm_apic_map { 809 struct rcu_head rcu; 810 u8 mode; 811 u32 max_apic_id; 812 union { 813 struct kvm_lapic *xapic_flat_map[8]; 814 struct kvm_lapic *xapic_cluster_map[16][4]; 815 }; 816 struct kvm_lapic *phys_map[]; 817 }; 818 819 /* Hyper-V emulation context */ 820 struct kvm_hv { 821 struct mutex hv_lock; 822 u64 hv_guest_os_id; 823 u64 hv_hypercall; 824 u64 hv_tsc_page; 825 826 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 827 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 828 u64 hv_crash_ctl; 829 830 HV_REFERENCE_TSC_PAGE tsc_ref; 831 832 struct idr conn_to_evt; 833 834 u64 hv_reenlightenment_control; 835 u64 hv_tsc_emulation_control; 836 u64 hv_tsc_emulation_status; 837 838 /* How many vCPUs have VP index != vCPU index */ 839 atomic_t num_mismatched_vp_indexes; 840 }; 841 842 enum kvm_irqchip_mode { 843 KVM_IRQCHIP_NONE, 844 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 845 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 846 }; 847 848 struct kvm_arch { 849 unsigned long n_used_mmu_pages; 850 unsigned long n_requested_mmu_pages; 851 unsigned long n_max_mmu_pages; 852 unsigned int indirect_shadow_pages; 853 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 854 /* 855 * Hash table of struct kvm_mmu_page. 856 */ 857 struct list_head active_mmu_pages; 858 struct kvm_page_track_notifier_node mmu_sp_tracker; 859 struct kvm_page_track_notifier_head track_notifier_head; 860 861 struct list_head assigned_dev_head; 862 struct iommu_domain *iommu_domain; 863 bool iommu_noncoherent; 864 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 865 atomic_t noncoherent_dma_count; 866 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 867 atomic_t assigned_device_count; 868 struct kvm_pic *vpic; 869 struct kvm_ioapic *vioapic; 870 struct kvm_pit *vpit; 871 atomic_t vapics_in_nmi_mode; 872 struct mutex apic_map_lock; 873 struct kvm_apic_map *apic_map; 874 875 bool apic_access_page_done; 876 877 gpa_t wall_clock; 878 879 bool mwait_in_guest; 880 bool hlt_in_guest; 881 bool pause_in_guest; 882 883 unsigned long irq_sources_bitmap; 884 s64 kvmclock_offset; 885 raw_spinlock_t tsc_write_lock; 886 u64 last_tsc_nsec; 887 u64 last_tsc_write; 888 u32 last_tsc_khz; 889 u64 cur_tsc_nsec; 890 u64 cur_tsc_write; 891 u64 cur_tsc_offset; 892 u64 cur_tsc_generation; 893 int nr_vcpus_matched_tsc; 894 895 spinlock_t pvclock_gtod_sync_lock; 896 bool use_master_clock; 897 u64 master_kernel_ns; 898 u64 master_cycle_now; 899 struct delayed_work kvmclock_update_work; 900 struct delayed_work kvmclock_sync_work; 901 902 struct kvm_xen_hvm_config xen_hvm_config; 903 904 /* reads protected by irq_srcu, writes by irq_lock */ 905 struct hlist_head mask_notifier_list; 906 907 struct kvm_hv hyperv; 908 909 #ifdef CONFIG_KVM_MMU_AUDIT 910 int audit_point; 911 #endif 912 913 bool backwards_tsc_observed; 914 bool boot_vcpu_runs_old_kvmclock; 915 u32 bsp_vcpu_id; 916 917 u64 disabled_quirks; 918 919 enum kvm_irqchip_mode irqchip_mode; 920 u8 nr_reserved_ioapic_pins; 921 922 bool disabled_lapic_found; 923 924 bool x2apic_format; 925 bool x2apic_broadcast_quirk_disabled; 926 927 bool guest_can_read_msr_platform_info; 928 bool exception_payload_enabled; 929 }; 930 931 struct kvm_vm_stat { 932 ulong mmu_shadow_zapped; 933 ulong mmu_pte_write; 934 ulong mmu_pte_updated; 935 ulong mmu_pde_zapped; 936 ulong mmu_flooded; 937 ulong mmu_recycled; 938 ulong mmu_cache_miss; 939 ulong mmu_unsync; 940 ulong remote_tlb_flush; 941 ulong lpages; 942 ulong max_mmu_page_hash_collisions; 943 }; 944 945 struct kvm_vcpu_stat { 946 u64 pf_fixed; 947 u64 pf_guest; 948 u64 tlb_flush; 949 u64 invlpg; 950 951 u64 exits; 952 u64 io_exits; 953 u64 mmio_exits; 954 u64 signal_exits; 955 u64 irq_window_exits; 956 u64 nmi_window_exits; 957 u64 l1d_flush; 958 u64 halt_exits; 959 u64 halt_successful_poll; 960 u64 halt_attempted_poll; 961 u64 halt_poll_invalid; 962 u64 halt_wakeup; 963 u64 request_irq_exits; 964 u64 irq_exits; 965 u64 host_state_reload; 966 u64 fpu_reload; 967 u64 insn_emulation; 968 u64 insn_emulation_fail; 969 u64 hypercalls; 970 u64 irq_injections; 971 u64 nmi_injections; 972 u64 req_event; 973 }; 974 975 struct x86_instruction_info; 976 977 struct msr_data { 978 bool host_initiated; 979 u32 index; 980 u64 data; 981 }; 982 983 struct kvm_lapic_irq { 984 u32 vector; 985 u16 delivery_mode; 986 u16 dest_mode; 987 bool level; 988 u16 trig_mode; 989 u32 shorthand; 990 u32 dest_id; 991 bool msi_redir_hint; 992 }; 993 994 struct kvm_x86_ops { 995 int (*cpu_has_kvm_support)(void); /* __init */ 996 int (*disabled_by_bios)(void); /* __init */ 997 int (*hardware_enable)(void); 998 void (*hardware_disable)(void); 999 void (*check_processor_compatibility)(void *rtn); 1000 int (*hardware_setup)(void); /* __init */ 1001 void (*hardware_unsetup)(void); /* __exit */ 1002 bool (*cpu_has_accelerated_tpr)(void); 1003 bool (*has_emulated_msr)(int index); 1004 void (*cpuid_update)(struct kvm_vcpu *vcpu); 1005 1006 struct kvm *(*vm_alloc)(void); 1007 void (*vm_free)(struct kvm *); 1008 int (*vm_init)(struct kvm *kvm); 1009 void (*vm_destroy)(struct kvm *kvm); 1010 1011 /* Create, but do not attach this VCPU */ 1012 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 1013 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1014 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1015 1016 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1017 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1018 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1019 1020 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 1021 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1022 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1023 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1024 void (*get_segment)(struct kvm_vcpu *vcpu, 1025 struct kvm_segment *var, int seg); 1026 int (*get_cpl)(struct kvm_vcpu *vcpu); 1027 void (*set_segment)(struct kvm_vcpu *vcpu, 1028 struct kvm_segment *var, int seg); 1029 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1030 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 1031 void (*decache_cr3)(struct kvm_vcpu *vcpu); 1032 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 1033 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1034 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1035 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1036 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1037 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1038 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1039 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1040 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1041 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 1042 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 1043 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1044 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1045 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1046 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1047 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1048 1049 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 1050 int (*tlb_remote_flush)(struct kvm *kvm); 1051 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1052 struct kvm_tlb_range *range); 1053 1054 /* 1055 * Flush any TLB entries associated with the given GVA. 1056 * Does not need to flush GPA->HPA mappings. 1057 * Can potentially get non-canonical addresses through INVLPGs, which 1058 * the implementation may choose to ignore if appropriate. 1059 */ 1060 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1061 1062 void (*run)(struct kvm_vcpu *vcpu); 1063 int (*handle_exit)(struct kvm_vcpu *vcpu); 1064 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1065 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1066 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1067 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1068 unsigned char *hypercall_addr); 1069 void (*set_irq)(struct kvm_vcpu *vcpu); 1070 void (*set_nmi)(struct kvm_vcpu *vcpu); 1071 void (*queue_exception)(struct kvm_vcpu *vcpu); 1072 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1073 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 1074 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 1075 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1076 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1077 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1078 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1079 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1080 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 1081 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1082 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1083 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1084 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1085 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1086 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1087 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1088 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1089 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1090 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1091 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1092 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1093 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1094 int (*get_lpage_level)(void); 1095 bool (*rdtscp_supported)(void); 1096 bool (*invpcid_supported)(void); 1097 1098 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1099 1100 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1101 1102 bool (*has_wbinvd_exit)(void); 1103 1104 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1105 /* Returns actual tsc_offset set in active VMCS */ 1106 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1107 1108 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1109 1110 int (*check_intercept)(struct kvm_vcpu *vcpu, 1111 struct x86_instruction_info *info, 1112 enum x86_intercept_stage stage); 1113 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1114 bool (*mpx_supported)(void); 1115 bool (*xsaves_supported)(void); 1116 bool (*umip_emulated)(void); 1117 bool (*pt_supported)(void); 1118 1119 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1120 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1121 1122 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1123 1124 /* 1125 * Arch-specific dirty logging hooks. These hooks are only supposed to 1126 * be valid if the specific arch has hardware-accelerated dirty logging 1127 * mechanism. Currently only for PML on VMX. 1128 * 1129 * - slot_enable_log_dirty: 1130 * called when enabling log dirty mode for the slot. 1131 * - slot_disable_log_dirty: 1132 * called when disabling log dirty mode for the slot. 1133 * also called when slot is created with log dirty disabled. 1134 * - flush_log_dirty: 1135 * called before reporting dirty_bitmap to userspace. 1136 * - enable_log_dirty_pt_masked: 1137 * called when reenabling log dirty for the GFNs in the mask after 1138 * corresponding bits are cleared in slot->dirty_bitmap. 1139 */ 1140 void (*slot_enable_log_dirty)(struct kvm *kvm, 1141 struct kvm_memory_slot *slot); 1142 void (*slot_disable_log_dirty)(struct kvm *kvm, 1143 struct kvm_memory_slot *slot); 1144 void (*flush_log_dirty)(struct kvm *kvm); 1145 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1146 struct kvm_memory_slot *slot, 1147 gfn_t offset, unsigned long mask); 1148 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1149 1150 /* pmu operations of sub-arch */ 1151 const struct kvm_pmu_ops *pmu_ops; 1152 1153 /* 1154 * Architecture specific hooks for vCPU blocking due to 1155 * HLT instruction. 1156 * Returns for .pre_block(): 1157 * - 0 means continue to block the vCPU. 1158 * - 1 means we cannot block the vCPU since some event 1159 * happens during this period, such as, 'ON' bit in 1160 * posted-interrupts descriptor is set. 1161 */ 1162 int (*pre_block)(struct kvm_vcpu *vcpu); 1163 void (*post_block)(struct kvm_vcpu *vcpu); 1164 1165 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1166 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1167 1168 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1169 uint32_t guest_irq, bool set); 1170 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1171 1172 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1173 bool *expired); 1174 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1175 1176 void (*setup_mce)(struct kvm_vcpu *vcpu); 1177 1178 int (*get_nested_state)(struct kvm_vcpu *vcpu, 1179 struct kvm_nested_state __user *user_kvm_nested_state, 1180 unsigned user_data_size); 1181 int (*set_nested_state)(struct kvm_vcpu *vcpu, 1182 struct kvm_nested_state __user *user_kvm_nested_state, 1183 struct kvm_nested_state *kvm_state); 1184 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1185 1186 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1187 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1188 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1189 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1190 1191 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1192 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1193 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1194 1195 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1196 1197 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu, 1198 uint16_t *vmcs_version); 1199 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu); 1200 1201 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu); 1202 }; 1203 1204 struct kvm_arch_async_pf { 1205 u32 token; 1206 gfn_t gfn; 1207 unsigned long cr3; 1208 bool direct_map; 1209 }; 1210 1211 extern struct kvm_x86_ops *kvm_x86_ops; 1212 extern struct kmem_cache *x86_fpu_cache; 1213 1214 #define __KVM_HAVE_ARCH_VM_ALLOC 1215 static inline struct kvm *kvm_arch_alloc_vm(void) 1216 { 1217 return kvm_x86_ops->vm_alloc(); 1218 } 1219 1220 static inline void kvm_arch_free_vm(struct kvm *kvm) 1221 { 1222 return kvm_x86_ops->vm_free(kvm); 1223 } 1224 1225 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1226 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1227 { 1228 if (kvm_x86_ops->tlb_remote_flush && 1229 !kvm_x86_ops->tlb_remote_flush(kvm)) 1230 return 0; 1231 else 1232 return -ENOTSUPP; 1233 } 1234 1235 int kvm_mmu_module_init(void); 1236 void kvm_mmu_module_exit(void); 1237 1238 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1239 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1240 void kvm_mmu_init_vm(struct kvm *kvm); 1241 void kvm_mmu_uninit_vm(struct kvm *kvm); 1242 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1243 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1244 u64 acc_track_mask, u64 me_mask); 1245 1246 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1247 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1248 struct kvm_memory_slot *memslot); 1249 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1250 const struct kvm_memory_slot *memslot); 1251 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1252 struct kvm_memory_slot *memslot); 1253 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1254 struct kvm_memory_slot *memslot); 1255 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1256 struct kvm_memory_slot *memslot); 1257 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1258 struct kvm_memory_slot *slot, 1259 gfn_t gfn_offset, unsigned long mask); 1260 void kvm_mmu_zap_all(struct kvm *kvm); 1261 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1262 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1263 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1264 1265 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1266 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1267 1268 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1269 const void *val, int bytes); 1270 1271 struct kvm_irq_mask_notifier { 1272 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1273 int irq; 1274 struct hlist_node link; 1275 }; 1276 1277 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1278 struct kvm_irq_mask_notifier *kimn); 1279 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1280 struct kvm_irq_mask_notifier *kimn); 1281 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1282 bool mask); 1283 1284 extern bool tdp_enabled; 1285 1286 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1287 1288 /* control of guest tsc rate supported? */ 1289 extern bool kvm_has_tsc_control; 1290 /* maximum supported tsc_khz for guests */ 1291 extern u32 kvm_max_guest_tsc_khz; 1292 /* number of bits of the fractional part of the TSC scaling ratio */ 1293 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1294 /* maximum allowed value of TSC scaling ratio */ 1295 extern u64 kvm_max_tsc_scaling_ratio; 1296 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1297 extern u64 kvm_default_tsc_scaling_ratio; 1298 1299 extern u64 kvm_mce_cap_supported; 1300 1301 enum emulation_result { 1302 EMULATE_DONE, /* no further processing */ 1303 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1304 EMULATE_FAIL, /* can't emulate this instruction */ 1305 }; 1306 1307 #define EMULTYPE_NO_DECODE (1 << 0) 1308 #define EMULTYPE_TRAP_UD (1 << 1) 1309 #define EMULTYPE_SKIP (1 << 2) 1310 #define EMULTYPE_ALLOW_RETRY (1 << 3) 1311 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4) 1312 #define EMULTYPE_VMWARE (1 << 5) 1313 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1314 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1315 void *insn, int insn_len); 1316 1317 void kvm_enable_efer_bits(u64); 1318 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1319 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1320 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1321 1322 struct x86_emulate_ctxt; 1323 1324 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1325 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1326 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1327 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1328 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1329 1330 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1331 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1332 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1333 1334 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1335 int reason, bool has_error_code, u32 error_code); 1336 1337 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1338 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1339 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1340 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1341 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1342 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1343 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1344 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1345 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1346 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1347 1348 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1349 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1350 1351 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1352 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1353 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1354 1355 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1356 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1357 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1358 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1359 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1360 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1361 gfn_t gfn, void *data, int offset, int len, 1362 u32 access); 1363 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1364 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1365 1366 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1367 int irq_source_id, int level) 1368 { 1369 /* Logical OR for level trig interrupt */ 1370 if (level) 1371 __set_bit(irq_source_id, irq_state); 1372 else 1373 __clear_bit(irq_source_id, irq_state); 1374 1375 return !!(*irq_state); 1376 } 1377 1378 #define KVM_MMU_ROOT_CURRENT BIT(0) 1379 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1380 #define KVM_MMU_ROOTS_ALL (~0UL) 1381 1382 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1383 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1384 1385 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1386 1387 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1388 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1389 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1390 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1391 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1392 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1393 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1394 ulong roots_to_free); 1395 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1396 struct x86_exception *exception); 1397 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1398 struct x86_exception *exception); 1399 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1400 struct x86_exception *exception); 1401 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1402 struct x86_exception *exception); 1403 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1404 struct x86_exception *exception); 1405 1406 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1407 1408 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1409 1410 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1411 void *insn, int insn_len); 1412 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1413 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1414 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush); 1415 1416 void kvm_enable_tdp(void); 1417 void kvm_disable_tdp(void); 1418 1419 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1420 struct x86_exception *exception) 1421 { 1422 return gpa; 1423 } 1424 1425 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1426 { 1427 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1428 1429 return (struct kvm_mmu_page *)page_private(page); 1430 } 1431 1432 static inline u16 kvm_read_ldt(void) 1433 { 1434 u16 ldt; 1435 asm("sldt %0" : "=g"(ldt)); 1436 return ldt; 1437 } 1438 1439 static inline void kvm_load_ldt(u16 sel) 1440 { 1441 asm("lldt %0" : : "rm"(sel)); 1442 } 1443 1444 #ifdef CONFIG_X86_64 1445 static inline unsigned long read_msr(unsigned long msr) 1446 { 1447 u64 value; 1448 1449 rdmsrl(msr, value); 1450 return value; 1451 } 1452 #endif 1453 1454 static inline u32 get_rdx_init_val(void) 1455 { 1456 return 0x600; /* P6 family */ 1457 } 1458 1459 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1460 { 1461 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1462 } 1463 1464 #define TSS_IOPB_BASE_OFFSET 0x66 1465 #define TSS_BASE_SIZE 0x68 1466 #define TSS_IOPB_SIZE (65536 / 8) 1467 #define TSS_REDIRECTION_SIZE (256 / 8) 1468 #define RMODE_TSS_SIZE \ 1469 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1470 1471 enum { 1472 TASK_SWITCH_CALL = 0, 1473 TASK_SWITCH_IRET = 1, 1474 TASK_SWITCH_JMP = 2, 1475 TASK_SWITCH_GATE = 3, 1476 }; 1477 1478 #define HF_GIF_MASK (1 << 0) 1479 #define HF_HIF_MASK (1 << 1) 1480 #define HF_VINTR_MASK (1 << 2) 1481 #define HF_NMI_MASK (1 << 3) 1482 #define HF_IRET_MASK (1 << 4) 1483 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1484 #define HF_SMM_MASK (1 << 6) 1485 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1486 1487 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1488 #define KVM_ADDRESS_SPACE_NUM 2 1489 1490 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1491 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1492 1493 /* 1494 * Hardware virtualization extension instructions may fault if a 1495 * reboot turns off virtualization while processes are running. 1496 * Trap the fault and ignore the instruction if that happens. 1497 */ 1498 asmlinkage void kvm_spurious_fault(void); 1499 1500 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1501 "666: " insn "\n\t" \ 1502 "668: \n\t" \ 1503 ".pushsection .fixup, \"ax\" \n" \ 1504 "667: \n\t" \ 1505 cleanup_insn "\n\t" \ 1506 "cmpb $0, kvm_rebooting \n\t" \ 1507 "jne 668b \n\t" \ 1508 __ASM_SIZE(push) " $666b \n\t" \ 1509 "jmp kvm_spurious_fault \n\t" \ 1510 ".popsection \n\t" \ 1511 _ASM_EXTABLE(666b, 667b) 1512 1513 #define __kvm_handle_fault_on_reboot(insn) \ 1514 ____kvm_handle_fault_on_reboot(insn, "") 1515 1516 #define KVM_ARCH_WANT_MMU_NOTIFIER 1517 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1518 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1519 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1520 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1521 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1522 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1523 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1524 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1525 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1526 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1527 1528 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1529 unsigned long ipi_bitmap_high, u32 min, 1530 unsigned long icr, int op_64_bit); 1531 1532 u64 kvm_get_arch_capabilities(void); 1533 void kvm_define_shared_msr(unsigned index, u32 msr); 1534 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1535 1536 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1537 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1538 1539 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1540 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1541 1542 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1543 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1544 1545 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1546 struct kvm_async_pf *work); 1547 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1548 struct kvm_async_pf *work); 1549 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1550 struct kvm_async_pf *work); 1551 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1552 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1553 1554 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1555 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1556 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1557 1558 int kvm_is_in_guest(void); 1559 1560 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1561 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1562 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1563 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1564 1565 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1566 struct kvm_vcpu **dest_vcpu); 1567 1568 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1569 struct kvm_lapic_irq *irq); 1570 1571 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1572 { 1573 if (kvm_x86_ops->vcpu_blocking) 1574 kvm_x86_ops->vcpu_blocking(vcpu); 1575 } 1576 1577 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1578 { 1579 if (kvm_x86_ops->vcpu_unblocking) 1580 kvm_x86_ops->vcpu_unblocking(vcpu); 1581 } 1582 1583 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1584 1585 static inline int kvm_cpu_get_apicid(int mps_cpu) 1586 { 1587 #ifdef CONFIG_X86_LOCAL_APIC 1588 return default_cpu_present_to_apicid(mps_cpu); 1589 #else 1590 WARN_ON_ONCE(1); 1591 return BAD_APICID; 1592 #endif 1593 } 1594 1595 #define put_smstate(type, buf, offset, val) \ 1596 *(type *)((buf) + (offset) - 0x7e00) = val 1597 1598 #define GET_SMSTATE(type, buf, offset) \ 1599 (*(type *)((buf) + (offset) - 0x7e00)) 1600 1601 #endif /* _ASM_X86_KVM_HOST_H */ 1602