1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 #include <linux/hyperv.h> 29 30 #include <asm/pvclock-abi.h> 31 #include <asm/desc.h> 32 #include <asm/mtrr.h> 33 #include <asm/msr-index.h> 34 #include <asm/asm.h> 35 #include <asm/kvm_page_track.h> 36 37 #define KVM_MAX_VCPUS 255 38 #define KVM_SOFT_MAX_VCPUS 160 39 #define KVM_USER_MEM_SLOTS 509 40 /* memory slots that are not exposed to userspace */ 41 #define KVM_PRIVATE_MEM_SLOTS 3 42 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 43 44 #define KVM_PIO_PAGE_OFFSET 1 45 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 46 #define KVM_HALT_POLL_NS_DEFAULT 400000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 /* x86-specific vcpu->requests bit members */ 51 #define KVM_REQ_MIGRATE_TIMER 8 52 #define KVM_REQ_REPORT_TPR_ACCESS 9 53 #define KVM_REQ_TRIPLE_FAULT 10 54 #define KVM_REQ_MMU_SYNC 11 55 #define KVM_REQ_CLOCK_UPDATE 12 56 #define KVM_REQ_DEACTIVATE_FPU 13 57 #define KVM_REQ_EVENT 14 58 #define KVM_REQ_APF_HALT 15 59 #define KVM_REQ_STEAL_UPDATE 16 60 #define KVM_REQ_NMI 17 61 #define KVM_REQ_PMU 18 62 #define KVM_REQ_PMI 19 63 #define KVM_REQ_SMI 20 64 #define KVM_REQ_MASTERCLOCK_UPDATE 21 65 #define KVM_REQ_MCLOCK_INPROGRESS 22 66 #define KVM_REQ_SCAN_IOAPIC 23 67 #define KVM_REQ_GLOBAL_CLOCK_UPDATE 24 68 #define KVM_REQ_APIC_PAGE_RELOAD 25 69 #define KVM_REQ_HV_CRASH 26 70 #define KVM_REQ_IOAPIC_EOI_EXIT 27 71 #define KVM_REQ_HV_RESET 28 72 #define KVM_REQ_HV_EXIT 29 73 #define KVM_REQ_HV_STIMER 30 74 75 #define CR0_RESERVED_BITS \ 76 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 77 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 78 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 79 80 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 81 #define CR3_PCID_INVD BIT_64(63) 82 #define CR4_RESERVED_BITS \ 83 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 84 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 85 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 86 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 87 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP \ 88 | X86_CR4_PKE)) 89 90 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 91 92 93 94 #define INVALID_PAGE (~(hpa_t)0) 95 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 96 97 #define UNMAPPED_GVA (~(gpa_t)0) 98 99 /* KVM Hugepage definitions for x86 */ 100 #define KVM_NR_PAGE_SIZES 3 101 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 102 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 103 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 104 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 105 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 106 107 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 108 { 109 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 110 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 111 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 112 } 113 114 #define KVM_PERMILLE_MMU_PAGES 20 115 #define KVM_MIN_ALLOC_MMU_PAGES 64 116 #define KVM_MMU_HASH_SHIFT 10 117 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 118 #define KVM_MIN_FREE_MMU_PAGES 5 119 #define KVM_REFILL_PAGES 25 120 #define KVM_MAX_CPUID_ENTRIES 80 121 #define KVM_NR_FIXED_MTRR_REGION 88 122 #define KVM_NR_VAR_MTRR 8 123 124 #define ASYNC_PF_PER_VCPU 64 125 126 enum kvm_reg { 127 VCPU_REGS_RAX = 0, 128 VCPU_REGS_RCX = 1, 129 VCPU_REGS_RDX = 2, 130 VCPU_REGS_RBX = 3, 131 VCPU_REGS_RSP = 4, 132 VCPU_REGS_RBP = 5, 133 VCPU_REGS_RSI = 6, 134 VCPU_REGS_RDI = 7, 135 #ifdef CONFIG_X86_64 136 VCPU_REGS_R8 = 8, 137 VCPU_REGS_R9 = 9, 138 VCPU_REGS_R10 = 10, 139 VCPU_REGS_R11 = 11, 140 VCPU_REGS_R12 = 12, 141 VCPU_REGS_R13 = 13, 142 VCPU_REGS_R14 = 14, 143 VCPU_REGS_R15 = 15, 144 #endif 145 VCPU_REGS_RIP, 146 NR_VCPU_REGS 147 }; 148 149 enum kvm_reg_ex { 150 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 151 VCPU_EXREG_CR3, 152 VCPU_EXREG_RFLAGS, 153 VCPU_EXREG_SEGMENTS, 154 }; 155 156 enum { 157 VCPU_SREG_ES, 158 VCPU_SREG_CS, 159 VCPU_SREG_SS, 160 VCPU_SREG_DS, 161 VCPU_SREG_FS, 162 VCPU_SREG_GS, 163 VCPU_SREG_TR, 164 VCPU_SREG_LDTR, 165 }; 166 167 #include <asm/kvm_emulate.h> 168 169 #define KVM_NR_MEM_OBJS 40 170 171 #define KVM_NR_DB_REGS 4 172 173 #define DR6_BD (1 << 13) 174 #define DR6_BS (1 << 14) 175 #define DR6_RTM (1 << 16) 176 #define DR6_FIXED_1 0xfffe0ff0 177 #define DR6_INIT 0xffff0ff0 178 #define DR6_VOLATILE 0x0001e00f 179 180 #define DR7_BP_EN_MASK 0x000000ff 181 #define DR7_GE (1 << 9) 182 #define DR7_GD (1 << 13) 183 #define DR7_FIXED_1 0x00000400 184 #define DR7_VOLATILE 0xffff2bff 185 186 #define PFERR_PRESENT_BIT 0 187 #define PFERR_WRITE_BIT 1 188 #define PFERR_USER_BIT 2 189 #define PFERR_RSVD_BIT 3 190 #define PFERR_FETCH_BIT 4 191 #define PFERR_PK_BIT 5 192 193 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 194 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 195 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 196 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 197 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 198 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 199 200 /* apic attention bits */ 201 #define KVM_APIC_CHECK_VAPIC 0 202 /* 203 * The following bit is set with PV-EOI, unset on EOI. 204 * We detect PV-EOI changes by guest by comparing 205 * this bit with PV-EOI in guest memory. 206 * See the implementation in apic_update_pv_eoi. 207 */ 208 #define KVM_APIC_PV_EOI_PENDING 1 209 210 struct kvm_kernel_irq_routing_entry; 211 212 /* 213 * We don't want allocation failures within the mmu code, so we preallocate 214 * enough memory for a single page fault in a cache. 215 */ 216 struct kvm_mmu_memory_cache { 217 int nobjs; 218 void *objects[KVM_NR_MEM_OBJS]; 219 }; 220 221 /* 222 * the pages used as guest page table on soft mmu are tracked by 223 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 224 * by indirect shadow page can not be more than 15 bits. 225 * 226 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 227 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 228 */ 229 union kvm_mmu_page_role { 230 unsigned word; 231 struct { 232 unsigned level:4; 233 unsigned cr4_pae:1; 234 unsigned quadrant:2; 235 unsigned direct:1; 236 unsigned access:3; 237 unsigned invalid:1; 238 unsigned nxe:1; 239 unsigned cr0_wp:1; 240 unsigned smep_andnot_wp:1; 241 unsigned smap_andnot_wp:1; 242 unsigned :8; 243 244 /* 245 * This is left at the top of the word so that 246 * kvm_memslots_for_spte_role can extract it with a 247 * simple shift. While there is room, give it a whole 248 * byte so it is also faster to load it from memory. 249 */ 250 unsigned smm:8; 251 }; 252 }; 253 254 struct kvm_rmap_head { 255 unsigned long val; 256 }; 257 258 struct kvm_mmu_page { 259 struct list_head link; 260 struct hlist_node hash_link; 261 262 /* 263 * The following two entries are used to key the shadow page in the 264 * hash table. 265 */ 266 gfn_t gfn; 267 union kvm_mmu_page_role role; 268 269 u64 *spt; 270 /* hold the gfn of each spte inside spt */ 271 gfn_t *gfns; 272 bool unsync; 273 int root_count; /* Currently serving as active root */ 274 unsigned int unsync_children; 275 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 276 277 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 278 unsigned long mmu_valid_gen; 279 280 DECLARE_BITMAP(unsync_child_bitmap, 512); 281 282 #ifdef CONFIG_X86_32 283 /* 284 * Used out of the mmu-lock to avoid reading spte values while an 285 * update is in progress; see the comments in __get_spte_lockless(). 286 */ 287 int clear_spte_count; 288 #endif 289 290 /* Number of writes since the last time traversal visited this page. */ 291 atomic_t write_flooding_count; 292 }; 293 294 struct kvm_pio_request { 295 unsigned long count; 296 int in; 297 int port; 298 int size; 299 }; 300 301 struct rsvd_bits_validate { 302 u64 rsvd_bits_mask[2][4]; 303 u64 bad_mt_xwr; 304 }; 305 306 /* 307 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 308 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 309 * mode. 310 */ 311 struct kvm_mmu { 312 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 313 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 314 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 315 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 316 bool prefault); 317 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 318 struct x86_exception *fault); 319 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 320 struct x86_exception *exception); 321 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 322 struct x86_exception *exception); 323 int (*sync_page)(struct kvm_vcpu *vcpu, 324 struct kvm_mmu_page *sp); 325 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 326 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 327 u64 *spte, const void *pte); 328 hpa_t root_hpa; 329 int root_level; 330 int shadow_root_level; 331 union kvm_mmu_page_role base_role; 332 bool direct_map; 333 334 /* 335 * Bitmap; bit set = permission fault 336 * Byte index: page fault error code [4:1] 337 * Bit index: pte permissions in ACC_* format 338 */ 339 u8 permissions[16]; 340 341 /* 342 * The pkru_mask indicates if protection key checks are needed. It 343 * consists of 16 domains indexed by page fault error code bits [4:1], 344 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 345 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 346 */ 347 u32 pkru_mask; 348 349 u64 *pae_root; 350 u64 *lm_root; 351 352 /* 353 * check zero bits on shadow page table entries, these 354 * bits include not only hardware reserved bits but also 355 * the bits spte never used. 356 */ 357 struct rsvd_bits_validate shadow_zero_check; 358 359 struct rsvd_bits_validate guest_rsvd_check; 360 361 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 362 u8 last_nonleaf_level; 363 364 bool nx; 365 366 u64 pdptrs[4]; /* pae */ 367 }; 368 369 enum pmc_type { 370 KVM_PMC_GP = 0, 371 KVM_PMC_FIXED, 372 }; 373 374 struct kvm_pmc { 375 enum pmc_type type; 376 u8 idx; 377 u64 counter; 378 u64 eventsel; 379 struct perf_event *perf_event; 380 struct kvm_vcpu *vcpu; 381 }; 382 383 struct kvm_pmu { 384 unsigned nr_arch_gp_counters; 385 unsigned nr_arch_fixed_counters; 386 unsigned available_event_types; 387 u64 fixed_ctr_ctrl; 388 u64 global_ctrl; 389 u64 global_status; 390 u64 global_ovf_ctrl; 391 u64 counter_bitmask[2]; 392 u64 global_ctrl_mask; 393 u64 reserved_bits; 394 u8 version; 395 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 396 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 397 struct irq_work irq_work; 398 u64 reprogram_pmi; 399 }; 400 401 struct kvm_pmu_ops; 402 403 enum { 404 KVM_DEBUGREG_BP_ENABLED = 1, 405 KVM_DEBUGREG_WONT_EXIT = 2, 406 KVM_DEBUGREG_RELOAD = 4, 407 }; 408 409 struct kvm_mtrr_range { 410 u64 base; 411 u64 mask; 412 struct list_head node; 413 }; 414 415 struct kvm_mtrr { 416 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 417 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 418 u64 deftype; 419 420 struct list_head head; 421 }; 422 423 /* Hyper-V SynIC timer */ 424 struct kvm_vcpu_hv_stimer { 425 struct hrtimer timer; 426 int index; 427 u64 config; 428 u64 count; 429 u64 exp_time; 430 struct hv_message msg; 431 bool msg_pending; 432 }; 433 434 /* Hyper-V synthetic interrupt controller (SynIC)*/ 435 struct kvm_vcpu_hv_synic { 436 u64 version; 437 u64 control; 438 u64 msg_page; 439 u64 evt_page; 440 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 441 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 442 DECLARE_BITMAP(auto_eoi_bitmap, 256); 443 DECLARE_BITMAP(vec_bitmap, 256); 444 bool active; 445 }; 446 447 /* Hyper-V per vcpu emulation context */ 448 struct kvm_vcpu_hv { 449 u64 hv_vapic; 450 s64 runtime_offset; 451 struct kvm_vcpu_hv_synic synic; 452 struct kvm_hyperv_exit exit; 453 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 454 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 455 }; 456 457 struct kvm_vcpu_arch { 458 /* 459 * rip and regs accesses must go through 460 * kvm_{register,rip}_{read,write} functions. 461 */ 462 unsigned long regs[NR_VCPU_REGS]; 463 u32 regs_avail; 464 u32 regs_dirty; 465 466 unsigned long cr0; 467 unsigned long cr0_guest_owned_bits; 468 unsigned long cr2; 469 unsigned long cr3; 470 unsigned long cr4; 471 unsigned long cr4_guest_owned_bits; 472 unsigned long cr8; 473 u32 hflags; 474 u64 efer; 475 u64 apic_base; 476 struct kvm_lapic *apic; /* kernel irqchip context */ 477 bool apicv_active; 478 DECLARE_BITMAP(ioapic_handled_vectors, 256); 479 unsigned long apic_attention; 480 int32_t apic_arb_prio; 481 int mp_state; 482 u64 ia32_misc_enable_msr; 483 u64 smbase; 484 bool tpr_access_reporting; 485 u64 ia32_xss; 486 487 /* 488 * Paging state of the vcpu 489 * 490 * If the vcpu runs in guest mode with two level paging this still saves 491 * the paging mode of the l1 guest. This context is always used to 492 * handle faults. 493 */ 494 struct kvm_mmu mmu; 495 496 /* 497 * Paging state of an L2 guest (used for nested npt) 498 * 499 * This context will save all necessary information to walk page tables 500 * of the an L2 guest. This context is only initialized for page table 501 * walking and not for faulting since we never handle l2 page faults on 502 * the host. 503 */ 504 struct kvm_mmu nested_mmu; 505 506 /* 507 * Pointer to the mmu context currently used for 508 * gva_to_gpa translations. 509 */ 510 struct kvm_mmu *walk_mmu; 511 512 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 513 struct kvm_mmu_memory_cache mmu_page_cache; 514 struct kvm_mmu_memory_cache mmu_page_header_cache; 515 516 struct fpu guest_fpu; 517 u64 xcr0; 518 u64 guest_supported_xcr0; 519 u32 guest_xstate_size; 520 521 struct kvm_pio_request pio; 522 void *pio_data; 523 524 u8 event_exit_inst_len; 525 526 struct kvm_queued_exception { 527 bool pending; 528 bool has_error_code; 529 bool reinject; 530 u8 nr; 531 u32 error_code; 532 } exception; 533 534 struct kvm_queued_interrupt { 535 bool pending; 536 bool soft; 537 u8 nr; 538 } interrupt; 539 540 int halt_request; /* real mode on Intel only */ 541 542 int cpuid_nent; 543 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 544 545 int maxphyaddr; 546 547 /* emulate context */ 548 549 struct x86_emulate_ctxt emulate_ctxt; 550 bool emulate_regs_need_sync_to_vcpu; 551 bool emulate_regs_need_sync_from_vcpu; 552 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 553 554 gpa_t time; 555 struct pvclock_vcpu_time_info hv_clock; 556 unsigned int hw_tsc_khz; 557 struct gfn_to_hva_cache pv_time; 558 bool pv_time_enabled; 559 /* set guest stopped flag in pvclock flags field */ 560 bool pvclock_set_guest_stopped_request; 561 562 struct { 563 u64 msr_val; 564 u64 last_steal; 565 struct gfn_to_hva_cache stime; 566 struct kvm_steal_time steal; 567 } st; 568 569 u64 last_guest_tsc; 570 u64 last_host_tsc; 571 u64 tsc_offset_adjustment; 572 u64 this_tsc_nsec; 573 u64 this_tsc_write; 574 u64 this_tsc_generation; 575 bool tsc_catchup; 576 bool tsc_always_catchup; 577 s8 virtual_tsc_shift; 578 u32 virtual_tsc_mult; 579 u32 virtual_tsc_khz; 580 s64 ia32_tsc_adjust_msr; 581 u64 tsc_scaling_ratio; 582 583 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 584 unsigned nmi_pending; /* NMI queued after currently running handler */ 585 bool nmi_injected; /* Trying to inject an NMI this entry */ 586 bool smi_pending; /* SMI queued after currently running handler */ 587 588 struct kvm_mtrr mtrr_state; 589 u64 pat; 590 591 unsigned switch_db_regs; 592 unsigned long db[KVM_NR_DB_REGS]; 593 unsigned long dr6; 594 unsigned long dr7; 595 unsigned long eff_db[KVM_NR_DB_REGS]; 596 unsigned long guest_debug_dr7; 597 598 u64 mcg_cap; 599 u64 mcg_status; 600 u64 mcg_ctl; 601 u64 *mce_banks; 602 603 /* Cache MMIO info */ 604 u64 mmio_gva; 605 unsigned access; 606 gfn_t mmio_gfn; 607 u64 mmio_gen; 608 609 struct kvm_pmu pmu; 610 611 /* used for guest single stepping over the given code position */ 612 unsigned long singlestep_rip; 613 614 struct kvm_vcpu_hv hyperv; 615 616 cpumask_var_t wbinvd_dirty_mask; 617 618 unsigned long last_retry_eip; 619 unsigned long last_retry_addr; 620 621 struct { 622 bool halted; 623 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 624 struct gfn_to_hva_cache data; 625 u64 msr_val; 626 u32 id; 627 bool send_user_only; 628 } apf; 629 630 /* OSVW MSRs (AMD only) */ 631 struct { 632 u64 length; 633 u64 status; 634 } osvw; 635 636 struct { 637 u64 msr_val; 638 struct gfn_to_hva_cache data; 639 } pv_eoi; 640 641 /* 642 * Indicate whether the access faults on its page table in guest 643 * which is set when fix page fault and used to detect unhandeable 644 * instruction. 645 */ 646 bool write_fault_to_shadow_pgtable; 647 648 /* set at EPT violation at this point */ 649 unsigned long exit_qualification; 650 651 /* pv related host specific info */ 652 struct { 653 bool pv_unhalted; 654 } pv; 655 656 int pending_ioapic_eoi; 657 int pending_external_vector; 658 }; 659 660 struct kvm_lpage_info { 661 int disallow_lpage; 662 }; 663 664 struct kvm_arch_memory_slot { 665 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 666 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 667 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 668 }; 669 670 /* 671 * We use as the mode the number of bits allocated in the LDR for the 672 * logical processor ID. It happens that these are all powers of two. 673 * This makes it is very easy to detect cases where the APICs are 674 * configured for multiple modes; in that case, we cannot use the map and 675 * hence cannot use kvm_irq_delivery_to_apic_fast either. 676 */ 677 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 678 #define KVM_APIC_MODE_XAPIC_FLAT 8 679 #define KVM_APIC_MODE_X2APIC 16 680 681 struct kvm_apic_map { 682 struct rcu_head rcu; 683 u8 mode; 684 struct kvm_lapic *phys_map[256]; 685 /* first index is cluster id second is cpu id in a cluster */ 686 struct kvm_lapic *logical_map[16][16]; 687 }; 688 689 /* Hyper-V emulation context */ 690 struct kvm_hv { 691 u64 hv_guest_os_id; 692 u64 hv_hypercall; 693 u64 hv_tsc_page; 694 695 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 696 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 697 u64 hv_crash_ctl; 698 }; 699 700 struct kvm_arch { 701 unsigned int n_used_mmu_pages; 702 unsigned int n_requested_mmu_pages; 703 unsigned int n_max_mmu_pages; 704 unsigned int indirect_shadow_pages; 705 unsigned long mmu_valid_gen; 706 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 707 /* 708 * Hash table of struct kvm_mmu_page. 709 */ 710 struct list_head active_mmu_pages; 711 struct list_head zapped_obsolete_pages; 712 struct kvm_page_track_notifier_node mmu_sp_tracker; 713 struct kvm_page_track_notifier_head track_notifier_head; 714 715 struct list_head assigned_dev_head; 716 struct iommu_domain *iommu_domain; 717 bool iommu_noncoherent; 718 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 719 atomic_t noncoherent_dma_count; 720 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 721 atomic_t assigned_device_count; 722 struct kvm_pic *vpic; 723 struct kvm_ioapic *vioapic; 724 struct kvm_pit *vpit; 725 atomic_t vapics_in_nmi_mode; 726 struct mutex apic_map_lock; 727 struct kvm_apic_map *apic_map; 728 729 unsigned int tss_addr; 730 bool apic_access_page_done; 731 732 gpa_t wall_clock; 733 734 bool ept_identity_pagetable_done; 735 gpa_t ept_identity_map_addr; 736 737 unsigned long irq_sources_bitmap; 738 s64 kvmclock_offset; 739 raw_spinlock_t tsc_write_lock; 740 u64 last_tsc_nsec; 741 u64 last_tsc_write; 742 u32 last_tsc_khz; 743 u64 cur_tsc_nsec; 744 u64 cur_tsc_write; 745 u64 cur_tsc_offset; 746 u64 cur_tsc_generation; 747 int nr_vcpus_matched_tsc; 748 749 spinlock_t pvclock_gtod_sync_lock; 750 bool use_master_clock; 751 u64 master_kernel_ns; 752 cycle_t master_cycle_now; 753 struct delayed_work kvmclock_update_work; 754 struct delayed_work kvmclock_sync_work; 755 756 struct kvm_xen_hvm_config xen_hvm_config; 757 758 /* reads protected by irq_srcu, writes by irq_lock */ 759 struct hlist_head mask_notifier_list; 760 761 struct kvm_hv hyperv; 762 763 #ifdef CONFIG_KVM_MMU_AUDIT 764 int audit_point; 765 #endif 766 767 bool boot_vcpu_runs_old_kvmclock; 768 u32 bsp_vcpu_id; 769 770 u64 disabled_quirks; 771 772 bool irqchip_split; 773 u8 nr_reserved_ioapic_pins; 774 775 bool disabled_lapic_found; 776 777 /* Struct members for AVIC */ 778 u32 ldr_mode; 779 struct page *avic_logical_id_table_page; 780 struct page *avic_physical_id_table_page; 781 }; 782 783 struct kvm_vm_stat { 784 u32 mmu_shadow_zapped; 785 u32 mmu_pte_write; 786 u32 mmu_pte_updated; 787 u32 mmu_pde_zapped; 788 u32 mmu_flooded; 789 u32 mmu_recycled; 790 u32 mmu_cache_miss; 791 u32 mmu_unsync; 792 u32 remote_tlb_flush; 793 u32 lpages; 794 }; 795 796 struct kvm_vcpu_stat { 797 u32 pf_fixed; 798 u32 pf_guest; 799 u32 tlb_flush; 800 u32 invlpg; 801 802 u32 exits; 803 u32 io_exits; 804 u32 mmio_exits; 805 u32 signal_exits; 806 u32 irq_window_exits; 807 u32 nmi_window_exits; 808 u32 halt_exits; 809 u32 halt_successful_poll; 810 u32 halt_attempted_poll; 811 u32 halt_poll_invalid; 812 u32 halt_wakeup; 813 u32 request_irq_exits; 814 u32 irq_exits; 815 u32 host_state_reload; 816 u32 efer_reload; 817 u32 fpu_reload; 818 u32 insn_emulation; 819 u32 insn_emulation_fail; 820 u32 hypercalls; 821 u32 irq_injections; 822 u32 nmi_injections; 823 }; 824 825 struct x86_instruction_info; 826 827 struct msr_data { 828 bool host_initiated; 829 u32 index; 830 u64 data; 831 }; 832 833 struct kvm_lapic_irq { 834 u32 vector; 835 u16 delivery_mode; 836 u16 dest_mode; 837 bool level; 838 u16 trig_mode; 839 u32 shorthand; 840 u32 dest_id; 841 bool msi_redir_hint; 842 }; 843 844 struct kvm_x86_ops { 845 int (*cpu_has_kvm_support)(void); /* __init */ 846 int (*disabled_by_bios)(void); /* __init */ 847 int (*hardware_enable)(void); 848 void (*hardware_disable)(void); 849 void (*check_processor_compatibility)(void *rtn); 850 int (*hardware_setup)(void); /* __init */ 851 void (*hardware_unsetup)(void); /* __exit */ 852 bool (*cpu_has_accelerated_tpr)(void); 853 bool (*cpu_has_high_real_mode_segbase)(void); 854 void (*cpuid_update)(struct kvm_vcpu *vcpu); 855 856 int (*vm_init)(struct kvm *kvm); 857 void (*vm_destroy)(struct kvm *kvm); 858 859 /* Create, but do not attach this VCPU */ 860 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 861 void (*vcpu_free)(struct kvm_vcpu *vcpu); 862 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 863 864 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 865 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 866 void (*vcpu_put)(struct kvm_vcpu *vcpu); 867 868 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 869 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 870 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 871 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 872 void (*get_segment)(struct kvm_vcpu *vcpu, 873 struct kvm_segment *var, int seg); 874 int (*get_cpl)(struct kvm_vcpu *vcpu); 875 void (*set_segment)(struct kvm_vcpu *vcpu, 876 struct kvm_segment *var, int seg); 877 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 878 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 879 void (*decache_cr3)(struct kvm_vcpu *vcpu); 880 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 881 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 882 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 883 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 884 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 885 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 886 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 887 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 888 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 889 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 890 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 891 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 892 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 893 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 894 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 895 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 896 u32 (*get_pkru)(struct kvm_vcpu *vcpu); 897 void (*fpu_activate)(struct kvm_vcpu *vcpu); 898 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 899 900 void (*tlb_flush)(struct kvm_vcpu *vcpu); 901 902 void (*run)(struct kvm_vcpu *vcpu); 903 int (*handle_exit)(struct kvm_vcpu *vcpu); 904 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 905 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 906 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 907 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 908 unsigned char *hypercall_addr); 909 void (*set_irq)(struct kvm_vcpu *vcpu); 910 void (*set_nmi)(struct kvm_vcpu *vcpu); 911 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 912 bool has_error_code, u32 error_code, 913 bool reinject); 914 void (*cancel_injection)(struct kvm_vcpu *vcpu); 915 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 916 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 917 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 918 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 919 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 920 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 921 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 922 bool (*get_enable_apicv)(void); 923 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 924 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 925 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 926 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 927 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 928 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 929 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 930 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 931 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 932 int (*get_tdp_level)(void); 933 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 934 int (*get_lpage_level)(void); 935 bool (*rdtscp_supported)(void); 936 bool (*invpcid_supported)(void); 937 void (*adjust_tsc_offset_guest)(struct kvm_vcpu *vcpu, s64 adjustment); 938 939 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 940 941 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 942 943 bool (*has_wbinvd_exit)(void); 944 945 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 946 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 947 948 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 949 950 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 951 952 int (*check_intercept)(struct kvm_vcpu *vcpu, 953 struct x86_instruction_info *info, 954 enum x86_intercept_stage stage); 955 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 956 bool (*mpx_supported)(void); 957 bool (*xsaves_supported)(void); 958 959 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 960 961 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 962 963 /* 964 * Arch-specific dirty logging hooks. These hooks are only supposed to 965 * be valid if the specific arch has hardware-accelerated dirty logging 966 * mechanism. Currently only for PML on VMX. 967 * 968 * - slot_enable_log_dirty: 969 * called when enabling log dirty mode for the slot. 970 * - slot_disable_log_dirty: 971 * called when disabling log dirty mode for the slot. 972 * also called when slot is created with log dirty disabled. 973 * - flush_log_dirty: 974 * called before reporting dirty_bitmap to userspace. 975 * - enable_log_dirty_pt_masked: 976 * called when reenabling log dirty for the GFNs in the mask after 977 * corresponding bits are cleared in slot->dirty_bitmap. 978 */ 979 void (*slot_enable_log_dirty)(struct kvm *kvm, 980 struct kvm_memory_slot *slot); 981 void (*slot_disable_log_dirty)(struct kvm *kvm, 982 struct kvm_memory_slot *slot); 983 void (*flush_log_dirty)(struct kvm *kvm); 984 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 985 struct kvm_memory_slot *slot, 986 gfn_t offset, unsigned long mask); 987 /* pmu operations of sub-arch */ 988 const struct kvm_pmu_ops *pmu_ops; 989 990 /* 991 * Architecture specific hooks for vCPU blocking due to 992 * HLT instruction. 993 * Returns for .pre_block(): 994 * - 0 means continue to block the vCPU. 995 * - 1 means we cannot block the vCPU since some event 996 * happens during this period, such as, 'ON' bit in 997 * posted-interrupts descriptor is set. 998 */ 999 int (*pre_block)(struct kvm_vcpu *vcpu); 1000 void (*post_block)(struct kvm_vcpu *vcpu); 1001 1002 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1003 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1004 1005 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1006 uint32_t guest_irq, bool set); 1007 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1008 }; 1009 1010 struct kvm_arch_async_pf { 1011 u32 token; 1012 gfn_t gfn; 1013 unsigned long cr3; 1014 bool direct_map; 1015 }; 1016 1017 extern struct kvm_x86_ops *kvm_x86_ops; 1018 1019 int kvm_mmu_module_init(void); 1020 void kvm_mmu_module_exit(void); 1021 1022 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1023 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1024 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1025 void kvm_mmu_init_vm(struct kvm *kvm); 1026 void kvm_mmu_uninit_vm(struct kvm *kvm); 1027 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1028 u64 dirty_mask, u64 nx_mask, u64 x_mask); 1029 1030 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1031 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1032 struct kvm_memory_slot *memslot); 1033 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1034 const struct kvm_memory_slot *memslot); 1035 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1036 struct kvm_memory_slot *memslot); 1037 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1038 struct kvm_memory_slot *memslot); 1039 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1040 struct kvm_memory_slot *memslot); 1041 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1042 struct kvm_memory_slot *slot, 1043 gfn_t gfn_offset, unsigned long mask); 1044 void kvm_mmu_zap_all(struct kvm *kvm); 1045 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1046 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1047 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1048 1049 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1050 1051 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1052 const void *val, int bytes); 1053 1054 struct kvm_irq_mask_notifier { 1055 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1056 int irq; 1057 struct hlist_node link; 1058 }; 1059 1060 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1061 struct kvm_irq_mask_notifier *kimn); 1062 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1063 struct kvm_irq_mask_notifier *kimn); 1064 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1065 bool mask); 1066 1067 extern bool tdp_enabled; 1068 1069 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1070 1071 /* control of guest tsc rate supported? */ 1072 extern bool kvm_has_tsc_control; 1073 /* maximum supported tsc_khz for guests */ 1074 extern u32 kvm_max_guest_tsc_khz; 1075 /* number of bits of the fractional part of the TSC scaling ratio */ 1076 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1077 /* maximum allowed value of TSC scaling ratio */ 1078 extern u64 kvm_max_tsc_scaling_ratio; 1079 1080 enum emulation_result { 1081 EMULATE_DONE, /* no further processing */ 1082 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1083 EMULATE_FAIL, /* can't emulate this instruction */ 1084 }; 1085 1086 #define EMULTYPE_NO_DECODE (1 << 0) 1087 #define EMULTYPE_TRAP_UD (1 << 1) 1088 #define EMULTYPE_SKIP (1 << 2) 1089 #define EMULTYPE_RETRY (1 << 3) 1090 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1091 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1092 int emulation_type, void *insn, int insn_len); 1093 1094 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1095 int emulation_type) 1096 { 1097 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 1098 } 1099 1100 void kvm_enable_efer_bits(u64); 1101 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1102 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1103 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1104 1105 struct x86_emulate_ctxt; 1106 1107 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 1108 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1109 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1110 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1111 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1112 1113 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1114 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1115 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1116 1117 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1118 int reason, bool has_error_code, u32 error_code); 1119 1120 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1121 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1122 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1123 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1124 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1125 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1126 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1127 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1128 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1129 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1130 1131 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1132 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1133 1134 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1135 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1136 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1137 1138 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1139 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1140 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1141 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1142 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1143 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1144 gfn_t gfn, void *data, int offset, int len, 1145 u32 access); 1146 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1147 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1148 1149 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1150 int irq_source_id, int level) 1151 { 1152 /* Logical OR for level trig interrupt */ 1153 if (level) 1154 __set_bit(irq_source_id, irq_state); 1155 else 1156 __clear_bit(irq_source_id, irq_state); 1157 1158 return !!(*irq_state); 1159 } 1160 1161 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1162 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1163 1164 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1165 1166 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1167 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1168 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1169 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1170 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1171 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1172 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1173 struct x86_exception *exception); 1174 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1175 struct x86_exception *exception); 1176 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1177 struct x86_exception *exception); 1178 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1179 struct x86_exception *exception); 1180 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1181 struct x86_exception *exception); 1182 1183 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1184 1185 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1186 1187 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 1188 void *insn, int insn_len); 1189 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1190 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1191 1192 void kvm_enable_tdp(void); 1193 void kvm_disable_tdp(void); 1194 1195 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1196 struct x86_exception *exception) 1197 { 1198 return gpa; 1199 } 1200 1201 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1202 { 1203 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1204 1205 return (struct kvm_mmu_page *)page_private(page); 1206 } 1207 1208 static inline u16 kvm_read_ldt(void) 1209 { 1210 u16 ldt; 1211 asm("sldt %0" : "=g"(ldt)); 1212 return ldt; 1213 } 1214 1215 static inline void kvm_load_ldt(u16 sel) 1216 { 1217 asm("lldt %0" : : "rm"(sel)); 1218 } 1219 1220 #ifdef CONFIG_X86_64 1221 static inline unsigned long read_msr(unsigned long msr) 1222 { 1223 u64 value; 1224 1225 rdmsrl(msr, value); 1226 return value; 1227 } 1228 #endif 1229 1230 static inline u32 get_rdx_init_val(void) 1231 { 1232 return 0x600; /* P6 family */ 1233 } 1234 1235 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1236 { 1237 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1238 } 1239 1240 static inline u64 get_canonical(u64 la) 1241 { 1242 return ((int64_t)la << 16) >> 16; 1243 } 1244 1245 static inline bool is_noncanonical_address(u64 la) 1246 { 1247 #ifdef CONFIG_X86_64 1248 return get_canonical(la) != la; 1249 #else 1250 return false; 1251 #endif 1252 } 1253 1254 #define TSS_IOPB_BASE_OFFSET 0x66 1255 #define TSS_BASE_SIZE 0x68 1256 #define TSS_IOPB_SIZE (65536 / 8) 1257 #define TSS_REDIRECTION_SIZE (256 / 8) 1258 #define RMODE_TSS_SIZE \ 1259 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1260 1261 enum { 1262 TASK_SWITCH_CALL = 0, 1263 TASK_SWITCH_IRET = 1, 1264 TASK_SWITCH_JMP = 2, 1265 TASK_SWITCH_GATE = 3, 1266 }; 1267 1268 #define HF_GIF_MASK (1 << 0) 1269 #define HF_HIF_MASK (1 << 1) 1270 #define HF_VINTR_MASK (1 << 2) 1271 #define HF_NMI_MASK (1 << 3) 1272 #define HF_IRET_MASK (1 << 4) 1273 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1274 #define HF_SMM_MASK (1 << 6) 1275 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1276 1277 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1278 #define KVM_ADDRESS_SPACE_NUM 2 1279 1280 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1281 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1282 1283 /* 1284 * Hardware virtualization extension instructions may fault if a 1285 * reboot turns off virtualization while processes are running. 1286 * Trap the fault and ignore the instruction if that happens. 1287 */ 1288 asmlinkage void kvm_spurious_fault(void); 1289 1290 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1291 "666: " insn "\n\t" \ 1292 "668: \n\t" \ 1293 ".pushsection .fixup, \"ax\" \n" \ 1294 "667: \n\t" \ 1295 cleanup_insn "\n\t" \ 1296 "cmpb $0, kvm_rebooting \n\t" \ 1297 "jne 668b \n\t" \ 1298 __ASM_SIZE(push) " $666b \n\t" \ 1299 "call kvm_spurious_fault \n\t" \ 1300 ".popsection \n\t" \ 1301 _ASM_EXTABLE(666b, 667b) 1302 1303 #define __kvm_handle_fault_on_reboot(insn) \ 1304 ____kvm_handle_fault_on_reboot(insn, "") 1305 1306 #define KVM_ARCH_WANT_MMU_NOTIFIER 1307 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1308 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1309 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1310 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1311 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1312 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1313 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1314 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1315 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1316 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1317 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1318 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1319 unsigned long address); 1320 1321 void kvm_define_shared_msr(unsigned index, u32 msr); 1322 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1323 1324 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1325 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1326 1327 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1328 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1329 1330 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1331 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1332 1333 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1334 struct kvm_async_pf *work); 1335 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1336 struct kvm_async_pf *work); 1337 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1338 struct kvm_async_pf *work); 1339 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1340 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1341 1342 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1343 1344 int kvm_is_in_guest(void); 1345 1346 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1347 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1348 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1349 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1350 1351 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1352 struct kvm_vcpu **dest_vcpu); 1353 1354 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, 1355 struct kvm_lapic_irq *irq); 1356 1357 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1358 { 1359 if (kvm_x86_ops->vcpu_blocking) 1360 kvm_x86_ops->vcpu_blocking(vcpu); 1361 } 1362 1363 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1364 { 1365 if (kvm_x86_ops->vcpu_unblocking) 1366 kvm_x86_ops->vcpu_unblocking(vcpu); 1367 } 1368 1369 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1370 1371 #endif /* _ASM_X86_KVM_HOST_H */ 1372