xref: /linux/arch/x86/include/asm/irqdomain.h (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2f7a0c786SThomas Gleixner #ifndef _ASM_IRQDOMAIN_H
3f7a0c786SThomas Gleixner #define _ASM_IRQDOMAIN_H
4f7a0c786SThomas Gleixner 
5f7a0c786SThomas Gleixner #include <linux/irqdomain.h>
6d746d1ebSJiang Liu #include <asm/hw_irq.h>
7d746d1ebSJiang Liu 
8d746d1ebSJiang Liu #ifdef CONFIG_X86_LOCAL_APIC
9d746d1ebSJiang Liu enum {
10*d474d92dSThomas Gleixner 	X86_IRQ_ALLOC_LEGACY				= 0x1,
11d746d1ebSJiang Liu };
12d746d1ebSJiang Liu 
136452ea2aSDavid Woodhouse extern int x86_fwspec_is_ioapic(struct irq_fwspec *fwspec);
146452ea2aSDavid Woodhouse extern int x86_fwspec_is_hpet(struct irq_fwspec *fwspec);
156452ea2aSDavid Woodhouse 
16d746d1ebSJiang Liu extern struct irq_domain *x86_vector_domain;
17d746d1ebSJiang Liu 
18d746d1ebSJiang Liu extern void init_irq_alloc_info(struct irq_alloc_info *info,
19d746d1ebSJiang Liu 				const struct cpumask *mask);
20d746d1ebSJiang Liu extern void copy_irq_alloc_info(struct irq_alloc_info *dst,
21d746d1ebSJiang Liu 				struct irq_alloc_info *src);
22d746d1ebSJiang Liu #endif /* CONFIG_X86_LOCAL_APIC */
23d746d1ebSJiang Liu 
24d746d1ebSJiang Liu #ifdef CONFIG_X86_IO_APIC
25d746d1ebSJiang Liu struct device_node;
26d746d1ebSJiang Liu struct irq_data;
27f7a0c786SThomas Gleixner 
28f7a0c786SThomas Gleixner enum ioapic_domain_type {
29f7a0c786SThomas Gleixner 	IOAPIC_DOMAIN_INVALID,
30f7a0c786SThomas Gleixner 	IOAPIC_DOMAIN_LEGACY,
31f7a0c786SThomas Gleixner 	IOAPIC_DOMAIN_STRICT,
32f7a0c786SThomas Gleixner 	IOAPIC_DOMAIN_DYNAMIC,
33f7a0c786SThomas Gleixner };
34f7a0c786SThomas Gleixner 
35f7a0c786SThomas Gleixner struct ioapic_domain_cfg {
36f7a0c786SThomas Gleixner 	enum ioapic_domain_type		type;
37f7a0c786SThomas Gleixner 	const struct irq_domain_ops	*ops;
38f7a0c786SThomas Gleixner 	struct device_node		*dev;
39f7a0c786SThomas Gleixner };
40f7a0c786SThomas Gleixner 
41f7a0c786SThomas Gleixner extern const struct irq_domain_ops mp_ioapic_irqdomain_ops;
42f7a0c786SThomas Gleixner 
43f7a0c786SThomas Gleixner extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
44f7a0c786SThomas Gleixner 			      unsigned int nr_irqs, void *arg);
45f7a0c786SThomas Gleixner extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
46f7a0c786SThomas Gleixner 			      unsigned int nr_irqs);
4772491643SThomas Gleixner extern int mp_irqdomain_activate(struct irq_domain *domain,
48702cb0a0SThomas Gleixner 				 struct irq_data *irq_data, bool reserve);
49f7a0c786SThomas Gleixner extern void mp_irqdomain_deactivate(struct irq_domain *domain,
50f7a0c786SThomas Gleixner 				    struct irq_data *irq_data);
51f7a0c786SThomas Gleixner extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);
52d746d1ebSJiang Liu #endif /* CONFIG_X86_IO_APIC */
53d746d1ebSJiang Liu 
54d746d1ebSJiang Liu #ifdef CONFIG_PCI_MSI
556b15ffa0SThomas Gleixner void x86_create_pci_msi_domain(void);
566b15ffa0SThomas Gleixner struct irq_domain *native_create_pci_msi_domain(void);
572c681e6bSThomas Gleixner extern struct irq_domain *x86_pci_msi_default_domain;
58d746d1ebSJiang Liu #else
x86_create_pci_msi_domain(void)596b15ffa0SThomas Gleixner static inline void x86_create_pci_msi_domain(void) { }
606b15ffa0SThomas Gleixner #define native_create_pci_msi_domain	NULL
612c681e6bSThomas Gleixner #define x86_pci_msi_default_domain	NULL
62d746d1ebSJiang Liu #endif
63d746d1ebSJiang Liu 
64f7a0c786SThomas Gleixner #endif
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