xref: /linux/arch/x86/include/asm/intel-family.h (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa)
1 #ifndef _ASM_X86_INTEL_FAMILY_H
2 #define _ASM_X86_INTEL_FAMILY_H
3 
4 /*
5  * "Big Core" Processors (Branded as Core, Xeon, etc...)
6  *
7  * The "_X" parts are generally the EP and EX Xeons, or the
8  * "Extreme" ones, like Broadwell-E.
9  *
10  * Things ending in "2" are usually because we have no better
11  * name for them.  There's no processor called "SILVERMONT2".
12  */
13 
14 #define INTEL_FAM6_CORE_YONAH		0x0E
15 
16 #define INTEL_FAM6_CORE2_MEROM		0x0F
17 #define INTEL_FAM6_CORE2_MEROM_L	0x16
18 #define INTEL_FAM6_CORE2_PENRYN		0x17
19 #define INTEL_FAM6_CORE2_DUNNINGTON	0x1D
20 
21 #define INTEL_FAM6_NEHALEM		0x1E
22 #define INTEL_FAM6_NEHALEM_G		0x1F /* Auburndale / Havendale */
23 #define INTEL_FAM6_NEHALEM_EP		0x1A
24 #define INTEL_FAM6_NEHALEM_EX		0x2E
25 
26 #define INTEL_FAM6_WESTMERE		0x25
27 #define INTEL_FAM6_WESTMERE_EP		0x2C
28 #define INTEL_FAM6_WESTMERE_EX		0x2F
29 
30 #define INTEL_FAM6_SANDYBRIDGE		0x2A
31 #define INTEL_FAM6_SANDYBRIDGE_X	0x2D
32 #define INTEL_FAM6_IVYBRIDGE		0x3A
33 #define INTEL_FAM6_IVYBRIDGE_X		0x3E
34 
35 #define INTEL_FAM6_HASWELL_CORE		0x3C
36 #define INTEL_FAM6_HASWELL_X		0x3F
37 #define INTEL_FAM6_HASWELL_ULT		0x45
38 #define INTEL_FAM6_HASWELL_GT3E		0x46
39 
40 #define INTEL_FAM6_BROADWELL_CORE	0x3D
41 #define INTEL_FAM6_BROADWELL_GT3E	0x47
42 #define INTEL_FAM6_BROADWELL_X		0x4F
43 #define INTEL_FAM6_BROADWELL_XEON_D	0x56
44 
45 #define INTEL_FAM6_SKYLAKE_MOBILE	0x4E
46 #define INTEL_FAM6_SKYLAKE_DESKTOP	0x5E
47 #define INTEL_FAM6_SKYLAKE_X		0x55
48 #define INTEL_FAM6_KABYLAKE_MOBILE	0x8E
49 #define INTEL_FAM6_KABYLAKE_DESKTOP	0x9E
50 
51 /* "Small Core" Processors (Atom) */
52 
53 #define INTEL_FAM6_ATOM_PINEVIEW	0x1C
54 #define INTEL_FAM6_ATOM_LINCROFT	0x26
55 #define INTEL_FAM6_ATOM_PENWELL		0x27
56 #define INTEL_FAM6_ATOM_CLOVERVIEW	0x35
57 #define INTEL_FAM6_ATOM_CEDARVIEW	0x36
58 #define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */
59 #define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */
60 #define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */
61 #define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */
62 #define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Anniedale */
63 #define INTEL_FAM6_ATOM_GOLDMONT	0x5C
64 #define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */
65 #define INTEL_FAM6_ATOM_GEMINI_LAKE	0x7A
66 
67 /* Xeon Phi */
68 
69 #define INTEL_FAM6_XEON_PHI_KNL		0x57 /* Knights Landing */
70 #define INTEL_FAM6_XEON_PHI_KNM		0x85 /* Knights Mill */
71 
72 #endif /* _ASM_X86_INTEL_FAMILY_H */
73