xref: /linux/arch/x86/include/asm/inat.h (revision eada38d575a2b947b3ffefd570fea90a5a17feb3)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_X86_INAT_H
3 #define _ASM_X86_INAT_H
4 /*
5  * x86 instruction attributes
6  *
7  * Written by Masami Hiramatsu <mhiramat@redhat.com>
8  */
9 #include <asm/inat_types.h> /* __ignore_sync_check__ */
10 
11 /*
12  * Internal bits. Don't use bitmasks directly, because these bits are
13  * unstable. You should use checking functions.
14  */
15 
16 #define INAT_OPCODE_TABLE_SIZE 256
17 #define INAT_GROUP_TABLE_SIZE 8
18 
19 /* Legacy last prefixes */
20 #define INAT_PFX_OPNDSZ	1	/* 0x66 */ /* LPFX1 */
21 #define INAT_PFX_REPE	2	/* 0xF3 */ /* LPFX2 */
22 #define INAT_PFX_REPNE	3	/* 0xF2 */ /* LPFX3 */
23 /* Other Legacy prefixes */
24 #define INAT_PFX_LOCK	4	/* 0xF0 */
25 #define INAT_PFX_CS	5	/* 0x2E */
26 #define INAT_PFX_DS	6	/* 0x3E */
27 #define INAT_PFX_ES	7	/* 0x26 */
28 #define INAT_PFX_FS	8	/* 0x64 */
29 #define INAT_PFX_GS	9	/* 0x65 */
30 #define INAT_PFX_SS	10	/* 0x36 */
31 #define INAT_PFX_ADDRSZ	11	/* 0x67 */
32 /* x86-64 REX prefix */
33 #define INAT_PFX_REX	12	/* 0x4X */
34 /* AVX VEX prefixes */
35 #define INAT_PFX_VEX2	13	/* 2-bytes VEX prefix */
36 #define INAT_PFX_VEX3	14	/* 3-bytes VEX prefix */
37 #define INAT_PFX_EVEX	15	/* EVEX prefix */
38 /* x86-64 REX2 prefix */
39 #define INAT_PFX_REX2	16	/* 0xD5 */
40 
41 #define INAT_LSTPFX_MAX	3
42 #define INAT_LGCPFX_MAX	11
43 
44 /* Immediate size */
45 #define INAT_IMM_BYTE		1
46 #define INAT_IMM_WORD		2
47 #define INAT_IMM_DWORD		3
48 #define INAT_IMM_QWORD		4
49 #define INAT_IMM_PTR		5
50 #define INAT_IMM_VWORD32	6
51 #define INAT_IMM_VWORD		7
52 
53 /* Legacy prefix */
54 #define INAT_PFX_OFFS	0
55 #define INAT_PFX_BITS	5
56 #define INAT_PFX_MAX    ((1 << INAT_PFX_BITS) - 1)
57 #define INAT_PFX_MASK	(INAT_PFX_MAX << INAT_PFX_OFFS)
58 /* Escape opcodes */
59 #define INAT_ESC_OFFS	(INAT_PFX_OFFS + INAT_PFX_BITS)
60 #define INAT_ESC_BITS	2
61 #define INAT_ESC_MAX	((1 << INAT_ESC_BITS) - 1)
62 #define INAT_ESC_MASK	(INAT_ESC_MAX << INAT_ESC_OFFS)
63 /* Group opcodes (1-16) */
64 #define INAT_GRP_OFFS	(INAT_ESC_OFFS + INAT_ESC_BITS)
65 #define INAT_GRP_BITS	5
66 #define INAT_GRP_MAX	((1 << INAT_GRP_BITS) - 1)
67 #define INAT_GRP_MASK	(INAT_GRP_MAX << INAT_GRP_OFFS)
68 /* Immediates */
69 #define INAT_IMM_OFFS	(INAT_GRP_OFFS + INAT_GRP_BITS)
70 #define INAT_IMM_BITS	3
71 #define INAT_IMM_MASK	(((1 << INAT_IMM_BITS) - 1) << INAT_IMM_OFFS)
72 /* Flags */
73 #define INAT_FLAG_OFFS	(INAT_IMM_OFFS + INAT_IMM_BITS)
74 #define INAT_MODRM	(1 << (INAT_FLAG_OFFS))
75 #define INAT_FORCE64	(1 << (INAT_FLAG_OFFS + 1))
76 #define INAT_SCNDIMM	(1 << (INAT_FLAG_OFFS + 2))
77 #define INAT_MOFFSET	(1 << (INAT_FLAG_OFFS + 3))
78 #define INAT_VARIANT	(1 << (INAT_FLAG_OFFS + 4))
79 #define INAT_VEXOK	(1 << (INAT_FLAG_OFFS + 5))
80 #define INAT_VEXONLY	(1 << (INAT_FLAG_OFFS + 6))
81 #define INAT_EVEXONLY	(1 << (INAT_FLAG_OFFS + 7))
82 #define INAT_NO_REX2	(1 << (INAT_FLAG_OFFS + 8))
83 #define INAT_REX2_VARIANT	(1 << (INAT_FLAG_OFFS + 9))
84 /* Attribute making macros for attribute tables */
85 #define INAT_MAKE_PREFIX(pfx)	(pfx << INAT_PFX_OFFS)
86 #define INAT_MAKE_ESCAPE(esc)	(esc << INAT_ESC_OFFS)
87 #define INAT_MAKE_GROUP(grp)	((grp << INAT_GRP_OFFS) | INAT_MODRM)
88 #define INAT_MAKE_IMM(imm)	(imm << INAT_IMM_OFFS)
89 
90 /* Identifiers for segment registers */
91 #define INAT_SEG_REG_IGNORE	0
92 #define INAT_SEG_REG_DEFAULT	1
93 #define INAT_SEG_REG_CS		2
94 #define INAT_SEG_REG_SS		3
95 #define INAT_SEG_REG_DS		4
96 #define INAT_SEG_REG_ES		5
97 #define INAT_SEG_REG_FS		6
98 #define INAT_SEG_REG_GS		7
99 
100 /* Attribute search APIs */
101 extern insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode);
102 extern int inat_get_last_prefix_id(insn_byte_t last_pfx);
103 extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode,
104 					     int lpfx_id,
105 					     insn_attr_t esc_attr);
106 extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm,
107 					    int lpfx_id,
108 					    insn_attr_t esc_attr);
109 extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode,
110 					  insn_byte_t vex_m,
111 					  insn_byte_t vex_pp);
112 
113 /* Attribute checking functions */
114 static inline int inat_is_legacy_prefix(insn_attr_t attr)
115 {
116 	attr &= INAT_PFX_MASK;
117 	return attr && attr <= INAT_LGCPFX_MAX;
118 }
119 
120 static inline int inat_is_address_size_prefix(insn_attr_t attr)
121 {
122 	return (attr & INAT_PFX_MASK) == INAT_PFX_ADDRSZ;
123 }
124 
125 static inline int inat_is_operand_size_prefix(insn_attr_t attr)
126 {
127 	return (attr & INAT_PFX_MASK) == INAT_PFX_OPNDSZ;
128 }
129 
130 static inline int inat_is_rex_prefix(insn_attr_t attr)
131 {
132 	return (attr & INAT_PFX_MASK) == INAT_PFX_REX;
133 }
134 
135 static inline int inat_is_rex2_prefix(insn_attr_t attr)
136 {
137 	return (attr & INAT_PFX_MASK) == INAT_PFX_REX2;
138 }
139 
140 static inline int inat_last_prefix_id(insn_attr_t attr)
141 {
142 	if ((attr & INAT_PFX_MASK) > INAT_LSTPFX_MAX)
143 		return 0;
144 	else
145 		return attr & INAT_PFX_MASK;
146 }
147 
148 static inline int inat_is_vex_prefix(insn_attr_t attr)
149 {
150 	attr &= INAT_PFX_MASK;
151 	return attr == INAT_PFX_VEX2 || attr == INAT_PFX_VEX3 ||
152 	       attr == INAT_PFX_EVEX;
153 }
154 
155 static inline int inat_is_evex_prefix(insn_attr_t attr)
156 {
157 	return (attr & INAT_PFX_MASK) == INAT_PFX_EVEX;
158 }
159 
160 static inline int inat_is_vex3_prefix(insn_attr_t attr)
161 {
162 	return (attr & INAT_PFX_MASK) == INAT_PFX_VEX3;
163 }
164 
165 static inline int inat_is_escape(insn_attr_t attr)
166 {
167 	return attr & INAT_ESC_MASK;
168 }
169 
170 static inline int inat_escape_id(insn_attr_t attr)
171 {
172 	return (attr & INAT_ESC_MASK) >> INAT_ESC_OFFS;
173 }
174 
175 static inline int inat_is_group(insn_attr_t attr)
176 {
177 	return attr & INAT_GRP_MASK;
178 }
179 
180 static inline int inat_group_id(insn_attr_t attr)
181 {
182 	return (attr & INAT_GRP_MASK) >> INAT_GRP_OFFS;
183 }
184 
185 static inline int inat_group_common_attribute(insn_attr_t attr)
186 {
187 	return attr & ~INAT_GRP_MASK;
188 }
189 
190 static inline int inat_has_immediate(insn_attr_t attr)
191 {
192 	return attr & INAT_IMM_MASK;
193 }
194 
195 static inline int inat_immediate_size(insn_attr_t attr)
196 {
197 	return (attr & INAT_IMM_MASK) >> INAT_IMM_OFFS;
198 }
199 
200 static inline int inat_has_modrm(insn_attr_t attr)
201 {
202 	return attr & INAT_MODRM;
203 }
204 
205 static inline int inat_is_force64(insn_attr_t attr)
206 {
207 	return attr & INAT_FORCE64;
208 }
209 
210 static inline int inat_has_second_immediate(insn_attr_t attr)
211 {
212 	return attr & INAT_SCNDIMM;
213 }
214 
215 static inline int inat_has_moffset(insn_attr_t attr)
216 {
217 	return attr & INAT_MOFFSET;
218 }
219 
220 static inline int inat_has_variant(insn_attr_t attr)
221 {
222 	return attr & INAT_VARIANT;
223 }
224 
225 static inline int inat_accept_vex(insn_attr_t attr)
226 {
227 	return attr & INAT_VEXOK;
228 }
229 
230 static inline int inat_must_vex(insn_attr_t attr)
231 {
232 	return attr & (INAT_VEXONLY | INAT_EVEXONLY);
233 }
234 
235 static inline int inat_must_evex(insn_attr_t attr)
236 {
237 	return attr & INAT_EVEXONLY;
238 }
239 #endif
240