xref: /linux/arch/x86/include/asm/dma-mapping.h (revision 827634added7f38b7d724cab1dccdb2b004c13c3)
1 #ifndef _ASM_X86_DMA_MAPPING_H
2 #define _ASM_X86_DMA_MAPPING_H
3 
4 /*
5  * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
6  * Documentation/DMA-API.txt for documentation.
7  */
8 
9 #include <linux/kmemcheck.h>
10 #include <linux/scatterlist.h>
11 #include <linux/dma-debug.h>
12 #include <linux/dma-attrs.h>
13 #include <asm/io.h>
14 #include <asm/swiotlb.h>
15 #include <asm-generic/dma-coherent.h>
16 #include <linux/dma-contiguous.h>
17 
18 #ifdef CONFIG_ISA
19 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
20 #else
21 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
22 #endif
23 
24 #define DMA_ERROR_CODE	0
25 
26 extern int iommu_merge;
27 extern struct device x86_dma_fallback_dev;
28 extern int panic_on_overflow;
29 
30 extern struct dma_map_ops *dma_ops;
31 
32 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
33 {
34 #ifndef CONFIG_X86_DEV_DMA_OPS
35 	return dma_ops;
36 #else
37 	if (unlikely(!dev) || !dev->archdata.dma_ops)
38 		return dma_ops;
39 	else
40 		return dev->archdata.dma_ops;
41 #endif
42 }
43 
44 #include <asm-generic/dma-mapping-common.h>
45 
46 /* Make sure we keep the same behaviour */
47 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
48 {
49 	struct dma_map_ops *ops = get_dma_ops(dev);
50 	debug_dma_mapping_error(dev, dma_addr);
51 	if (ops->mapping_error)
52 		return ops->mapping_error(dev, dma_addr);
53 
54 	return (dma_addr == DMA_ERROR_CODE);
55 }
56 
57 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
58 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
59 
60 extern int dma_supported(struct device *hwdev, u64 mask);
61 extern int dma_set_mask(struct device *dev, u64 mask);
62 
63 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
64 					dma_addr_t *dma_addr, gfp_t flag,
65 					struct dma_attrs *attrs);
66 
67 extern void dma_generic_free_coherent(struct device *dev, size_t size,
68 				      void *vaddr, dma_addr_t dma_addr,
69 				      struct dma_attrs *attrs);
70 
71 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
72 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
73 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
74 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
75 #else
76 
77 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
78 {
79 	if (!dev->dma_mask)
80 		return 0;
81 
82 	return addr + size - 1 <= *dev->dma_mask;
83 }
84 
85 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
86 {
87 	return paddr;
88 }
89 
90 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
91 {
92 	return daddr;
93 }
94 #endif /* CONFIG_X86_DMA_REMAP */
95 
96 static inline void
97 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
98 	enum dma_data_direction dir)
99 {
100 	flush_write_buffers();
101 }
102 
103 static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
104 						    gfp_t gfp)
105 {
106 	unsigned long dma_mask = 0;
107 
108 	dma_mask = dev->coherent_dma_mask;
109 	if (!dma_mask)
110 		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
111 
112 	return dma_mask;
113 }
114 
115 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
116 {
117 	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
118 
119 	if (dma_mask <= DMA_BIT_MASK(24))
120 		gfp |= GFP_DMA;
121 #ifdef CONFIG_X86_64
122 	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
123 		gfp |= GFP_DMA32;
124 #endif
125        return gfp;
126 }
127 
128 #define dma_alloc_coherent(d,s,h,f)	dma_alloc_attrs(d,s,h,f,NULL)
129 
130 static inline void *
131 dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
132 		gfp_t gfp, struct dma_attrs *attrs)
133 {
134 	struct dma_map_ops *ops = get_dma_ops(dev);
135 	void *memory;
136 
137 	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
138 
139 	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
140 		return memory;
141 
142 	if (!dev)
143 		dev = &x86_dma_fallback_dev;
144 
145 	if (!is_device_dma_capable(dev))
146 		return NULL;
147 
148 	if (!ops->alloc)
149 		return NULL;
150 
151 	memory = ops->alloc(dev, size, dma_handle,
152 			    dma_alloc_coherent_gfp_flags(dev, gfp), attrs);
153 	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
154 
155 	return memory;
156 }
157 
158 #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
159 
160 static inline void dma_free_attrs(struct device *dev, size_t size,
161 				  void *vaddr, dma_addr_t bus,
162 				  struct dma_attrs *attrs)
163 {
164 	struct dma_map_ops *ops = get_dma_ops(dev);
165 
166 	WARN_ON(irqs_disabled());       /* for portability */
167 
168 	if (dma_release_from_coherent(dev, get_order(size), vaddr))
169 		return;
170 
171 	debug_dma_free_coherent(dev, size, vaddr, bus);
172 	if (ops->free)
173 		ops->free(dev, size, vaddr, bus, attrs);
174 }
175 
176 #endif
177