xref: /linux/arch/x86/include/asm/dma-mapping.h (revision 2277ab4a1df50e05bc732fe9488d4e902bb8399a)
1 #ifndef _ASM_X86_DMA_MAPPING_H
2 #define _ASM_X86_DMA_MAPPING_H
3 
4 /*
5  * IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and
6  * Documentation/DMA-API.txt for documentation.
7  */
8 
9 #include <linux/kmemcheck.h>
10 #include <linux/scatterlist.h>
11 #include <linux/dma-debug.h>
12 #include <linux/dma-attrs.h>
13 #include <asm/io.h>
14 #include <asm/swiotlb.h>
15 #include <asm-generic/dma-coherent.h>
16 
17 extern dma_addr_t bad_dma_address;
18 extern int iommu_merge;
19 extern struct device x86_dma_fallback_dev;
20 extern int panic_on_overflow;
21 
22 extern struct dma_map_ops *dma_ops;
23 
24 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
25 {
26 #ifdef CONFIG_X86_32
27 	return dma_ops;
28 #else
29 	if (unlikely(!dev) || !dev->archdata.dma_ops)
30 		return dma_ops;
31 	else
32 		return dev->archdata.dma_ops;
33 #endif
34 }
35 
36 #include <asm-generic/dma-mapping-common.h>
37 
38 /* Make sure we keep the same behaviour */
39 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
40 {
41 	struct dma_map_ops *ops = get_dma_ops(dev);
42 	if (ops->mapping_error)
43 		return ops->mapping_error(dev, dma_addr);
44 
45 	return (dma_addr == bad_dma_address);
46 }
47 
48 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
49 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
50 #define dma_is_consistent(d, h)	(1)
51 
52 extern int dma_supported(struct device *hwdev, u64 mask);
53 extern int dma_set_mask(struct device *dev, u64 mask);
54 
55 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
56 					dma_addr_t *dma_addr, gfp_t flag);
57 
58 static inline void
59 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
60 	enum dma_data_direction dir)
61 {
62 	flush_write_buffers();
63 }
64 
65 static inline int dma_get_cache_alignment(void)
66 {
67 	/* no easy way to get cache size on all x86, so return the
68 	 * maximum possible, to be safe */
69 	return boot_cpu_data.x86_clflush_size;
70 }
71 
72 static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
73 						    gfp_t gfp)
74 {
75 	unsigned long dma_mask = 0;
76 
77 	dma_mask = dev->coherent_dma_mask;
78 	if (!dma_mask)
79 		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
80 
81 	return dma_mask;
82 }
83 
84 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
85 {
86 	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
87 
88 	if (dma_mask <= DMA_BIT_MASK(24))
89 		gfp |= GFP_DMA;
90 #ifdef CONFIG_X86_64
91 	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
92 		gfp |= GFP_DMA32;
93 #endif
94        return gfp;
95 }
96 
97 static inline void *
98 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
99 		gfp_t gfp)
100 {
101 	struct dma_map_ops *ops = get_dma_ops(dev);
102 	void *memory;
103 
104 	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
105 
106 	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
107 		return memory;
108 
109 	if (!dev) {
110 		dev = &x86_dma_fallback_dev;
111 		gfp |= GFP_DMA;
112 	}
113 
114 	if (!is_device_dma_capable(dev))
115 		return NULL;
116 
117 	if (!ops->alloc_coherent)
118 		return NULL;
119 
120 	memory = ops->alloc_coherent(dev, size, dma_handle,
121 				     dma_alloc_coherent_gfp_flags(dev, gfp));
122 	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
123 
124 	return memory;
125 }
126 
127 static inline void dma_free_coherent(struct device *dev, size_t size,
128 				     void *vaddr, dma_addr_t bus)
129 {
130 	struct dma_map_ops *ops = get_dma_ops(dev);
131 
132 	WARN_ON(irqs_disabled());       /* for portability */
133 
134 	if (dma_release_from_coherent(dev, get_order(size), vaddr))
135 		return;
136 
137 	debug_dma_free_coherent(dev, size, vaddr, bus);
138 	if (ops->free_coherent)
139 		ops->free_coherent(dev, size, vaddr, bus);
140 }
141 
142 #endif
143