1381aa07aSDave Hansen #ifndef _ASM_X86_DISABLED_FEATURES_H 2381aa07aSDave Hansen #define _ASM_X86_DISABLED_FEATURES_H 3381aa07aSDave Hansen 4381aa07aSDave Hansen /* These features, although they might be available in a CPU 5381aa07aSDave Hansen * will not be used because the compile options to support 6381aa07aSDave Hansen * them are not present. 7381aa07aSDave Hansen * 8381aa07aSDave Hansen * This code allows them to be checked and disabled at 9381aa07aSDave Hansen * compile time without an explicit #ifdef. Use 10381aa07aSDave Hansen * cpu_feature_enabled(). 11381aa07aSDave Hansen */ 12381aa07aSDave Hansen 13dae0a105SAndy Lutomirski #ifdef CONFIG_X86_SMAP 14dae0a105SAndy Lutomirski # define DISABLE_SMAP 0 15dae0a105SAndy Lutomirski #else 16dae0a105SAndy Lutomirski # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31)) 17dae0a105SAndy Lutomirski #endif 18dae0a105SAndy Lutomirski 19b971880fSBabu Moger #ifdef CONFIG_X86_UMIP 203522c2a6SRicardo Neri # define DISABLE_UMIP 0 213522c2a6SRicardo Neri #else 223522c2a6SRicardo Neri # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) 233522c2a6SRicardo Neri #endif 243522c2a6SRicardo Neri 259298b815SDave Hansen #ifdef CONFIG_X86_64 269298b815SDave Hansen # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) 279298b815SDave Hansen # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) 289298b815SDave Hansen # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) 299298b815SDave Hansen # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) 30cba4671aSAndy Lutomirski # define DISABLE_PCID 0 319298b815SDave Hansen #else 329298b815SDave Hansen # define DISABLE_VME 0 339298b815SDave Hansen # define DISABLE_K6_MTRR 0 349298b815SDave Hansen # define DISABLE_CYRIX_ARR 0 359298b815SDave Hansen # define DISABLE_CENTAUR_MCR 0 36cba4671aSAndy Lutomirski # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) 379298b815SDave Hansen #endif /* CONFIG_X86_64 */ 389298b815SDave Hansen 39dfb4a70fSDave Hansen #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 40dfb4a70fSDave Hansen # define DISABLE_PKU 0 41dfb4a70fSDave Hansen # define DISABLE_OSPKE 0 42e8df1a95SDave Hansen #else 43e8df1a95SDave Hansen # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) 44e8df1a95SDave Hansen # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) 45dfb4a70fSDave Hansen #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ 46dfb4a70fSDave Hansen 473677d4c6SKirill A. Shutemov #ifdef CONFIG_X86_5LEVEL 483677d4c6SKirill A. Shutemov # define DISABLE_LA57 0 493677d4c6SKirill A. Shutemov #else 503677d4c6SKirill A. Shutemov # define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) 513677d4c6SKirill A. Shutemov #endif 523677d4c6SKirill A. Shutemov 53a89f040fSThomas Gleixner #ifdef CONFIG_PAGE_TABLE_ISOLATION 54a89f040fSThomas Gleixner # define DISABLE_PTI 0 55a89f040fSThomas Gleixner #else 56a89f040fSThomas Gleixner # define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31)) 57a89f040fSThomas Gleixner #endif 58a89f040fSThomas Gleixner 597c1ef591SFenghua Yu #ifdef CONFIG_INTEL_IOMMU_SVM 607c1ef591SFenghua Yu # define DISABLE_ENQCMD 0 617c1ef591SFenghua Yu #else 621478b99aSFenghua Yu # define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31)) 637c1ef591SFenghua Yu #endif 641478b99aSFenghua Yu 65e7b6385bSSean Christopherson #ifdef CONFIG_X86_SGX 66e7b6385bSSean Christopherson # define DISABLE_SGX 0 67e7b6385bSSean Christopherson #else 68e7b6385bSSean Christopherson # define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31)) 69e7b6385bSSean Christopherson #endif 70e7b6385bSSean Christopherson 71*59bd54a8SKuppuswamy Sathyanarayanan #ifdef CONFIG_INTEL_TDX_GUEST 72*59bd54a8SKuppuswamy Sathyanarayanan # define DISABLE_TDX_GUEST 0 73*59bd54a8SKuppuswamy Sathyanarayanan #else 74*59bd54a8SKuppuswamy Sathyanarayanan # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) 75*59bd54a8SKuppuswamy Sathyanarayanan #endif 76*59bd54a8SKuppuswamy Sathyanarayanan 77381aa07aSDave Hansen /* 78381aa07aSDave Hansen * Make sure to add features to the correct mask 79381aa07aSDave Hansen */ 809298b815SDave Hansen #define DISABLED_MASK0 (DISABLE_VME) 81381aa07aSDave Hansen #define DISABLED_MASK1 0 82381aa07aSDave Hansen #define DISABLED_MASK2 0 839298b815SDave Hansen #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) 84cba4671aSAndy Lutomirski #define DISABLED_MASK4 (DISABLE_PCID) 85381aa07aSDave Hansen #define DISABLED_MASK5 0 86381aa07aSDave Hansen #define DISABLED_MASK6 0 87a89f040fSThomas Gleixner #define DISABLED_MASK7 (DISABLE_PTI) 88*59bd54a8SKuppuswamy Sathyanarayanan #define DISABLED_MASK8 (DISABLE_TDX_GUEST) 89e7b6385bSSean Christopherson #define DISABLED_MASK9 (DISABLE_SMAP|DISABLE_SGX) 90dfb4a70fSDave Hansen #define DISABLED_MASK10 0 91dfb4a70fSDave Hansen #define DISABLED_MASK11 0 92dfb4a70fSDave Hansen #define DISABLED_MASK12 0 93dfb4a70fSDave Hansen #define DISABLED_MASK13 0 94dfb4a70fSDave Hansen #define DISABLED_MASK14 0 95dfb4a70fSDave Hansen #define DISABLED_MASK15 0 961478b99aSFenghua Yu #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \ 971478b99aSFenghua Yu DISABLE_ENQCMD) 986e17cb9cSDave Hansen #define DISABLED_MASK17 0 9995ca0ee8SDavid Woodhouse #define DISABLED_MASK18 0 100fb35d30fSSean Christopherson #define DISABLED_MASK19 0 101fb35d30fSSean Christopherson #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 20) 102381aa07aSDave Hansen 103381aa07aSDave Hansen #endif /* _ASM_X86_DISABLED_FEATURES_H */ 104