xref: /linux/arch/x86/include/asm/disabled-features.h (revision b82779648dfd3814df4e381f086326ec70fd791f)
1381aa07aSDave Hansen #ifndef _ASM_X86_DISABLED_FEATURES_H
2381aa07aSDave Hansen #define _ASM_X86_DISABLED_FEATURES_H
3381aa07aSDave Hansen 
4381aa07aSDave Hansen /* These features, although they might be available in a CPU
5381aa07aSDave Hansen  * will not be used because the compile options to support
6381aa07aSDave Hansen  * them are not present.
7381aa07aSDave Hansen  *
8381aa07aSDave Hansen  * This code allows them to be checked and disabled at
9381aa07aSDave Hansen  * compile time without an explicit #ifdef.  Use
10381aa07aSDave Hansen  * cpu_feature_enabled().
11381aa07aSDave Hansen  */
12381aa07aSDave Hansen 
13b971880fSBabu Moger #ifdef CONFIG_X86_UMIP
143522c2a6SRicardo Neri # define DISABLE_UMIP	0
153522c2a6SRicardo Neri #else
163522c2a6SRicardo Neri # define DISABLE_UMIP	(1<<(X86_FEATURE_UMIP & 31))
173522c2a6SRicardo Neri #endif
183522c2a6SRicardo Neri 
199298b815SDave Hansen #ifdef CONFIG_X86_64
209298b815SDave Hansen # define DISABLE_VME		(1<<(X86_FEATURE_VME & 31))
219298b815SDave Hansen # define DISABLE_K6_MTRR	(1<<(X86_FEATURE_K6_MTRR & 31))
229298b815SDave Hansen # define DISABLE_CYRIX_ARR	(1<<(X86_FEATURE_CYRIX_ARR & 31))
239298b815SDave Hansen # define DISABLE_CENTAUR_MCR	(1<<(X86_FEATURE_CENTAUR_MCR & 31))
24cba4671aSAndy Lutomirski # define DISABLE_PCID		0
259298b815SDave Hansen #else
269298b815SDave Hansen # define DISABLE_VME		0
279298b815SDave Hansen # define DISABLE_K6_MTRR	0
289298b815SDave Hansen # define DISABLE_CYRIX_ARR	0
299298b815SDave Hansen # define DISABLE_CENTAUR_MCR	0
30cba4671aSAndy Lutomirski # define DISABLE_PCID		(1<<(X86_FEATURE_PCID & 31))
319298b815SDave Hansen #endif /* CONFIG_X86_64 */
329298b815SDave Hansen 
33dfb4a70fSDave Hansen #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
34dfb4a70fSDave Hansen # define DISABLE_PKU		0
35dfb4a70fSDave Hansen # define DISABLE_OSPKE		0
36e8df1a95SDave Hansen #else
37e8df1a95SDave Hansen # define DISABLE_PKU		(1<<(X86_FEATURE_PKU & 31))
38e8df1a95SDave Hansen # define DISABLE_OSPKE		(1<<(X86_FEATURE_OSPKE & 31))
39dfb4a70fSDave Hansen #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
40dfb4a70fSDave Hansen 
413677d4c6SKirill A. Shutemov #ifdef CONFIG_X86_5LEVEL
423677d4c6SKirill A. Shutemov # define DISABLE_LA57	0
433677d4c6SKirill A. Shutemov #else
443677d4c6SKirill A. Shutemov # define DISABLE_LA57	(1<<(X86_FEATURE_LA57 & 31))
453677d4c6SKirill A. Shutemov #endif
463677d4c6SKirill A. Shutemov 
47ea4654e0SBreno Leitao #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
48a89f040fSThomas Gleixner # define DISABLE_PTI		0
49a89f040fSThomas Gleixner #else
50a89f040fSThomas Gleixner # define DISABLE_PTI		(1 << (X86_FEATURE_PTI & 31))
51a89f040fSThomas Gleixner #endif
52a89f040fSThomas Gleixner 
53aefb2f2eSBreno Leitao #ifdef CONFIG_MITIGATION_RETPOLINE
54369ae6ffSPeter Zijlstra # define DISABLE_RETPOLINE	0
55369ae6ffSPeter Zijlstra #else
56369ae6ffSPeter Zijlstra # define DISABLE_RETPOLINE	((1 << (X86_FEATURE_RETPOLINE & 31)) | \
57f43b9876SPeter Zijlstra 				 (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
58f43b9876SPeter Zijlstra #endif
59f43b9876SPeter Zijlstra 
600911b8c5SBreno Leitao #ifdef CONFIG_MITIGATION_RETHUNK
61f43b9876SPeter Zijlstra # define DISABLE_RETHUNK	0
62f43b9876SPeter Zijlstra #else
63f43b9876SPeter Zijlstra # define DISABLE_RETHUNK	(1 << (X86_FEATURE_RETHUNK & 31))
64f43b9876SPeter Zijlstra #endif
65f43b9876SPeter Zijlstra 
66ac61d439SBreno Leitao #ifdef CONFIG_MITIGATION_UNRET_ENTRY
67f43b9876SPeter Zijlstra # define DISABLE_UNRET		0
68f43b9876SPeter Zijlstra #else
69f43b9876SPeter Zijlstra # define DISABLE_UNRET		(1 << (X86_FEATURE_UNRET & 31))
70369ae6ffSPeter Zijlstra #endif
71369ae6ffSPeter Zijlstra 
725fa31af3SBreno Leitao #ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
7380e4c1cdSThomas Gleixner # define DISABLE_CALL_DEPTH_TRACKING	0
7480e4c1cdSThomas Gleixner #else
7580e4c1cdSThomas Gleixner # define DISABLE_CALL_DEPTH_TRACKING	(1 << (X86_FEATURE_CALL_DEPTH & 31))
7680e4c1cdSThomas Gleixner #endif
7780e4c1cdSThomas Gleixner 
78e0bddc19SKirill A. Shutemov #ifdef CONFIG_ADDRESS_MASKING
79e0bddc19SKirill A. Shutemov # define DISABLE_LAM		0
80e0bddc19SKirill A. Shutemov #else
81e0bddc19SKirill A. Shutemov # define DISABLE_LAM		(1 << (X86_FEATURE_LAM & 31))
82e0bddc19SKirill A. Shutemov #endif
83e0bddc19SKirill A. Shutemov 
847c1ef591SFenghua Yu #ifdef CONFIG_INTEL_IOMMU_SVM
857c1ef591SFenghua Yu # define DISABLE_ENQCMD		0
867c1ef591SFenghua Yu #else
871478b99aSFenghua Yu # define DISABLE_ENQCMD		(1 << (X86_FEATURE_ENQCMD & 31))
887c1ef591SFenghua Yu #endif
891478b99aSFenghua Yu 
90e7b6385bSSean Christopherson #ifdef CONFIG_X86_SGX
91e7b6385bSSean Christopherson # define DISABLE_SGX	0
92e7b6385bSSean Christopherson #else
93e7b6385bSSean Christopherson # define DISABLE_SGX	(1 << (X86_FEATURE_SGX & 31))
94e7b6385bSSean Christopherson #endif
95e7b6385bSSean Christopherson 
9615e15d64SJuergen Gross #ifdef CONFIG_XEN_PV
9715e15d64SJuergen Gross # define DISABLE_XENPV		0
9815e15d64SJuergen Gross #else
9915e15d64SJuergen Gross # define DISABLE_XENPV		(1 << (X86_FEATURE_XENPV & 31))
10015e15d64SJuergen Gross #endif
10115e15d64SJuergen Gross 
10259bd54a8SKuppuswamy Sathyanarayanan #ifdef CONFIG_INTEL_TDX_GUEST
10359bd54a8SKuppuswamy Sathyanarayanan # define DISABLE_TDX_GUEST	0
10459bd54a8SKuppuswamy Sathyanarayanan #else
10559bd54a8SKuppuswamy Sathyanarayanan # define DISABLE_TDX_GUEST	(1 << (X86_FEATURE_TDX_GUEST & 31))
10659bd54a8SKuppuswamy Sathyanarayanan #endif
10759bd54a8SKuppuswamy Sathyanarayanan 
108701fb66dSRick Edgecombe #ifdef CONFIG_X86_USER_SHADOW_STACK
109701fb66dSRick Edgecombe #define DISABLE_USER_SHSTK	0
110701fb66dSRick Edgecombe #else
111701fb66dSRick Edgecombe #define DISABLE_USER_SHSTK	(1 << (X86_FEATURE_USER_SHSTK & 31))
112701fb66dSRick Edgecombe #endif
113701fb66dSRick Edgecombe 
114a5f6c2acSRick Edgecombe #ifdef CONFIG_X86_KERNEL_IBT
115a5f6c2acSRick Edgecombe #define DISABLE_IBT	0
116a5f6c2acSRick Edgecombe #else
117a5f6c2acSRick Edgecombe #define DISABLE_IBT	(1 << (X86_FEATURE_IBT & 31))
118a5f6c2acSRick Edgecombe #endif
119a5f6c2acSRick Edgecombe 
120e554a8caSH. Peter Anvin (Intel) #ifdef CONFIG_X86_FRED
121e554a8caSH. Peter Anvin (Intel) # define DISABLE_FRED	0
122e554a8caSH. Peter Anvin (Intel) #else
123e554a8caSH. Peter Anvin (Intel) # define DISABLE_FRED	(1 << (X86_FEATURE_FRED & 31))
124e554a8caSH. Peter Anvin (Intel) #endif
125e554a8caSH. Peter Anvin (Intel) 
126c3b86e61SMichael Roth #ifdef CONFIG_KVM_AMD_SEV
127c3b86e61SMichael Roth #define DISABLE_SEV_SNP		0
128c3b86e61SMichael Roth #else
129b6e0f666SBrijesh Singh #define DISABLE_SEV_SNP		(1 << (X86_FEATURE_SEV_SNP & 31))
130c3b86e61SMichael Roth #endif
131b6e0f666SBrijesh Singh 
132381aa07aSDave Hansen /*
133381aa07aSDave Hansen  * Make sure to add features to the correct mask
134381aa07aSDave Hansen  */
1359298b815SDave Hansen #define DISABLED_MASK0	(DISABLE_VME)
136381aa07aSDave Hansen #define DISABLED_MASK1	0
137381aa07aSDave Hansen #define DISABLED_MASK2	0
1389298b815SDave Hansen #define DISABLED_MASK3	(DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
139cba4671aSAndy Lutomirski #define DISABLED_MASK4	(DISABLE_PCID)
140381aa07aSDave Hansen #define DISABLED_MASK5	0
141381aa07aSDave Hansen #define DISABLED_MASK6	0
142a89f040fSThomas Gleixner #define DISABLED_MASK7	(DISABLE_PTI)
14315e15d64SJuergen Gross #define DISABLED_MASK8	(DISABLE_XENPV|DISABLE_TDX_GUEST)
144dbae0a93SBorislav Petkov #define DISABLED_MASK9	(DISABLE_SGX)
145dfb4a70fSDave Hansen #define DISABLED_MASK10	0
14680e4c1cdSThomas Gleixner #define DISABLED_MASK11	(DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
147701fb66dSRick Edgecombe 			 DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
148e554a8caSH. Peter Anvin (Intel) #define DISABLED_MASK12	(DISABLE_FRED|DISABLE_LAM)
149dfb4a70fSDave Hansen #define DISABLED_MASK13	0
150dfb4a70fSDave Hansen #define DISABLED_MASK14	0
151dfb4a70fSDave Hansen #define DISABLED_MASK15	0
1521478b99aSFenghua Yu #define DISABLED_MASK16	(DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
1531478b99aSFenghua Yu 			 DISABLE_ENQCMD)
1546e17cb9cSDave Hansen #define DISABLED_MASK17	0
155a5f6c2acSRick Edgecombe #define DISABLED_MASK18	(DISABLE_IBT)
156b6e0f666SBrijesh Singh #define DISABLED_MASK19	(DISABLE_SEV_SNP)
1578415a748SKim Phillips #define DISABLED_MASK20	0
158*7f274e60SSandipan Das #define DISABLED_MASK21	0
159*7f274e60SSandipan Das #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
160381aa07aSDave Hansen 
161381aa07aSDave Hansen #endif /* _ASM_X86_DISABLED_FEATURES_H */
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