1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_CPUID_API_H 3 #define _ASM_X86_CPUID_API_H 4 5 #include <asm/cpuid/types.h> 6 7 #include <linux/build_bug.h> 8 #include <linux/types.h> 9 10 #include <asm/string.h> 11 12 /* 13 * Raw CPUID accessors: 14 */ 15 16 #ifdef CONFIG_X86_32 17 bool cpuid_feature(void); 18 #else 19 static inline bool cpuid_feature(void) 20 { 21 return true; 22 } 23 #endif 24 25 static inline void native_cpuid(u32 *eax, u32 *ebx, 26 u32 *ecx, u32 *edx) 27 { 28 /* ecx is often an input as well as an output. */ 29 asm volatile("cpuid" 30 : "=a" (*eax), 31 "=b" (*ebx), 32 "=c" (*ecx), 33 "=d" (*edx) 34 : "0" (*eax), "2" (*ecx) 35 : "memory"); 36 } 37 38 #define NATIVE_CPUID_REG(reg) \ 39 static inline u32 native_cpuid_##reg(u32 op) \ 40 { \ 41 u32 eax = op, ebx, ecx = 0, edx; \ 42 \ 43 native_cpuid(&eax, &ebx, &ecx, &edx); \ 44 \ 45 return reg; \ 46 } 47 48 /* 49 * Native CPUID functions returning a single datum: 50 */ 51 NATIVE_CPUID_REG(eax) 52 NATIVE_CPUID_REG(ebx) 53 NATIVE_CPUID_REG(ecx) 54 NATIVE_CPUID_REG(edx) 55 56 #ifdef CONFIG_PARAVIRT_XXL 57 # include <asm/paravirt.h> 58 #else 59 # define __cpuid native_cpuid 60 #endif 61 62 /* 63 * Generic CPUID function 64 * 65 * Clear ECX since some CPUs (Cyrix MII) do not set or clear ECX 66 * resulting in stale register contents being returned. 67 */ 68 static inline void cpuid(u32 op, 69 u32 *eax, u32 *ebx, 70 u32 *ecx, u32 *edx) 71 { 72 *eax = op; 73 *ecx = 0; 74 __cpuid(eax, ebx, ecx, edx); 75 } 76 77 /* Some CPUID calls want 'count' to be placed in ECX */ 78 static inline void cpuid_count(u32 op, int count, 79 u32 *eax, u32 *ebx, 80 u32 *ecx, u32 *edx) 81 { 82 *eax = op; 83 *ecx = count; 84 __cpuid(eax, ebx, ecx, edx); 85 } 86 87 /* 88 * CPUID functions returning a single datum: 89 */ 90 91 static inline u32 cpuid_eax(u32 op) 92 { 93 u32 eax, ebx, ecx, edx; 94 95 cpuid(op, &eax, &ebx, &ecx, &edx); 96 97 return eax; 98 } 99 100 static inline u32 cpuid_ebx(u32 op) 101 { 102 u32 eax, ebx, ecx, edx; 103 104 cpuid(op, &eax, &ebx, &ecx, &edx); 105 106 return ebx; 107 } 108 109 static inline u32 cpuid_ecx(u32 op) 110 { 111 u32 eax, ebx, ecx, edx; 112 113 cpuid(op, &eax, &ebx, &ecx, &edx); 114 115 return ecx; 116 } 117 118 static inline u32 cpuid_edx(u32 op) 119 { 120 u32 eax, ebx, ecx, edx; 121 122 cpuid(op, &eax, &ebx, &ecx, &edx); 123 124 return edx; 125 } 126 127 static inline void __cpuid_read(u32 leaf, u32 subleaf, u32 *regs) 128 { 129 regs[CPUID_EAX] = leaf; 130 regs[CPUID_ECX] = subleaf; 131 __cpuid(regs + CPUID_EAX, regs + CPUID_EBX, regs + CPUID_ECX, regs + CPUID_EDX); 132 } 133 134 #define cpuid_read_subleaf(leaf, subleaf, regs) { \ 135 static_assert(sizeof(*(regs)) == 16); \ 136 __cpuid_read(leaf, subleaf, (u32 *)(regs)); \ 137 } 138 139 #define cpuid_read(leaf, regs) { \ 140 static_assert(sizeof(*(regs)) == 16); \ 141 __cpuid_read(leaf, 0, (u32 *)(regs)); \ 142 } 143 144 static inline void __cpuid_read_reg(u32 leaf, u32 subleaf, 145 enum cpuid_regs_idx regidx, u32 *reg) 146 { 147 u32 regs[4]; 148 149 __cpuid_read(leaf, subleaf, regs); 150 *reg = regs[regidx]; 151 } 152 153 #define cpuid_subleaf_reg(leaf, subleaf, regidx, reg) { \ 154 static_assert(sizeof(*(reg)) == 4); \ 155 __cpuid_read_reg(leaf, subleaf, regidx, (u32 *)(reg)); \ 156 } 157 158 #define cpuid_leaf_reg(leaf, regidx, reg) { \ 159 static_assert(sizeof(*(reg)) == 4); \ 160 __cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg)); \ 161 } 162 163 /* 164 * Hypervisor-related APIs: 165 */ 166 167 static __always_inline bool cpuid_function_is_indexed(u32 function) 168 { 169 switch (function) { 170 case 4: 171 case 7: 172 case 0xb: 173 case 0xd: 174 case 0xf: 175 case 0x10: 176 case 0x12: 177 case 0x14: 178 case 0x17: 179 case 0x18: 180 case 0x1d: 181 case 0x1e: 182 case 0x1f: 183 case 0x24: 184 case 0x8000001d: 185 return true; 186 } 187 188 return false; 189 } 190 191 #define for_each_possible_cpuid_base_hypervisor(function) \ 192 for (function = 0x40000000; function < 0x40010000; function += 0x100) 193 194 static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves) 195 { 196 u32 base, eax, signature[3]; 197 198 for_each_possible_cpuid_base_hypervisor(base) { 199 cpuid(base, &eax, &signature[0], &signature[1], &signature[2]); 200 201 /* 202 * This must not compile to "call memcmp" because it's called 203 * from PVH early boot code before instrumentation is set up 204 * and memcmp() itself may be instrumented. 205 */ 206 if (!__builtin_memcmp(sig, signature, 12) && 207 (leaves == 0 || ((eax - base) >= leaves))) 208 return base; 209 } 210 211 return 0; 212 } 213 214 /* 215 * CPUID(0x2) parsing: 216 */ 217 218 /** 219 * cpuid_leaf_0x2() - Return sanitized CPUID(0x2) register output 220 * @regs: Output parameter 221 * 222 * Query CPUID(0x2) and store its output in @regs. Force set any 223 * invalid 1-byte descriptor returned by the hardware to zero (the NULL 224 * cache/TLB descriptor) before returning it to the caller. 225 * 226 * Use for_each_cpuid_0x2_desc() to iterate over the register output in 227 * parsed form. 228 */ 229 static inline void cpuid_leaf_0x2(union leaf_0x2_regs *regs) 230 { 231 cpuid_read(0x2, regs); 232 233 /* 234 * All Intel CPUs must report an iteration count of 1. In case 235 * of bogus hardware, treat all returned descriptors as NULL. 236 */ 237 if (regs->desc[0] != 0x01) { 238 for (int i = 0; i < 4; i++) 239 regs->regv[i] = 0; 240 return; 241 } 242 243 /* 244 * The most significant bit (MSB) of each register must be clear. 245 * If a register is invalid, replace its descriptors with NULL. 246 */ 247 for (int i = 0; i < 4; i++) { 248 if (regs->reg[i].invalid) 249 regs->regv[i] = 0; 250 } 251 } 252 253 /** 254 * for_each_cpuid_0x2_desc() - Iterator for parsed CPUID(0x2) descriptors 255 * @_regs: CPUID(0x2) register output, as returned by cpuid_leaf_0x2() 256 * @_ptr: u8 pointer, for macro internal use only 257 * @_desc: Pointer to the parsed CPUID(0x2) descriptor at each iteration 258 * 259 * Loop over the 1-byte descriptors in the passed CPUID(0x2) output registers 260 * @_regs. Provide the parsed information for each descriptor through @_desc. 261 * 262 * To handle cache-specific descriptors, switch on @_desc->c_type. For TLB 263 * descriptors, switch on @_desc->t_type. 264 * 265 * Example usage for cache descriptors:: 266 * 267 * const struct leaf_0x2_table *desc; 268 * union leaf_0x2_regs regs; 269 * u8 *ptr; 270 * 271 * cpuid_leaf_0x2(®s); 272 * for_each_cpuid_0x2_desc(regs, ptr, desc) { 273 * switch (desc->c_type) { 274 * ... 275 * } 276 * } 277 */ 278 #define for_each_cpuid_0x2_desc(_regs, _ptr, _desc) \ 279 for (_ptr = &(_regs).desc[1]; \ 280 _ptr < &(_regs).desc[16] && (_desc = &cpuid_0x2_table[*_ptr]); \ 281 _ptr++) 282 283 /* 284 * CPUID(0x80000006) parsing: 285 */ 286 287 static inline bool cpuid_amd_hygon_has_l3_cache(void) 288 { 289 return cpuid_edx(0x80000006); 290 } 291 292 /* 293 * 'struct cpuid_leaves' accessors (without sanity checks): 294 * 295 * For internal use by the CPUID parser. 296 */ 297 298 /* Return constified pointers for all call-site APIs */ 299 #define __const_ptr(_ptr) \ 300 ((const __typeof__(*(_ptr)) *)(_ptr)) 301 302 #define __cpuid_leaves_subleaf(_leaves, _leaf, _subleaf) \ 303 __const_ptr(&((_leaves)->leaf_ ## _leaf ## _ ## _subleaf)[0]) 304 305 #define __cpuid_leaves_subleaf_n(_leaves, _leaf, _index) \ 306 __const_ptr(&((_leaves)->leaf_ ## _leaf ## _ ## n)[_index]) 307 308 #define __cpuid_leaves_subleaf_info(_leaves, _leaf, _subleaf) \ 309 __const_ptr(&((_leaves)->leaf_ ## _leaf ## _ ## _subleaf ## _ ## info)) 310 311 /* 312 * 'struct cpuid_table' accessors (with sanity checks): 313 * 314 * For internal use by the CPUID parser. 315 */ 316 317 #define __cpuid_table_nr_filled_subleaves(_table, _leaf, _subleaf) \ 318 __cpuid_leaves_subleaf_info(&((_table)->leaves), _leaf, _subleaf)->nr_entries 319 320 #define __cpuid_table_subleaf_range_size(_table, _leaf) \ 321 ARRAY_SIZE((_table)->leaves.leaf_ ## _leaf ## _n) 322 323 #define __cpuid_table_invalid_subleaf(_table, _leaf, _subleaf) \ 324 (((_subleaf) < (__cpuid_leaf_first_subleaf(_leaf))) || \ 325 ((_subleaf) > (__cpuid_leaf_first_subleaf(_leaf) + \ 326 __cpuid_table_subleaf_range_size(_table, _leaf) - 1))) 327 328 /* Return NULL if the parser did not fill that leaf. Check cpuid_subleaf(). */ 329 #define __cpuid_table_subleaf(_table, _leaf, _subleaf) \ 330 ({ \ 331 unsigned int ____f = __cpuid_table_nr_filled_subleaves(_table, _leaf, _subleaf); \ 332 \ 333 (____f != 1) ? NULL : __cpuid_leaves_subleaf(&((_table)->leaves), _leaf, _subleaf); \ 334 }) 335 336 /* 337 * Return NULL if the CPUID parser did not fill this leaf, or if the given 338 * dynamic subleaf value is out of range. Check cpuid_subleaf_n(). 339 */ 340 #define __cpuid_table_subleaf_n(_table, _leaf, _subleaf) \ 341 ({ \ 342 unsigned int ____i = (_subleaf) - __cpuid_leaf_first_subleaf(_leaf); \ 343 unsigned int ____f = __cpuid_table_nr_filled_subleaves(_table, _leaf, n); \ 344 \ 345 /* CPUID parser might not have filled the entire subleaf range */ \ 346 ((____i >= ____f) || __cpuid_table_invalid_subleaf(_table, _leaf, _subleaf)) ? \ 347 NULL : __cpuid_leaves_subleaf_n(&((_table)->leaves), _leaf, ____i); \ 348 }) 349 350 /* 351 * Compile-time checks for leaves with a subleaf range: 352 */ 353 354 #define __cpuid_assert_subleaf_range(_cpuinfo, _leaf) \ 355 static_assert(__cpuid_table_subleaf_range_size(&(_cpuinfo)->cpuid, _leaf) > 1) 356 357 #define __cpuid_assert_subleaf_within_range(_cpuinfo, _leaf, _subleaf) \ 358 BUILD_BUG_ON(__builtin_constant_p(_subleaf) && \ 359 __cpuid_table_invalid_subleaf(&(_cpuinfo)->cpuid, _leaf, _subleaf)) 360 361 /* 362 * CPUID Parser Call-site APIs 363 * 364 * Call sites should use below APIs instead of invoking direct CPUID queries. 365 * 366 * Benefits include: 367 * 368 * - Return CPUID output as typed C structures that are auto-generated from a 369 * centralized database (see <asm/cpuid/leaf_types.h). Such data types have a 370 * full C99 bitfield layout per CPUID leaf/subleaf combination. Call sites 371 * can thus avoid doing ugly and cryptic bitwise operations on raw CPUID data. 372 * 373 * - Return cached, per-CPU, CPUID output. Below APIs do not invoke any CPUID 374 * queries, thus avoiding their side effects like serialization and VM exits. 375 * Call-site-specific hard coded constants and macros for caching CPUID query 376 * outputs can also be avoided. 377 * 378 * - Return sanitized CPUID data. Below APIs return NULL if the given CPUID 379 * leaf/subleaf input is not supported by hardware, or if the hardware CPUID 380 * output was deemed invalid by the CPUID parser. This centralizes all CPUID 381 * data sanitization in one place (the kernel's CPUID parser.) 382 * 383 * - A centralized global view of system CPUID data. Below APIs will reflect 384 * any kernel-enforced feature masking or overrides, unlike ad hoc parsing of 385 * raw CPUID output by drivers and individual call sites. 386 */ 387 388 /* 389 * Call-site APIs for CPUID leaves with a single subleaf: 390 */ 391 392 /** 393 * cpuid_subleaf() - Access parsed CPUID 394 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 395 * @_leaf: CPUID leaf, in compile-time 0xN format; e.g. 0x7, 0xf 396 * @_subleaf: CPUID subleaf, in compile-time decimal format; e.g. 0, 1, 3 397 * 398 * Returns a pointer to parsed CPUID output, from the CPUID table inside 399 * @_cpuinfo, as a <cpuid/leaf_types.h> data type: 'struct leaf_0xM_N', where 400 * 0xM is the token provided at @_leaf, and N is the token provided at 401 * @_subleaf; e.g. struct leaf_0x7_0. 402 * 403 * Returns NULL if the requested CPUID @_leaf/@_subleaf query output is not 404 * present at the parsed CPUID table inside @_cpuinfo. This can happen if: 405 * 406 * - The CPUID table inside @_cpuinfo has not yet been populated. 407 * - The CPUID table inside @_cpuinfo was populated, but the CPU does not 408 * implement the requested CPUID @_leaf/@_subleaf combination. 409 * - The CPUID table inside @_cpuinfo was populated, but the kernel's CPUID 410 * parser has predetermined that the requested CPUID @_leaf/@_subleaf 411 * hardware output is invalid or unsupported. 412 * 413 * Example usage:: 414 * 415 * const struct leaf_0x7_0 *l7_0 = cpuid_subleaf(c, 0x7, 0); 416 * if (!l7_0) { 417 * // Handle error 418 * } 419 * 420 * const struct leaf_0x7_1 *l7_1 = cpuid_subleaf(c, 0x7, 1); 421 * if (!l7_1) { 422 * // Handle error 423 * } 424 */ 425 #define cpuid_subleaf(_cpuinfo, _leaf, _subleaf) \ 426 __cpuid_table_subleaf(&(_cpuinfo)->cpuid, _leaf, _subleaf) \ 427 428 /** 429 * cpuid_leaf() - Access parsed CPUID data 430 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 431 * @_leaf: CPUID leaf, in compile-time 0xN format; e.g. 0x0, 0x2, 0x80000000 432 * 433 * Similar to cpuid_subleaf(), but with a CPUID subleaf = 0. 434 * 435 * Example usage:: 436 * 437 * const struct leaf_0x0_0 *l0 = cpuid_leaf(c, 0x0); 438 * if (!l0) { 439 * // Handle error 440 * } 441 * 442 * const struct leaf_0x80000000_0 *el0 = cpuid_leaf(c, 0x80000000); 443 * if (!el0) { 444 * // Handle error 445 * } 446 */ 447 #define cpuid_leaf(_cpuinfo, _leaf) \ 448 cpuid_subleaf(_cpuinfo, _leaf, 0) 449 450 /** 451 * cpuid_leaf_raw() - Access parsed CPUID data in raw format 452 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 453 * @_leaf: CPUID leaf, in compile-time 0xN format 454 * 455 * Similar to cpuid_leaf(), but returns a raw 'struct cpuid_regs' pointer to 456 * the parsed CPUID data instead of a "typed" <asm/cpuid/leaf_types.h> pointer. 457 */ 458 #define cpuid_leaf_raw(_cpuinfo, _leaf) \ 459 ((const struct cpuid_regs *)(cpuid_leaf(_cpuinfo, _leaf))) 460 461 /* 462 * Call-site APIs for CPUID leaves with a subleaf range: 463 */ 464 465 /** 466 * cpuid_subleaf_n() - Access parsed CPUID data for leaf with a subleaf range 467 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 468 * @_leaf: CPUID leaf, in compile-time 0xN format; e.g. 0x4, 0x8000001d 469 * @_subleaf: Subleaf number, which can be passed dynamically. It must be smaller 470 * than cpuid_subleaf_count(@_cpuinfo, @_leaf). 471 * 472 * Build-time errors will be emitted in the following cases: 473 * 474 * - @_leaf has no subleaf range. Leaves with a subleaf range have an '_n' type 475 * suffix and are listed at <asm/cpuid/types.h> using the CPUID_LEAF_N() macro. 476 * 477 * - @_subleaf is known at compile-time but is out of range. 478 * 479 * Example usage:: 480 * 481 * const struct leaf_0x4_n *l4; 482 * 483 * for (int i = 0; i < cpuid_subleaf_count(c, 0x4); i++) { 484 * l4 = cpuid_subleaf_n(c, 0x4, i); 485 * if (!l4) { 486 * // Handle error 487 * } 488 * ... 489 * } 490 * 491 * Beside the standard error situations detailed at cpuid_subleaf(), this 492 * macro will also return NULL if @_subleaf is out of the leaf's subleaf range. 493 */ 494 #define cpuid_subleaf_n(_cpuinfo, _leaf, _subleaf) \ 495 ({ \ 496 __cpuid_assert_subleaf_range(_cpuinfo, _leaf); \ 497 __cpuid_assert_subleaf_within_range(_cpuinfo, _leaf, _subleaf); \ 498 __cpuid_table_subleaf_n(&(_cpuinfo)->cpuid, _leaf, _subleaf); \ 499 }) 500 501 /** 502 * cpuid_subleaf_n_raw() - Access parsed CPUID data for leaf with subleaf range 503 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 504 * @_leaf: CPUID leaf, in compile-time 0xN format; e.g. 0x4, 0x8000001d 505 * @_subleaf: Subleaf number, which can be passed dynamically. It must be smaller 506 * than cpuid_subleaf_count(@_cpuinfo, @_leaf). 507 * 508 * Similar to cpuid_subleaf_n(), but returns a raw 'struct cpuid_regs' pointer to 509 * the parsed CPUID data instead of a "typed" <asm/cpuid/leaf_types.h> pointer. 510 */ 511 #define cpuid_subleaf_n_raw(_cpuinfo, _leaf, _subleaf) \ 512 ((const struct cpuid_regs *)cpuid_subleaf_n(_cpuinfo, _leaf, _subleaf)) 513 514 /** 515 * cpuid_subleaf_count() - Number of filled subleaves for @_leaf 516 * @_cpuinfo: CPU capability structure reference ('struct cpuinfo_x86') 517 * @_leaf: CPUID leaf, in compile-time 0xN format; e.g. 0x4, 0x8000001d 518 * 519 * Return the number of subleaves filled by the CPUID parser for @_leaf. 520 * 521 * @_leaf must have subleaf range. Leaves with a subleaf range have an '_n' type 522 * suffix and are listed at <asm/cpuid/types.h> using the CPUID_LEAF_N() macro. 523 */ 524 #define cpuid_subleaf_count(_cpuinfo, _leaf) \ 525 ({ \ 526 __cpuid_assert_subleaf_range(_cpuinfo, _leaf); \ 527 __cpuid_table_nr_filled_subleaves(&(_cpuinfo)->cpuid, _leaf, n); \ 528 }) 529 530 #endif /* _ASM_X86_CPUID_API_H */ 531