1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_CPUFEATURE_H 3 #define _ASM_X86_CPUFEATURE_H 4 5 #include <asm/processor.h> 6 7 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) 8 9 #include <asm/asm.h> 10 #include <linux/bitops.h> 11 #include <asm/alternative.h> 12 13 enum cpuid_leafs 14 { 15 CPUID_1_EDX = 0, 16 CPUID_8000_0001_EDX, 17 CPUID_8086_0001_EDX, 18 CPUID_LNX_1, 19 CPUID_1_ECX, 20 CPUID_C000_0001_EDX, 21 CPUID_8000_0001_ECX, 22 CPUID_LNX_2, 23 CPUID_LNX_3, 24 CPUID_7_0_EBX, 25 CPUID_D_1_EAX, 26 CPUID_LNX_4, 27 CPUID_7_1_EAX, 28 CPUID_8000_0008_EBX, 29 CPUID_6_EAX, 30 CPUID_8000_000A_EDX, 31 CPUID_7_ECX, 32 CPUID_8000_0007_EBX, 33 CPUID_7_EDX, 34 CPUID_8000_001F_EAX, 35 CPUID_8000_0021_EAX, 36 CPUID_LNX_5, 37 NR_CPUID_WORDS, 38 }; 39 40 #define X86_CAP_FMT_NUM "%d:%d" 41 #define x86_cap_flag_num(flag) ((flag) >> 5), ((flag) & 31) 42 43 extern const char * const x86_cap_flags[NCAPINTS*32]; 44 extern const char * const x86_power_flags[32]; 45 #define X86_CAP_FMT "%s" 46 #define x86_cap_flag(flag) x86_cap_flags[flag] 47 48 /* 49 * In order to save room, we index into this array by doing 50 * X86_BUG_<name> - NCAPINTS*32. 51 */ 52 extern const char * const x86_bug_flags[NBUGINTS*32]; 53 54 #define test_cpu_cap(c, bit) \ 55 arch_test_bit(bit, (unsigned long *)((c)->x86_capability)) 56 57 /* 58 * There are 32 bits/features in each mask word. The high bits 59 * (selected with (bit>>5) give us the word number and the low 5 60 * bits give us the bit/feature number inside the word. 61 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can 62 * see if it is set in the mask word. 63 */ 64 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \ 65 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word )) 66 67 /* 68 * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the 69 * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all 70 * header macros which use NCAPINTS need to be changed. The duplicated macro 71 * use causes the compiler to issue errors for all headers so that all usage 72 * sites can be corrected. 73 */ 74 #define REQUIRED_MASK_BIT_SET(feature_bit) \ 75 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \ 76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \ 77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \ 78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \ 79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \ 80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \ 81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \ 82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \ 83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \ 84 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \ 85 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \ 86 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \ 87 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \ 88 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \ 89 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \ 90 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \ 91 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \ 92 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \ 93 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \ 94 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \ 95 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \ 96 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \ 97 REQUIRED_MASK_CHECK || \ 98 BUILD_BUG_ON_ZERO(NCAPINTS != 22)) 99 100 #define DISABLED_MASK_BIT_SET(feature_bit) \ 101 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \ 102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \ 103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \ 104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \ 105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \ 106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \ 107 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \ 108 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \ 109 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \ 110 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \ 111 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \ 112 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \ 113 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \ 114 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \ 115 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \ 116 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \ 117 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \ 118 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \ 119 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \ 120 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \ 121 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \ 122 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \ 123 DISABLED_MASK_CHECK || \ 124 BUILD_BUG_ON_ZERO(NCAPINTS != 22)) 125 126 #define cpu_has(c, bit) \ 127 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 128 test_cpu_cap(c, bit)) 129 130 #define this_cpu_has(bit) \ 131 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 132 x86_this_cpu_test_bit(bit, cpu_info.x86_capability)) 133 134 /* 135 * This macro is for detection of features which need kernel 136 * infrastructure to be used. It may *not* directly test the CPU 137 * itself. Use the cpu_has() family if you want true runtime 138 * testing of CPU features, like in hypervisor code where you are 139 * supporting a possible guest feature where host support for it 140 * is not relevant. 141 */ 142 #define cpu_feature_enabled(bit) \ 143 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) 144 145 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) 146 147 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability)) 148 149 extern void setup_clear_cpu_cap(unsigned int bit); 150 extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit); 151 152 #define setup_force_cpu_cap(bit) do { \ 153 \ 154 if (!boot_cpu_has(bit)) \ 155 WARN_ON(alternatives_patched); \ 156 \ 157 set_cpu_cap(&boot_cpu_data, bit); \ 158 set_bit(bit, (unsigned long *)cpu_caps_set); \ 159 } while (0) 160 161 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) 162 163 /* 164 * Static testing of CPU features. Used the same as boot_cpu_has(). It 165 * statically patches the target code for additional performance. Use 166 * static_cpu_has() only in fast paths, where every cycle counts. Which 167 * means that the boot_cpu_has() variant is already fast enough for the 168 * majority of cases and you should stick to using it as it is generally 169 * only two instructions: a RIP-relative MOV and a TEST. 170 * 171 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know 172 * that this is only used on a fallback path and will sometimes cause 173 * it to manifest the address of boot_cpu_data in a register, fouling 174 * the mainline (post-initialization) code. 175 */ 176 static __always_inline bool _static_cpu_has(u16 bit) 177 { 178 asm goto(ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]") 179 ".pushsection .altinstr_aux,\"ax\"\n" 180 "6:\n" 181 " testb %[bitnum], %a[cap_byte]\n" 182 " jnz %l[t_yes]\n" 183 " jmp %l[t_no]\n" 184 ".popsection\n" 185 : : [feature] "i" (bit), 186 [bitnum] "i" (1 << (bit & 7)), 187 [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3]) 188 : : t_yes, t_no); 189 t_yes: 190 return true; 191 t_no: 192 return false; 193 } 194 195 #define static_cpu_has(bit) \ 196 ( \ 197 __builtin_constant_p(boot_cpu_has(bit)) ? \ 198 boot_cpu_has(bit) : \ 199 _static_cpu_has(bit) \ 200 ) 201 202 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) 203 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) 204 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) 205 206 #define static_cpu_has_bug(bit) static_cpu_has((bit)) 207 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) 208 #define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit)) 209 210 #define MAX_CPU_FEATURES (NCAPINTS * 32) 211 #define cpu_have_feature boot_cpu_has 212 213 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X" 214 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ 215 boot_cpu_data.x86_model 216 217 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ 218 #endif /* _ASM_X86_CPUFEATURE_H */ 219