1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 21965aae3SH. Peter Anvin #ifndef _ASM_X86_CACHEFLUSH_H 31965aae3SH. Peter Anvin #define _ASM_X86_CACHEFLUSH_H 4bb898558SAl Viro 5*e0cf615dSChristoph Hellwig #include <linux/mm.h> 6*e0cf615dSChristoph Hellwig 7bb898558SAl Viro /* Caches aren't brain-dead on the intel. */ 8cc67ba63SAkinobu Mita #include <asm-generic/cacheflush.h> 9f05e798aSDavid Howells #include <asm/special_insns.h> 10bb898558SAl Viro 11bb898558SAl Viro void clflush_cache_range(void *addr, unsigned int size); 12bb898558SAl Viro 131965aae3SH. Peter Anvin #endif /* _ASM_X86_CACHEFLUSH_H */ 14