1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef _ASM_X86_APIC_H 3 #define _ASM_X86_APIC_H 4 5 #include <linux/cpumask.h> 6 #include <linux/static_call.h> 7 8 #include <asm/alternative.h> 9 #include <asm/cpufeature.h> 10 #include <asm/apicdef.h> 11 #include <linux/atomic.h> 12 #include <asm/fixmap.h> 13 #include <asm/mpspec.h> 14 #include <asm/msr.h> 15 #include <asm/hardirq.h> 16 #include <asm/io.h> 17 18 #define ARCH_APICTIMER_STOPS_ON_C3 1 19 20 /* 21 * Debugging macros 22 */ 23 #define APIC_QUIET 0 24 #define APIC_VERBOSE 1 25 #define APIC_DEBUG 2 26 27 /* Macros for apic_extnmi which controls external NMI masking */ 28 #define APIC_EXTNMI_BSP 0 /* Default */ 29 #define APIC_EXTNMI_ALL 1 30 #define APIC_EXTNMI_NONE 2 31 32 /* 33 * Define the default level of output to be very little 34 * This can be turned up by using apic=verbose for more 35 * information and apic=debug for _lots_ of information. 36 * apic_verbosity is defined in apic.c 37 */ 38 #define apic_printk(v, s, a...) do { \ 39 if ((v) <= apic_verbosity) \ 40 printk(s, ##a); \ 41 } while (0) 42 43 44 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 45 extern void x86_32_probe_apic(void); 46 #else 47 static inline void x86_32_probe_apic(void) { } 48 #endif 49 50 extern u32 cpuid_to_apicid[]; 51 52 #define CPU_ACPIID_INVALID U32_MAX 53 54 #ifdef CONFIG_X86_LOCAL_APIC 55 56 extern int apic_verbosity; 57 extern int local_apic_timer_c2_ok; 58 59 extern bool apic_is_disabled; 60 extern unsigned int lapic_timer_period; 61 62 extern enum apic_intr_mode_id apic_intr_mode; 63 enum apic_intr_mode_id { 64 APIC_PIC, 65 APIC_VIRTUAL_WIRE, 66 APIC_VIRTUAL_WIRE_NO_CONFIG, 67 APIC_SYMMETRIC_IO, 68 APIC_SYMMETRIC_IO_NO_ROUTING 69 }; 70 71 /* 72 * With 82489DX we can't rely on apic feature bit 73 * retrieved via cpuid but still have to deal with 74 * such an apic chip so we assume that SMP configuration 75 * is found from MP table (64bit case uses ACPI mostly 76 * which set smp presence flag as well so we are safe 77 * to use this helper too). 78 */ 79 static inline bool apic_from_smp_config(void) 80 { 81 return smp_found_config && !apic_is_disabled; 82 } 83 84 /* 85 * Basic functions accessing APICs. 86 */ 87 #ifdef CONFIG_PARAVIRT 88 #include <asm/paravirt.h> 89 #endif 90 91 static inline void native_apic_mem_write(u32 reg, u32 v) 92 { 93 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 94 95 alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, 96 ASM_OUTPUT2("=r" (v), "=m" (*addr)), 97 ASM_OUTPUT2("0" (v), "m" (*addr))); 98 } 99 100 static inline u32 native_apic_mem_read(u32 reg) 101 { 102 return readl((void __iomem *)(APIC_BASE + reg)); 103 } 104 105 static inline void native_apic_mem_eoi(void) 106 { 107 native_apic_mem_write(APIC_EOI, APIC_EOI_ACK); 108 } 109 110 extern void native_apic_icr_write(u32 low, u32 id); 111 extern u64 native_apic_icr_read(void); 112 113 static inline bool apic_is_x2apic_enabled(void) 114 { 115 u64 msr; 116 117 if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) 118 return false; 119 return msr & X2APIC_ENABLE; 120 } 121 122 extern void enable_IR_x2apic(void); 123 124 extern int get_physical_broadcast(void); 125 126 extern int lapic_get_maxlvt(void); 127 extern void clear_local_APIC(void); 128 extern void disconnect_bsp_APIC(int virt_wire_setup); 129 extern void disable_local_APIC(void); 130 extern void apic_soft_disable(void); 131 extern void lapic_shutdown(void); 132 extern void sync_Arb_IDs(void); 133 extern void init_bsp_APIC(void); 134 extern void apic_intr_mode_select(void); 135 extern void apic_intr_mode_init(void); 136 extern void init_apic_mappings(void); 137 void register_lapic_address(unsigned long address); 138 extern void setup_boot_APIC_clock(void); 139 extern void setup_secondary_APIC_clock(void); 140 extern void lapic_update_tsc_freq(void); 141 142 #ifdef CONFIG_X86_64 143 static inline bool apic_force_enable(unsigned long addr) 144 { 145 return false; 146 } 147 #else 148 extern bool apic_force_enable(unsigned long addr); 149 #endif 150 151 extern void apic_ap_setup(void); 152 153 /* 154 * On 32bit this is mach-xxx local 155 */ 156 #ifdef CONFIG_X86_64 157 extern int apic_is_clustered_box(void); 158 #else 159 static inline int apic_is_clustered_box(void) 160 { 161 return 0; 162 } 163 #endif 164 165 extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); 166 extern void lapic_assign_system_vectors(void); 167 extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace); 168 extern void lapic_update_legacy_vectors(void); 169 extern void lapic_online(void); 170 extern void lapic_offline(void); 171 extern bool apic_needs_pit(void); 172 173 extern void apic_send_IPI_allbutself(unsigned int vector); 174 175 extern void topology_register_apic(u32 apic_id, u32 acpi_id, bool present); 176 extern void topology_register_boot_apic(u32 apic_id); 177 extern int topology_hotplug_apic(u32 apic_id, u32 acpi_id); 178 extern void topology_hotunplug_apic(unsigned int cpu); 179 extern void topology_apply_cmdline_limits_early(void); 180 extern void topology_init_possible_cpus(void); 181 extern void topology_reset_possible_cpus_up(void); 182 183 #else /* !CONFIG_X86_LOCAL_APIC */ 184 static inline void lapic_shutdown(void) { } 185 #define local_apic_timer_c2_ok 1 186 static inline void init_apic_mappings(void) { } 187 static inline void disable_local_APIC(void) { } 188 # define setup_boot_APIC_clock x86_init_noop 189 # define setup_secondary_APIC_clock x86_init_noop 190 static inline void lapic_update_tsc_freq(void) { } 191 static inline void init_bsp_APIC(void) { } 192 static inline void apic_intr_mode_select(void) { } 193 static inline void apic_intr_mode_init(void) { } 194 static inline void lapic_assign_system_vectors(void) { } 195 static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { } 196 static inline bool apic_needs_pit(void) { return true; } 197 static inline void topology_apply_cmdline_limits_early(void) { } 198 static inline void topology_init_possible_cpus(void) { } 199 #endif /* !CONFIG_X86_LOCAL_APIC */ 200 201 #ifdef CONFIG_X86_X2APIC 202 static inline void native_apic_msr_write(u32 reg, u32 v) 203 { 204 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 205 reg == APIC_LVR) 206 return; 207 208 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 209 } 210 211 static inline void native_apic_msr_eoi(void) 212 { 213 __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); 214 } 215 216 static inline u32 native_apic_msr_read(u32 reg) 217 { 218 u64 msr; 219 220 if (reg == APIC_DFR) 221 return -1; 222 223 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); 224 return (u32)msr; 225 } 226 227 static inline void native_x2apic_icr_write(u32 low, u32 id) 228 { 229 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); 230 } 231 232 static inline u64 native_x2apic_icr_read(void) 233 { 234 unsigned long val; 235 236 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); 237 return val; 238 } 239 240 extern int x2apic_mode; 241 extern int x2apic_phys; 242 extern void __init x2apic_set_max_apicid(u32 apicid); 243 extern void x2apic_setup(void); 244 static inline int x2apic_enabled(void) 245 { 246 return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled(); 247 } 248 249 #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC)) 250 #else /* !CONFIG_X86_X2APIC */ 251 static inline void x2apic_setup(void) { } 252 static inline int x2apic_enabled(void) { return 0; } 253 static inline u32 native_apic_msr_read(u32 reg) { BUG(); } 254 #define x2apic_mode (0) 255 #define x2apic_supported() (0) 256 #endif /* !CONFIG_X86_X2APIC */ 257 extern void __init check_x2apic(void); 258 259 struct irq_data; 260 261 /* 262 * Copyright 2004 James Cleverdon, IBM. 263 * 264 * Generic APIC sub-arch data struct. 265 * 266 * Hacked for x86-64 by James Cleverdon from i386 architecture code by 267 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and 268 * James Cleverdon. 269 */ 270 struct apic { 271 /* Hotpath functions first */ 272 void (*eoi)(void); 273 void (*native_eoi)(void); 274 void (*write)(u32 reg, u32 v); 275 u32 (*read)(u32 reg); 276 277 /* IPI related functions */ 278 void (*wait_icr_idle)(void); 279 u32 (*safe_wait_icr_idle)(void); 280 281 void (*send_IPI)(int cpu, int vector); 282 void (*send_IPI_mask)(const struct cpumask *mask, int vector); 283 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 284 void (*send_IPI_allbutself)(int vector); 285 void (*send_IPI_all)(int vector); 286 void (*send_IPI_self)(int vector); 287 288 u32 disable_esr : 1, 289 dest_mode_logical : 1, 290 x2apic_set_max_apicid : 1, 291 nmi_to_offline_cpu : 1; 292 293 u32 (*calc_dest_apicid)(unsigned int cpu); 294 295 /* ICR related functions */ 296 u64 (*icr_read)(void); 297 void (*icr_write)(u32 low, u32 high); 298 299 /* The limit of the APIC ID space. */ 300 u32 max_apic_id; 301 302 /* Probe, setup and smpboot functions */ 303 int (*probe)(void); 304 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); 305 306 void (*init_apic_ldr)(void); 307 u32 (*cpu_present_to_apicid)(int mps_cpu); 308 309 u32 (*get_apic_id)(u32 id); 310 311 /* wakeup_secondary_cpu */ 312 int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip); 313 /* wakeup secondary CPU using 64-bit wakeup point */ 314 int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip); 315 316 char *name; 317 }; 318 319 struct apic_override { 320 void (*eoi)(void); 321 void (*native_eoi)(void); 322 void (*write)(u32 reg, u32 v); 323 u32 (*read)(u32 reg); 324 void (*send_IPI)(int cpu, int vector); 325 void (*send_IPI_mask)(const struct cpumask *mask, int vector); 326 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec); 327 void (*send_IPI_allbutself)(int vector); 328 void (*send_IPI_all)(int vector); 329 void (*send_IPI_self)(int vector); 330 u64 (*icr_read)(void); 331 void (*icr_write)(u32 low, u32 high); 332 int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip); 333 int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip); 334 }; 335 336 /* 337 * Pointer to the local APIC driver in use on this system (there's 338 * always just one such driver in use - the kernel decides via an 339 * early probing process which one it picks - and then sticks to it): 340 */ 341 extern struct apic *apic; 342 343 /* 344 * APIC drivers are probed based on how they are listed in the .apicdrivers 345 * section. So the order is important and enforced by the ordering 346 * of different apic driver files in the Makefile. 347 * 348 * For the files having two apic drivers, we use apic_drivers() 349 * to enforce the order with in them. 350 */ 351 #define apic_driver(sym) \ 352 static const struct apic *__apicdrivers_##sym __used \ 353 __aligned(sizeof(struct apic *)) \ 354 __section(".apicdrivers") = { &sym } 355 356 #define apic_drivers(sym1, sym2) \ 357 static struct apic *__apicdrivers_##sym1##sym2[2] __used \ 358 __aligned(sizeof(struct apic *)) \ 359 __section(".apicdrivers") = { &sym1, &sym2 } 360 361 extern struct apic *__apicdrivers[], *__apicdrivers_end[]; 362 363 /* 364 * APIC functionality to boot other CPUs - only used on SMP: 365 */ 366 #ifdef CONFIG_SMP 367 extern int lapic_can_unplug_cpu(void); 368 #endif 369 370 #ifdef CONFIG_X86_LOCAL_APIC 371 extern struct apic_override __x86_apic_override; 372 373 void __init apic_setup_apic_calls(void); 374 void __init apic_install_driver(struct apic *driver); 375 376 #define apic_update_callback(_callback, _fn) { \ 377 __x86_apic_override._callback = _fn; \ 378 apic->_callback = _fn; \ 379 static_call_update(apic_call_##_callback, _fn); \ 380 pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \ 381 } 382 383 #define DECLARE_APIC_CALL(__cb) \ 384 DECLARE_STATIC_CALL(apic_call_##__cb, *apic->__cb) 385 386 DECLARE_APIC_CALL(eoi); 387 DECLARE_APIC_CALL(native_eoi); 388 DECLARE_APIC_CALL(icr_read); 389 DECLARE_APIC_CALL(icr_write); 390 DECLARE_APIC_CALL(read); 391 DECLARE_APIC_CALL(send_IPI); 392 DECLARE_APIC_CALL(send_IPI_mask); 393 DECLARE_APIC_CALL(send_IPI_mask_allbutself); 394 DECLARE_APIC_CALL(send_IPI_allbutself); 395 DECLARE_APIC_CALL(send_IPI_all); 396 DECLARE_APIC_CALL(send_IPI_self); 397 DECLARE_APIC_CALL(wait_icr_idle); 398 DECLARE_APIC_CALL(wakeup_secondary_cpu); 399 DECLARE_APIC_CALL(wakeup_secondary_cpu_64); 400 DECLARE_APIC_CALL(write); 401 402 static __always_inline u32 apic_read(u32 reg) 403 { 404 return static_call(apic_call_read)(reg); 405 } 406 407 static __always_inline void apic_write(u32 reg, u32 val) 408 { 409 static_call(apic_call_write)(reg, val); 410 } 411 412 static __always_inline void apic_eoi(void) 413 { 414 static_call(apic_call_eoi)(); 415 } 416 417 static __always_inline void apic_native_eoi(void) 418 { 419 static_call(apic_call_native_eoi)(); 420 } 421 422 static __always_inline u64 apic_icr_read(void) 423 { 424 return static_call(apic_call_icr_read)(); 425 } 426 427 static __always_inline void apic_icr_write(u32 low, u32 high) 428 { 429 static_call(apic_call_icr_write)(low, high); 430 } 431 432 static __always_inline void __apic_send_IPI(int cpu, int vector) 433 { 434 static_call(apic_call_send_IPI)(cpu, vector); 435 } 436 437 static __always_inline void __apic_send_IPI_mask(const struct cpumask *mask, int vector) 438 { 439 static_call_mod(apic_call_send_IPI_mask)(mask, vector); 440 } 441 442 static __always_inline void __apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 443 { 444 static_call(apic_call_send_IPI_mask_allbutself)(mask, vector); 445 } 446 447 static __always_inline void __apic_send_IPI_allbutself(int vector) 448 { 449 static_call(apic_call_send_IPI_allbutself)(vector); 450 } 451 452 static __always_inline void __apic_send_IPI_all(int vector) 453 { 454 static_call(apic_call_send_IPI_all)(vector); 455 } 456 457 static __always_inline void __apic_send_IPI_self(int vector) 458 { 459 static_call_mod(apic_call_send_IPI_self)(vector); 460 } 461 462 static __always_inline void apic_wait_icr_idle(void) 463 { 464 static_call_cond(apic_call_wait_icr_idle)(); 465 } 466 467 static __always_inline u32 safe_apic_wait_icr_idle(void) 468 { 469 return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0; 470 } 471 472 static __always_inline bool apic_id_valid(u32 apic_id) 473 { 474 return apic_id <= apic->max_apic_id; 475 } 476 477 #else /* CONFIG_X86_LOCAL_APIC */ 478 479 static inline u32 apic_read(u32 reg) { return 0; } 480 static inline void apic_write(u32 reg, u32 val) { } 481 static inline void apic_eoi(void) { } 482 static inline u64 apic_icr_read(void) { return 0; } 483 static inline void apic_icr_write(u32 low, u32 high) { } 484 static inline void apic_wait_icr_idle(void) { } 485 static inline u32 safe_apic_wait_icr_idle(void) { return 0; } 486 static inline void apic_set_eoi_cb(void (*eoi)(void)) {} 487 static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); } 488 static inline void apic_setup_apic_calls(void) { } 489 490 #define apic_update_callback(_callback, _fn) do { } while (0) 491 492 #endif /* CONFIG_X86_LOCAL_APIC */ 493 494 extern void apic_ack_irq(struct irq_data *data); 495 496 static inline bool lapic_vector_set_in_irr(unsigned int vector) 497 { 498 u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10)); 499 500 return !!(irr & (1U << (vector % 32))); 501 } 502 503 /* 504 * Warm reset vector position: 505 */ 506 #define TRAMPOLINE_PHYS_LOW 0x467 507 #define TRAMPOLINE_PHYS_HIGH 0x469 508 509 extern void generic_bigsmp_probe(void); 510 511 #ifdef CONFIG_X86_LOCAL_APIC 512 513 #include <asm/smp.h> 514 515 extern struct apic apic_noop; 516 517 static inline u32 read_apic_id(void) 518 { 519 u32 reg = apic_read(APIC_ID); 520 521 return apic->get_apic_id(reg); 522 } 523 524 #ifdef CONFIG_X86_64 525 typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); 526 extern int default_acpi_madt_oem_check(char *, char *); 527 extern void x86_64_probe_apic(void); 528 #else 529 static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; } 530 static inline void x86_64_probe_apic(void) { } 531 #endif 532 533 extern int default_apic_id_valid(u32 apicid); 534 535 extern u32 apic_default_calc_apicid(unsigned int cpu); 536 extern u32 apic_flat_calc_apicid(unsigned int cpu); 537 538 extern u32 default_cpu_present_to_apicid(int mps_cpu); 539 540 void apic_send_nmi_to_offline_cpu(unsigned int cpu); 541 542 #else /* CONFIG_X86_LOCAL_APIC */ 543 544 static inline u32 read_apic_id(void) { return 0; } 545 546 #endif /* !CONFIG_X86_LOCAL_APIC */ 547 548 #ifdef CONFIG_SMP 549 void apic_smt_update(void); 550 #else 551 static inline void apic_smt_update(void) { } 552 #endif 553 554 struct msi_msg; 555 struct irq_cfg; 556 557 extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg, 558 bool dmar); 559 560 extern void ioapic_zap_locks(void); 561 562 #endif /* _ASM_X86_APIC_H */ 563