1bcbb6555SIngo Molnar /* SPDX-License-Identifier: GPL-2.0 */ 2bcbb6555SIngo Molnar #ifndef _ASM_X86_AMD_NB_H 3bcbb6555SIngo Molnar #define _ASM_X86_AMD_NB_H 4bcbb6555SIngo Molnar 5bcbb6555SIngo Molnar #include <linux/ioport.h> 6bcbb6555SIngo Molnar #include <linux/pci.h> 7*0a35c928SIngo Molnar #include <asm/amd/node.h> 8bcbb6555SIngo Molnar 9bcbb6555SIngo Molnar struct amd_nb_bus_dev_range { 10bcbb6555SIngo Molnar u8 bus; 11bcbb6555SIngo Molnar u8 dev_base; 12bcbb6555SIngo Molnar u8 dev_limit; 13bcbb6555SIngo Molnar }; 14bcbb6555SIngo Molnar 15bcbb6555SIngo Molnar extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[]; 16bcbb6555SIngo Molnar 17bcbb6555SIngo Molnar extern bool early_is_amd_nb(u32 value); 18bcbb6555SIngo Molnar extern struct resource *amd_get_mmconfig_range(struct resource *res); 19bcbb6555SIngo Molnar extern void amd_flush_garts(void); 20bcbb6555SIngo Molnar extern int amd_numa_init(void); 21bcbb6555SIngo Molnar extern int amd_get_subcaches(int); 22bcbb6555SIngo Molnar extern int amd_set_subcaches(int, unsigned long); 23bcbb6555SIngo Molnar 24bcbb6555SIngo Molnar struct amd_l3_cache { 25bcbb6555SIngo Molnar unsigned indices; 26bcbb6555SIngo Molnar u8 subcaches[4]; 27bcbb6555SIngo Molnar }; 28bcbb6555SIngo Molnar 29bcbb6555SIngo Molnar struct amd_northbridge { 30bcbb6555SIngo Molnar struct pci_dev *misc; 31bcbb6555SIngo Molnar struct pci_dev *link; 32bcbb6555SIngo Molnar struct amd_l3_cache l3_cache; 33bcbb6555SIngo Molnar }; 34bcbb6555SIngo Molnar 35bcbb6555SIngo Molnar struct amd_northbridge_info { 36bcbb6555SIngo Molnar u16 num; 37bcbb6555SIngo Molnar u64 flags; 38bcbb6555SIngo Molnar struct amd_northbridge *nb; 39bcbb6555SIngo Molnar }; 40bcbb6555SIngo Molnar 41bcbb6555SIngo Molnar #define AMD_NB_GART BIT(0) 42bcbb6555SIngo Molnar #define AMD_NB_L3_INDEX_DISABLE BIT(1) 43bcbb6555SIngo Molnar #define AMD_NB_L3_PARTITIONING BIT(2) 44bcbb6555SIngo Molnar 45bcbb6555SIngo Molnar #ifdef CONFIG_AMD_NB 46bcbb6555SIngo Molnar 47bcbb6555SIngo Molnar u16 amd_nb_num(void); 48bcbb6555SIngo Molnar bool amd_nb_has_feature(unsigned int feature); 49bcbb6555SIngo Molnar struct amd_northbridge *node_to_amd_nb(int node); 50bcbb6555SIngo Molnar 51bcbb6555SIngo Molnar static inline bool amd_gart_present(void) 52bcbb6555SIngo Molnar { 53bcbb6555SIngo Molnar if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) 54bcbb6555SIngo Molnar return false; 55bcbb6555SIngo Molnar 56bcbb6555SIngo Molnar /* GART present only on Fam15h, up to model 0fh */ 57bcbb6555SIngo Molnar if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 || 58bcbb6555SIngo Molnar (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10)) 59bcbb6555SIngo Molnar return true; 60bcbb6555SIngo Molnar 61bcbb6555SIngo Molnar return false; 62bcbb6555SIngo Molnar } 63bcbb6555SIngo Molnar 64bcbb6555SIngo Molnar #else 65bcbb6555SIngo Molnar 66bcbb6555SIngo Molnar #define amd_nb_num(x) 0 67bcbb6555SIngo Molnar #define amd_nb_has_feature(x) false 68bcbb6555SIngo Molnar static inline struct amd_northbridge *node_to_amd_nb(int node) 69bcbb6555SIngo Molnar { 70bcbb6555SIngo Molnar return NULL; 71bcbb6555SIngo Molnar } 72bcbb6555SIngo Molnar #define amd_gart_present(x) false 73bcbb6555SIngo Molnar 74bcbb6555SIngo Molnar #endif 75bcbb6555SIngo Molnar 76bcbb6555SIngo Molnar 77bcbb6555SIngo Molnar #endif /* _ASM_X86_AMD_NB_H */ 78