1 #ifndef _ASM_X86_ALTERNATIVE_H 2 #define _ASM_X86_ALTERNATIVE_H 3 4 #include <linux/types.h> 5 #include <linux/stddef.h> 6 #include <linux/stringify.h> 7 #include <asm/asm.h> 8 9 /* 10 * Alternative inline assembly for SMP. 11 * 12 * The LOCK_PREFIX macro defined here replaces the LOCK and 13 * LOCK_PREFIX macros used everywhere in the source tree. 14 * 15 * SMP alternatives use the same data structures as the other 16 * alternatives and the X86_FEATURE_UP flag to indicate the case of a 17 * UP system running a SMP kernel. The existing apply_alternatives() 18 * works fine for patching a SMP kernel for UP. 19 * 20 * The SMP alternative tables can be kept after boot and contain both 21 * UP and SMP versions of the instructions to allow switching back to 22 * SMP at runtime, when hotplugging in a new CPU, which is especially 23 * useful in virtualized environments. 24 * 25 * The very common lock prefix is handled as special case in a 26 * separate table which is a pure address list without replacement ptr 27 * and size information. That keeps the table sizes small. 28 */ 29 30 #ifdef CONFIG_SMP 31 #define LOCK_PREFIX_HERE \ 32 ".section .smp_locks,\"a\"\n" \ 33 ".balign 4\n" \ 34 ".long 671f - .\n" /* offset */ \ 35 ".previous\n" \ 36 "671:" 37 38 #define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; " 39 40 #else /* ! CONFIG_SMP */ 41 #define LOCK_PREFIX_HERE "" 42 #define LOCK_PREFIX "" 43 #endif 44 45 struct alt_instr { 46 u8 *instr; /* original instruction */ 47 u8 *replacement; 48 u8 cpuid; /* cpuid bit set for replacement */ 49 u8 instrlen; /* length of original instruction */ 50 u8 replacementlen; /* length of new instruction, <= instrlen */ 51 u8 pad1; 52 #ifdef CONFIG_X86_64 53 u32 pad2; 54 #endif 55 }; 56 57 extern void alternative_instructions(void); 58 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end); 59 60 struct module; 61 62 #ifdef CONFIG_SMP 63 extern void alternatives_smp_module_add(struct module *mod, char *name, 64 void *locks, void *locks_end, 65 void *text, void *text_end); 66 extern void alternatives_smp_module_del(struct module *mod); 67 extern void alternatives_smp_switch(int smp); 68 extern int alternatives_text_reserved(void *start, void *end); 69 #else 70 static inline void alternatives_smp_module_add(struct module *mod, char *name, 71 void *locks, void *locks_end, 72 void *text, void *text_end) {} 73 static inline void alternatives_smp_module_del(struct module *mod) {} 74 static inline void alternatives_smp_switch(int smp) {} 75 static inline int alternatives_text_reserved(void *start, void *end) 76 { 77 return 0; 78 } 79 #endif /* CONFIG_SMP */ 80 81 /* alternative assembly primitive: */ 82 #define ALTERNATIVE(oldinstr, newinstr, feature) \ 83 \ 84 "661:\n\t" oldinstr "\n662:\n" \ 85 ".section .altinstructions,\"a\"\n" \ 86 _ASM_ALIGN "\n" \ 87 _ASM_PTR "661b\n" /* label */ \ 88 _ASM_PTR "663f\n" /* new instruction */ \ 89 " .byte " __stringify(feature) "\n" /* feature bit */ \ 90 " .byte 662b-661b\n" /* sourcelen */ \ 91 " .byte 664f-663f\n" /* replacementlen */ \ 92 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \ 93 ".previous\n" \ 94 ".section .altinstr_replacement, \"ax\"\n" \ 95 "663:\n\t" newinstr "\n664:\n" /* replacement */ \ 96 ".previous" 97 98 /* 99 * This must be included *after* the definition of ALTERNATIVE due to 100 * <asm/arch_hweight.h> 101 */ 102 #include <asm/cpufeature.h> 103 104 /* 105 * Alternative instructions for different CPU types or capabilities. 106 * 107 * This allows to use optimized instructions even on generic binary 108 * kernels. 109 * 110 * length of oldinstr must be longer or equal the length of newinstr 111 * It can be padded with nops as needed. 112 * 113 * For non barrier like inlines please define new variants 114 * without volatile and memory clobber. 115 */ 116 #define alternative(oldinstr, newinstr, feature) \ 117 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory") 118 119 /* 120 * Alternative inline assembly with input. 121 * 122 * Pecularities: 123 * No memory clobber here. 124 * Argument numbers start with 1. 125 * Best is to use constraints that are fixed size (like (%1) ... "r") 126 * If you use variable sized constraints like "m" or "g" in the 127 * replacement make sure to pad to the worst case length. 128 * Leaving an unused argument 0 to keep API compatibility. 129 */ 130 #define alternative_input(oldinstr, newinstr, feature, input...) \ 131 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 132 : : "i" (0), ## input) 133 134 /* Like alternative_input, but with a single output argument */ 135 #define alternative_io(oldinstr, newinstr, feature, output, input...) \ 136 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 137 : output : "i" (0), ## input) 138 139 /* Like alternative_io, but for replacing a direct call with another one. */ 140 #define alternative_call(oldfunc, newfunc, feature, output, input...) \ 141 asm volatile (ALTERNATIVE("call %P[old]", "call %P[new]", feature) \ 142 : output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input) 143 144 /* 145 * use this macro(s) if you need more than one output parameter 146 * in alternative_io 147 */ 148 #define ASM_OUTPUT2(a...) a 149 150 struct paravirt_patch_site; 151 #ifdef CONFIG_PARAVIRT 152 void apply_paravirt(struct paravirt_patch_site *start, 153 struct paravirt_patch_site *end); 154 #else 155 static inline void apply_paravirt(struct paravirt_patch_site *start, 156 struct paravirt_patch_site *end) 157 {} 158 #define __parainstructions NULL 159 #define __parainstructions_end NULL 160 #endif 161 162 /* 163 * Clear and restore the kernel write-protection flag on the local CPU. 164 * Allows the kernel to edit read-only pages. 165 * Side-effect: any interrupt handler running between save and restore will have 166 * the ability to write to read-only pages. 167 * 168 * Warning: 169 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and 170 * no thread can be preempted in the instructions being modified (no iret to an 171 * invalid instruction possible) or if the instructions are changed from a 172 * consistent state to another consistent state atomically. 173 * More care must be taken when modifying code in the SMP case because of 174 * Intel's errata. text_poke_smp() takes care that errata, but still 175 * doesn't support NMI/MCE handler code modifying. 176 * On the local CPU you need to be protected again NMI or MCE handlers seeing an 177 * inconsistent instruction while you patch. 178 */ 179 extern void *text_poke(void *addr, const void *opcode, size_t len); 180 extern void *text_poke_smp(void *addr, const void *opcode, size_t len); 181 182 #endif /* _ASM_X86_ALTERNATIVE_H */ 183