1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * X86 specific Hyper-V initialization code. 4 * 5 * Copyright (C) 2016, Microsoft, Inc. 6 * 7 * Author : K. Y. Srinivasan <kys@microsoft.com> 8 */ 9 10 #define pr_fmt(fmt) "Hyper-V: " fmt 11 12 #include <linux/efi.h> 13 #include <linux/types.h> 14 #include <linux/bitfield.h> 15 #include <linux/io.h> 16 #include <asm/apic.h> 17 #include <asm/desc.h> 18 #include <asm/e820/api.h> 19 #include <asm/sev.h> 20 #include <asm/ibt.h> 21 #include <asm/hypervisor.h> 22 #include <hyperv/hvhdk.h> 23 #include <asm/mshyperv.h> 24 #include <asm/idtentry.h> 25 #include <asm/set_memory.h> 26 #include <linux/kexec.h> 27 #include <linux/version.h> 28 #include <linux/vmalloc.h> 29 #include <linux/mm.h> 30 #include <linux/slab.h> 31 #include <linux/kernel.h> 32 #include <linux/cpuhotplug.h> 33 #include <linux/syscore_ops.h> 34 #include <clocksource/hyperv_timer.h> 35 #include <linux/highmem.h> 36 37 u64 hv_current_partition_id = ~0ull; 38 EXPORT_SYMBOL_GPL(hv_current_partition_id); 39 40 void *hv_hypercall_pg; 41 EXPORT_SYMBOL_GPL(hv_hypercall_pg); 42 43 union hv_ghcb * __percpu *hv_ghcb_pg; 44 45 /* Storage to save the hypercall page temporarily for hibernation */ 46 static void *hv_hypercall_pg_saved; 47 48 struct hv_vp_assist_page **hv_vp_assist_page; 49 EXPORT_SYMBOL_GPL(hv_vp_assist_page); 50 51 static int hyperv_init_ghcb(void) 52 { 53 u64 ghcb_gpa; 54 void *ghcb_va; 55 void **ghcb_base; 56 57 if (!ms_hyperv.paravisor_present || !hv_isolation_type_snp()) 58 return 0; 59 60 if (!hv_ghcb_pg) 61 return -EINVAL; 62 63 /* 64 * GHCB page is allocated by paravisor. The address 65 * returned by MSR_AMD64_SEV_ES_GHCB is above shared 66 * memory boundary and map it here. 67 */ 68 rdmsrl(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa); 69 70 /* Mask out vTOM bit. ioremap_cache() maps decrypted */ 71 ghcb_gpa &= ~ms_hyperv.shared_gpa_boundary; 72 ghcb_va = (void *)ioremap_cache(ghcb_gpa, HV_HYP_PAGE_SIZE); 73 if (!ghcb_va) 74 return -ENOMEM; 75 76 ghcb_base = (void **)this_cpu_ptr(hv_ghcb_pg); 77 *ghcb_base = ghcb_va; 78 79 return 0; 80 } 81 82 static int hv_cpu_init(unsigned int cpu) 83 { 84 union hv_vp_assist_msr_contents msr = { 0 }; 85 struct hv_vp_assist_page **hvp; 86 int ret; 87 88 ret = hv_common_cpu_init(cpu); 89 if (ret) 90 return ret; 91 92 if (!hv_vp_assist_page) 93 return 0; 94 95 hvp = &hv_vp_assist_page[cpu]; 96 if (hv_root_partition) { 97 /* 98 * For root partition we get the hypervisor provided VP assist 99 * page, instead of allocating a new page. 100 */ 101 rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); 102 *hvp = memremap(msr.pfn << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT, 103 PAGE_SIZE, MEMREMAP_WB); 104 } else { 105 /* 106 * The VP assist page is an "overlay" page (see Hyper-V TLFS's 107 * Section 5.2.1 "GPA Overlay Pages"). Here it must be zeroed 108 * out to make sure we always write the EOI MSR in 109 * hv_apic_eoi_write() *after* the EOI optimization is disabled 110 * in hv_cpu_die(), otherwise a CPU may not be stopped in the 111 * case of CPU offlining and the VM will hang. 112 */ 113 if (!*hvp) { 114 *hvp = __vmalloc(PAGE_SIZE, GFP_KERNEL | __GFP_ZERO); 115 116 /* 117 * Hyper-V should never specify a VM that is a Confidential 118 * VM and also running in the root partition. Root partition 119 * is blocked to run in Confidential VM. So only decrypt assist 120 * page in non-root partition here. 121 */ 122 if (*hvp && !ms_hyperv.paravisor_present && hv_isolation_type_snp()) { 123 WARN_ON_ONCE(set_memory_decrypted((unsigned long)(*hvp), 1)); 124 memset(*hvp, 0, PAGE_SIZE); 125 } 126 } 127 128 if (*hvp) 129 msr.pfn = vmalloc_to_pfn(*hvp); 130 131 } 132 if (!WARN_ON(!(*hvp))) { 133 msr.enable = 1; 134 wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); 135 } 136 137 return hyperv_init_ghcb(); 138 } 139 140 static void (*hv_reenlightenment_cb)(void); 141 142 static void hv_reenlightenment_notify(struct work_struct *dummy) 143 { 144 struct hv_tsc_emulation_status emu_status; 145 146 rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); 147 148 /* Don't issue the callback if TSC accesses are not emulated */ 149 if (hv_reenlightenment_cb && emu_status.inprogress) 150 hv_reenlightenment_cb(); 151 } 152 static DECLARE_DELAYED_WORK(hv_reenlightenment_work, hv_reenlightenment_notify); 153 154 void hyperv_stop_tsc_emulation(void) 155 { 156 u64 freq; 157 struct hv_tsc_emulation_status emu_status; 158 159 rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); 160 emu_status.inprogress = 0; 161 wrmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); 162 163 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); 164 tsc_khz = div64_u64(freq, 1000); 165 } 166 EXPORT_SYMBOL_GPL(hyperv_stop_tsc_emulation); 167 168 static inline bool hv_reenlightenment_available(void) 169 { 170 /* 171 * Check for required features and privileges to make TSC frequency 172 * change notifications work. 173 */ 174 return ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 175 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE && 176 ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT; 177 } 178 179 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment) 180 { 181 apic_eoi(); 182 inc_irq_stat(irq_hv_reenlightenment_count); 183 schedule_delayed_work(&hv_reenlightenment_work, HZ/10); 184 } 185 186 void set_hv_tscchange_cb(void (*cb)(void)) 187 { 188 struct hv_reenlightenment_control re_ctrl = { 189 .vector = HYPERV_REENLIGHTENMENT_VECTOR, 190 .enabled = 1, 191 }; 192 struct hv_tsc_emulation_control emu_ctrl = {.enabled = 1}; 193 194 if (!hv_reenlightenment_available()) { 195 pr_warn("reenlightenment support is unavailable\n"); 196 return; 197 } 198 199 if (!hv_vp_index) 200 return; 201 202 hv_reenlightenment_cb = cb; 203 204 /* Make sure callback is registered before we write to MSRs */ 205 wmb(); 206 207 re_ctrl.target_vp = hv_vp_index[get_cpu()]; 208 209 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); 210 wrmsrl(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&emu_ctrl)); 211 212 put_cpu(); 213 } 214 EXPORT_SYMBOL_GPL(set_hv_tscchange_cb); 215 216 void clear_hv_tscchange_cb(void) 217 { 218 struct hv_reenlightenment_control re_ctrl; 219 220 if (!hv_reenlightenment_available()) 221 return; 222 223 rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl); 224 re_ctrl.enabled = 0; 225 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl); 226 227 hv_reenlightenment_cb = NULL; 228 } 229 EXPORT_SYMBOL_GPL(clear_hv_tscchange_cb); 230 231 static int hv_cpu_die(unsigned int cpu) 232 { 233 struct hv_reenlightenment_control re_ctrl; 234 unsigned int new_cpu; 235 void **ghcb_va; 236 237 if (hv_ghcb_pg) { 238 ghcb_va = (void **)this_cpu_ptr(hv_ghcb_pg); 239 if (*ghcb_va) 240 iounmap(*ghcb_va); 241 *ghcb_va = NULL; 242 } 243 244 hv_common_cpu_die(cpu); 245 246 if (hv_vp_assist_page && hv_vp_assist_page[cpu]) { 247 union hv_vp_assist_msr_contents msr = { 0 }; 248 if (hv_root_partition) { 249 /* 250 * For root partition the VP assist page is mapped to 251 * hypervisor provided page, and thus we unmap the 252 * page here and nullify it, so that in future we have 253 * correct page address mapped in hv_cpu_init. 254 */ 255 memunmap(hv_vp_assist_page[cpu]); 256 hv_vp_assist_page[cpu] = NULL; 257 rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); 258 msr.enable = 0; 259 } 260 wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); 261 } 262 263 if (hv_reenlightenment_cb == NULL) 264 return 0; 265 266 rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); 267 if (re_ctrl.target_vp == hv_vp_index[cpu]) { 268 /* 269 * Reassign reenlightenment notifications to some other online 270 * CPU or just disable the feature if there are no online CPUs 271 * left (happens on hibernation). 272 */ 273 new_cpu = cpumask_any_but(cpu_online_mask, cpu); 274 275 if (new_cpu < nr_cpu_ids) 276 re_ctrl.target_vp = hv_vp_index[new_cpu]; 277 else 278 re_ctrl.enabled = 0; 279 280 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); 281 } 282 283 return 0; 284 } 285 286 static int __init hv_pci_init(void) 287 { 288 bool gen2vm = efi_enabled(EFI_BOOT); 289 290 /* 291 * A Generation-2 VM doesn't support legacy PCI/PCIe, so both 292 * raw_pci_ops and raw_pci_ext_ops are NULL, and pci_subsys_init() -> 293 * pcibios_init() doesn't call pcibios_resource_survey() -> 294 * e820__reserve_resources_late(); as a result, any emulated persistent 295 * memory of E820_TYPE_PRAM (12) via the kernel parameter 296 * memmap=nn[KMG]!ss is not added into iomem_resource and hence can't be 297 * detected by register_e820_pmem(). Fix this by directly calling 298 * e820__reserve_resources_late() here: e820__reserve_resources_late() 299 * depends on e820__reserve_resources(), which has been called earlier 300 * from setup_arch(). Note: e820__reserve_resources_late() also adds 301 * any memory of E820_TYPE_PMEM (7) into iomem_resource, and 302 * acpi_nfit_register_region() -> acpi_nfit_insert_resource() -> 303 * region_intersects() returns REGION_INTERSECTS, so the memory of 304 * E820_TYPE_PMEM won't get added twice. 305 * 306 * We return 0 here so that pci_arch_init() won't print the warning: 307 * "PCI: Fatal: No config space access function found" 308 */ 309 if (gen2vm) { 310 e820__reserve_resources_late(); 311 return 0; 312 } 313 314 /* For Generation-1 VM, we'll proceed in pci_arch_init(). */ 315 return 1; 316 } 317 318 static int hv_suspend(void) 319 { 320 union hv_x64_msr_hypercall_contents hypercall_msr; 321 int ret; 322 323 if (hv_root_partition) 324 return -EPERM; 325 326 /* 327 * Reset the hypercall page as it is going to be invalidated 328 * across hibernation. Setting hv_hypercall_pg to NULL ensures 329 * that any subsequent hypercall operation fails safely instead of 330 * crashing due to an access of an invalid page. The hypercall page 331 * pointer is restored on resume. 332 */ 333 hv_hypercall_pg_saved = hv_hypercall_pg; 334 hv_hypercall_pg = NULL; 335 336 /* Disable the hypercall page in the hypervisor */ 337 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 338 hypercall_msr.enable = 0; 339 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 340 341 ret = hv_cpu_die(0); 342 return ret; 343 } 344 345 static void hv_resume(void) 346 { 347 union hv_x64_msr_hypercall_contents hypercall_msr; 348 int ret; 349 350 ret = hv_cpu_init(0); 351 WARN_ON(ret); 352 353 /* Re-enable the hypercall page */ 354 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 355 hypercall_msr.enable = 1; 356 hypercall_msr.guest_physical_address = 357 vmalloc_to_pfn(hv_hypercall_pg_saved); 358 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 359 360 hv_hypercall_pg = hv_hypercall_pg_saved; 361 hv_hypercall_pg_saved = NULL; 362 363 /* 364 * Reenlightenment notifications are disabled by hv_cpu_die(0), 365 * reenable them here if hv_reenlightenment_cb was previously set. 366 */ 367 if (hv_reenlightenment_cb) 368 set_hv_tscchange_cb(hv_reenlightenment_cb); 369 } 370 371 /* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */ 372 static struct syscore_ops hv_syscore_ops = { 373 .suspend = hv_suspend, 374 .resume = hv_resume, 375 }; 376 377 static void (* __initdata old_setup_percpu_clockev)(void); 378 379 static void __init hv_stimer_setup_percpu_clockev(void) 380 { 381 /* 382 * Ignore any errors in setting up stimer clockevents 383 * as we can run with the LAPIC timer as a fallback. 384 */ 385 (void)hv_stimer_alloc(false); 386 387 /* 388 * Still register the LAPIC timer, because the direct-mode STIMER is 389 * not supported by old versions of Hyper-V. This also allows users 390 * to switch to LAPIC timer via /sys, if they want to. 391 */ 392 if (old_setup_percpu_clockev) 393 old_setup_percpu_clockev(); 394 } 395 396 static void __init hv_get_partition_id(void) 397 { 398 struct hv_get_partition_id *output_page; 399 u64 status; 400 unsigned long flags; 401 402 local_irq_save(flags); 403 output_page = *this_cpu_ptr(hyperv_pcpu_output_arg); 404 status = hv_do_hypercall(HVCALL_GET_PARTITION_ID, NULL, output_page); 405 if (!hv_result_success(status)) { 406 /* No point in proceeding if this failed */ 407 pr_err("Failed to get partition ID: %lld\n", status); 408 BUG(); 409 } 410 hv_current_partition_id = output_page->partition_id; 411 local_irq_restore(flags); 412 } 413 414 #if IS_ENABLED(CONFIG_HYPERV_VTL_MODE) 415 static u8 __init get_vtl(void) 416 { 417 u64 control = HV_HYPERCALL_REP_COMP_1 | HVCALL_GET_VP_REGISTERS; 418 struct hv_input_get_vp_registers *input; 419 struct hv_output_get_vp_registers *output; 420 unsigned long flags; 421 u64 ret; 422 423 local_irq_save(flags); 424 input = *this_cpu_ptr(hyperv_pcpu_input_arg); 425 output = *this_cpu_ptr(hyperv_pcpu_output_arg); 426 427 memset(input, 0, struct_size(input, names, 1)); 428 input->partition_id = HV_PARTITION_ID_SELF; 429 input->vp_index = HV_VP_INDEX_SELF; 430 input->input_vtl.as_uint8 = 0; 431 input->names[0] = HV_REGISTER_VSM_VP_STATUS; 432 433 ret = hv_do_hypercall(control, input, output); 434 if (hv_result_success(ret)) { 435 ret = output->values[0].reg8 & HV_X64_VTL_MASK; 436 } else { 437 pr_err("Failed to get VTL(error: %lld) exiting...\n", ret); 438 BUG(); 439 } 440 441 local_irq_restore(flags); 442 return ret; 443 } 444 #else 445 static inline u8 get_vtl(void) { return 0; } 446 #endif 447 448 /* 449 * This function is to be invoked early in the boot sequence after the 450 * hypervisor has been detected. 451 * 452 * 1. Setup the hypercall page. 453 * 2. Register Hyper-V specific clocksource. 454 * 3. Setup Hyper-V specific APIC entry points. 455 */ 456 void __init hyperv_init(void) 457 { 458 u64 guest_id; 459 union hv_x64_msr_hypercall_contents hypercall_msr; 460 int cpuhp; 461 462 if (x86_hyper_type != X86_HYPER_MS_HYPERV) 463 return; 464 465 if (hv_common_init()) 466 return; 467 468 /* 469 * The VP assist page is useless to a TDX guest: the only use we 470 * would have for it is lazy EOI, which can not be used with TDX. 471 */ 472 if (hv_isolation_type_tdx()) 473 hv_vp_assist_page = NULL; 474 else 475 hv_vp_assist_page = kcalloc(nr_cpu_ids, 476 sizeof(*hv_vp_assist_page), 477 GFP_KERNEL); 478 if (!hv_vp_assist_page) { 479 ms_hyperv.hints &= ~HV_X64_ENLIGHTENED_VMCS_RECOMMENDED; 480 481 if (!hv_isolation_type_tdx()) 482 goto common_free; 483 } 484 485 if (ms_hyperv.paravisor_present && hv_isolation_type_snp()) { 486 /* Negotiate GHCB Version. */ 487 if (!hv_ghcb_negotiate_protocol()) 488 hv_ghcb_terminate(SEV_TERM_SET_GEN, 489 GHCB_SEV_ES_PROT_UNSUPPORTED); 490 491 hv_ghcb_pg = alloc_percpu(union hv_ghcb *); 492 if (!hv_ghcb_pg) 493 goto free_vp_assist_page; 494 } 495 496 cpuhp = cpuhp_setup_state(CPUHP_AP_HYPERV_ONLINE, "x86/hyperv_init:online", 497 hv_cpu_init, hv_cpu_die); 498 if (cpuhp < 0) 499 goto free_ghcb_page; 500 501 /* 502 * Setup the hypercall page and enable hypercalls. 503 * 1. Register the guest ID 504 * 2. Enable the hypercall and register the hypercall page 505 * 506 * A TDX VM with no paravisor only uses TDX GHCI rather than hv_hypercall_pg: 507 * when the hypercall input is a page, such a VM must pass a decrypted 508 * page to Hyper-V, e.g. hv_post_message() uses the per-CPU page 509 * hyperv_pcpu_input_arg, which is decrypted if no paravisor is present. 510 * 511 * A TDX VM with the paravisor uses hv_hypercall_pg for most hypercalls, 512 * which are handled by the paravisor and the VM must use an encrypted 513 * input page: in such a VM, the hyperv_pcpu_input_arg is encrypted and 514 * used in the hypercalls, e.g. see hv_mark_gpa_visibility() and 515 * hv_arch_irq_unmask(). Such a VM uses TDX GHCI for two hypercalls: 516 * 1. HVCALL_SIGNAL_EVENT: see vmbus_set_event() and _hv_do_fast_hypercall8(). 517 * 2. HVCALL_POST_MESSAGE: the input page must be a decrypted page, i.e. 518 * hv_post_message() in such a VM can't use the encrypted hyperv_pcpu_input_arg; 519 * instead, hv_post_message() uses the post_msg_page, which is decrypted 520 * in such a VM and is only used in such a VM. 521 */ 522 guest_id = hv_generate_guest_id(LINUX_VERSION_CODE); 523 wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id); 524 525 /* With the paravisor, the VM must also write the ID via GHCB/GHCI */ 526 hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, guest_id); 527 528 /* A TDX VM with no paravisor only uses TDX GHCI rather than hv_hypercall_pg */ 529 if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present) 530 goto skip_hypercall_pg_init; 531 532 hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, 533 VMALLOC_END, GFP_KERNEL, PAGE_KERNEL_ROX, 534 VM_FLUSH_RESET_PERMS, NUMA_NO_NODE, 535 __builtin_return_address(0)); 536 if (hv_hypercall_pg == NULL) 537 goto clean_guest_os_id; 538 539 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 540 hypercall_msr.enable = 1; 541 542 if (hv_root_partition) { 543 struct page *pg; 544 void *src; 545 546 /* 547 * For the root partition, the hypervisor will set up its 548 * hypercall page. The hypervisor guarantees it will not show 549 * up in the root's address space. The root can't change the 550 * location of the hypercall page. 551 * 552 * Order is important here. We must enable the hypercall page 553 * so it is populated with code, then copy the code to an 554 * executable page. 555 */ 556 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 557 558 pg = vmalloc_to_page(hv_hypercall_pg); 559 src = memremap(hypercall_msr.guest_physical_address << PAGE_SHIFT, PAGE_SIZE, 560 MEMREMAP_WB); 561 BUG_ON(!src); 562 memcpy_to_page(pg, 0, src, HV_HYP_PAGE_SIZE); 563 memunmap(src); 564 565 hv_remap_tsc_clocksource(); 566 } else { 567 hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg); 568 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 569 } 570 571 skip_hypercall_pg_init: 572 /* 573 * Some versions of Hyper-V that provide IBT in guest VMs have a bug 574 * in that there's no ENDBR64 instruction at the entry to the 575 * hypercall page. Because hypercalls are invoked via an indirect call 576 * to the hypercall page, all hypercall attempts fail when IBT is 577 * enabled, and Linux panics. For such buggy versions, disable IBT. 578 * 579 * Fixed versions of Hyper-V always provide ENDBR64 on the hypercall 580 * page, so if future Linux kernel versions enable IBT for 32-bit 581 * builds, additional hypercall page hackery will be required here 582 * to provide an ENDBR32. 583 */ 584 #ifdef CONFIG_X86_KERNEL_IBT 585 if (cpu_feature_enabled(X86_FEATURE_IBT) && 586 *(u32 *)hv_hypercall_pg != gen_endbr()) { 587 setup_clear_cpu_cap(X86_FEATURE_IBT); 588 pr_warn("Disabling IBT because of Hyper-V bug\n"); 589 } 590 #endif 591 592 /* 593 * hyperv_init() is called before LAPIC is initialized: see 594 * apic_intr_mode_init() -> x86_platform.apic_post_init() and 595 * apic_bsp_setup() -> setup_local_APIC(). The direct-mode STIMER 596 * depends on LAPIC, so hv_stimer_alloc() should be called from 597 * x86_init.timers.setup_percpu_clockev. 598 */ 599 old_setup_percpu_clockev = x86_init.timers.setup_percpu_clockev; 600 x86_init.timers.setup_percpu_clockev = hv_stimer_setup_percpu_clockev; 601 602 hv_apic_init(); 603 604 x86_init.pci.arch_init = hv_pci_init; 605 606 register_syscore_ops(&hv_syscore_ops); 607 608 if (cpuid_ebx(HYPERV_CPUID_FEATURES) & HV_ACCESS_PARTITION_ID) 609 hv_get_partition_id(); 610 611 BUG_ON(hv_root_partition && hv_current_partition_id == ~0ull); 612 613 #ifdef CONFIG_PCI_MSI 614 /* 615 * If we're running as root, we want to create our own PCI MSI domain. 616 * We can't set this in hv_pci_init because that would be too late. 617 */ 618 if (hv_root_partition) 619 x86_init.irqs.create_pci_msi_domain = hv_create_pci_msi_domain; 620 #endif 621 622 /* Query the VMs extended capability once, so that it can be cached. */ 623 hv_query_ext_cap(0); 624 625 /* Find the VTL */ 626 ms_hyperv.vtl = get_vtl(); 627 628 if (ms_hyperv.vtl > 0) /* non default VTL */ 629 hv_vtl_early_init(); 630 631 return; 632 633 clean_guest_os_id: 634 wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); 635 hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0); 636 cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE); 637 free_ghcb_page: 638 free_percpu(hv_ghcb_pg); 639 free_vp_assist_page: 640 kfree(hv_vp_assist_page); 641 hv_vp_assist_page = NULL; 642 common_free: 643 hv_common_free(); 644 } 645 646 /* 647 * This routine is called before kexec/kdump, it does the required cleanup. 648 */ 649 void hyperv_cleanup(void) 650 { 651 union hv_x64_msr_hypercall_contents hypercall_msr; 652 union hv_reference_tsc_msr tsc_msr; 653 654 /* Reset our OS id */ 655 wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); 656 hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0); 657 658 /* 659 * Reset hypercall page reference before reset the page, 660 * let hypercall operations fail safely rather than 661 * panic the kernel for using invalid hypercall page 662 */ 663 hv_hypercall_pg = NULL; 664 665 /* Reset the hypercall page */ 666 hypercall_msr.as_uint64 = hv_get_msr(HV_X64_MSR_HYPERCALL); 667 hypercall_msr.enable = 0; 668 hv_set_msr(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 669 670 /* Reset the TSC page */ 671 tsc_msr.as_uint64 = hv_get_msr(HV_X64_MSR_REFERENCE_TSC); 672 tsc_msr.enable = 0; 673 hv_set_msr(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); 674 } 675 676 void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die) 677 { 678 static bool panic_reported; 679 u64 guest_id; 680 681 if (in_die && !panic_on_oops) 682 return; 683 684 /* 685 * We prefer to report panic on 'die' chain as we have proper 686 * registers to report, but if we miss it (e.g. on BUG()) we need 687 * to report it on 'panic'. 688 */ 689 if (panic_reported) 690 return; 691 panic_reported = true; 692 693 rdmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id); 694 695 wrmsrl(HV_X64_MSR_CRASH_P0, err); 696 wrmsrl(HV_X64_MSR_CRASH_P1, guest_id); 697 wrmsrl(HV_X64_MSR_CRASH_P2, regs->ip); 698 wrmsrl(HV_X64_MSR_CRASH_P3, regs->ax); 699 wrmsrl(HV_X64_MSR_CRASH_P4, regs->sp); 700 701 /* 702 * Let Hyper-V know there is crash data available 703 */ 704 wrmsrl(HV_X64_MSR_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY); 705 } 706 EXPORT_SYMBOL_GPL(hyperv_report_panic); 707 708 bool hv_is_hyperv_initialized(void) 709 { 710 union hv_x64_msr_hypercall_contents hypercall_msr; 711 712 /* 713 * Ensure that we're really on Hyper-V, and not a KVM or Xen 714 * emulation of Hyper-V 715 */ 716 if (x86_hyper_type != X86_HYPER_MS_HYPERV) 717 return false; 718 719 /* A TDX VM with no paravisor uses TDX GHCI call rather than hv_hypercall_pg */ 720 if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present) 721 return true; 722 /* 723 * Verify that earlier initialization succeeded by checking 724 * that the hypercall page is setup 725 */ 726 hypercall_msr.as_uint64 = 0; 727 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 728 729 return hypercall_msr.enable; 730 } 731 EXPORT_SYMBOL_GPL(hv_is_hyperv_initialized); 732