1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 25b26547dSBorislav Petkov /* 35b26547dSBorislav Petkov * Copyright (C) 2013 Advanced Micro Devices, Inc. 45b26547dSBorislav Petkov * 55b26547dSBorislav Petkov * Author: Steven Kinney <Steven.Kinney@amd.com> 65b26547dSBorislav Petkov * Author: Suravee Suthikulpanit <Suraveee.Suthikulpanit@amd.com> 75b26547dSBorislav Petkov */ 85b26547dSBorislav Petkov 95b26547dSBorislav Petkov #ifndef _PERF_EVENT_AMD_IOMMU_H_ 105b26547dSBorislav Petkov #define _PERF_EVENT_AMD_IOMMU_H_ 115b26547dSBorislav Petkov 125b26547dSBorislav Petkov /* iommu pc mmio region register indexes */ 135b26547dSBorislav Petkov #define IOMMU_PC_COUNTER_REG 0x00 145b26547dSBorislav Petkov #define IOMMU_PC_COUNTER_SRC_REG 0x08 155b26547dSBorislav Petkov #define IOMMU_PC_PASID_MATCH_REG 0x10 165b26547dSBorislav Petkov #define IOMMU_PC_DOMID_MATCH_REG 0x18 175b26547dSBorislav Petkov #define IOMMU_PC_DEVID_MATCH_REG 0x20 185b26547dSBorislav Petkov #define IOMMU_PC_COUNTER_REPORT_REG 0x28 195b26547dSBorislav Petkov 20*d9f6e12fSIngo Molnar /* maximum specified bank/counters */ 215b26547dSBorislav Petkov #define PC_MAX_SPEC_BNKS 64 225b26547dSBorislav Petkov #define PC_MAX_SPEC_CNTRS 16 235b26547dSBorislav Petkov 241650dfd1SSuravee Suthikulpanit struct amd_iommu; 251650dfd1SSuravee Suthikulpanit 265b26547dSBorislav Petkov /* amd_iommu_init.c external support functions */ 276b9376e3SSuravee Suthikulpanit extern int amd_iommu_get_num_iommus(void); 286b9376e3SSuravee Suthikulpanit 295b26547dSBorislav Petkov extern bool amd_iommu_pc_supported(void); 305b26547dSBorislav Petkov 31f5863a00SSuravee Suthikulpanit extern u8 amd_iommu_pc_get_max_banks(unsigned int idx); 325b26547dSBorislav Petkov 33f5863a00SSuravee Suthikulpanit extern u8 amd_iommu_pc_get_max_counters(unsigned int idx); 345b26547dSBorislav Petkov 351650dfd1SSuravee Suthikulpanit extern int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, 361650dfd1SSuravee Suthikulpanit u8 fxn, u64 *value); 371650dfd1SSuravee Suthikulpanit 381650dfd1SSuravee Suthikulpanit extern int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, 391650dfd1SSuravee Suthikulpanit u8 fxn, u64 *value); 405b26547dSBorislav Petkov 41f5863a00SSuravee Suthikulpanit extern struct amd_iommu *get_amd_iommu(int idx); 42f5863a00SSuravee Suthikulpanit 435b26547dSBorislav Petkov #endif /*_PERF_EVENT_AMD_IOMMU_H_*/ 44