1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Compatibility mode system call entry point for x86-64. 4 * 5 * Copyright 2000-2002 Andi Kleen, SuSE Labs. 6 */ 7#include <asm/asm-offsets.h> 8#include <asm/current.h> 9#include <asm/errno.h> 10#include <asm/ia32_unistd.h> 11#include <asm/thread_info.h> 12#include <asm/segment.h> 13#include <asm/irqflags.h> 14#include <asm/asm.h> 15#include <asm/smap.h> 16#include <asm/nospec-branch.h> 17#include <linux/linkage.h> 18#include <linux/err.h> 19 20#include "calling.h" 21 22 .section .entry.text, "ax" 23 24/* 25 * 32-bit SYSENTER entry. 26 * 27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 28 * on 64-bit kernels running on Intel CPUs. 29 * 30 * The SYSENTER instruction, in principle, should *only* occur in the 31 * vDSO. In practice, a small number of Android devices were shipped 32 * with a copy of Bionic that inlined a SYSENTER instruction. This 33 * never happened in any of Google's Bionic versions -- it only happened 34 * in a narrow range of Intel-provided versions. 35 * 36 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs. 37 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 38 * SYSENTER does not save anything on the stack, 39 * and does not save old RIP (!!!), RSP, or RFLAGS. 40 * 41 * Arguments: 42 * eax system call number 43 * ebx arg1 44 * ecx arg2 45 * edx arg3 46 * esi arg4 47 * edi arg5 48 * ebp user stack 49 * 0(%ebp) arg6 50 */ 51SYM_CODE_START(entry_SYSENTER_compat) 52 UNWIND_HINT_ENTRY 53 ENDBR 54 /* Interrupts are off on entry. */ 55 swapgs 56 57 pushq %rax 58 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 59 popq %rax 60 61 movq PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp 62 63 /* Construct struct pt_regs on stack */ 64 pushq $__USER_DS /* pt_regs->ss */ 65 pushq $0 /* pt_regs->sp = 0 (placeholder) */ 66 67 /* 68 * Push flags. This is nasty. First, interrupts are currently 69 * off, but we need pt_regs->flags to have IF set. Second, if TS 70 * was set in usermode, it's still set, and we're singlestepping 71 * through this code. do_SYSENTER_32() will fix up IF. 72 */ 73 pushfq /* pt_regs->flags (except IF = 0) */ 74 pushq $__USER32_CS /* pt_regs->cs */ 75 pushq $0 /* pt_regs->ip = 0 (placeholder) */ 76SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL) 77 78 /* 79 * User tracing code (ptrace or signal handlers) might assume that 80 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 81 * syscall. Just in case the high bits are nonzero, zero-extend 82 * the syscall number. (This could almost certainly be deleted 83 * with no ill effects.) 84 */ 85 movl %eax, %eax 86 87 pushq %rax /* pt_regs->orig_ax */ 88 PUSH_AND_CLEAR_REGS rax=$-ENOSYS 89 UNWIND_HINT_REGS 90 91 cld 92 93 IBRS_ENTER 94 UNTRAIN_RET 95 96 /* 97 * SYSENTER doesn't filter flags, so we need to clear NT and AC 98 * ourselves. To save a few cycles, we can check whether 99 * either was set instead of doing an unconditional popfq. 100 * This needs to happen before enabling interrupts so that 101 * we don't get preempted with NT set. 102 * 103 * If TF is set, we will single-step all the way to here -- do_debug 104 * will ignore all the traps. (Yes, this is slow, but so is 105 * single-stepping in general. This allows us to avoid having 106 * a more complicated code to handle the case where a user program 107 * forces us to single-step through the SYSENTER entry code.) 108 * 109 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 110 * out-of-line as an optimization: NT is unlikely to be set in the 111 * majority of the cases and instead of polluting the I$ unnecessarily, 112 * we're keeping that code behind a branch which will predict as 113 * not-taken and therefore its instructions won't be fetched. 114 */ 115 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp) 116 jnz .Lsysenter_fix_flags 117.Lsysenter_flags_fixed: 118 119 movq %rsp, %rdi 120 call do_SYSENTER_32 121 jmp sysret32_from_system_call 122 123.Lsysenter_fix_flags: 124 pushq $X86_EFLAGS_FIXED 125 popfq 126 jmp .Lsysenter_flags_fixed 127SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL) 128SYM_CODE_END(entry_SYSENTER_compat) 129 130/* 131 * 32-bit SYSCALL entry. 132 * 133 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 134 * on 64-bit kernels running on AMD CPUs. 135 * 136 * The SYSCALL instruction, in principle, should *only* occur in the 137 * vDSO. In practice, it appears that this really is the case. 138 * As evidence: 139 * 140 * - The calling convention for SYSCALL has changed several times without 141 * anyone noticing. 142 * 143 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything 144 * user task that did SYSCALL without immediately reloading SS 145 * would randomly crash. 146 * 147 * - Most programmers do not directly target AMD CPUs, and the 32-bit 148 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD 149 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels 150 * because the SYSCALL instruction in legacy/native 32-bit mode (as 151 * opposed to compat mode) is sufficiently poorly designed as to be 152 * essentially unusable. 153 * 154 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves 155 * RFLAGS to R11, then loads new SS, CS, and RIP from previously 156 * programmed MSRs. RFLAGS gets masked by a value from another MSR 157 * (so CLD and CLAC are not needed). SYSCALL does not save anything on 158 * the stack and does not change RSP. 159 * 160 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode 161 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it). 162 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit 163 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes 164 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors). 165 * 166 * Arguments: 167 * eax system call number 168 * ecx return address 169 * ebx arg1 170 * ebp arg2 (note: not saved in the stack frame, should not be touched) 171 * edx arg3 172 * esi arg4 173 * edi arg5 174 * esp user stack 175 * 0(%esp) arg6 176 */ 177SYM_CODE_START(entry_SYSCALL_compat) 178 UNWIND_HINT_ENTRY 179 ENDBR 180 /* Interrupts are off on entry. */ 181 swapgs 182 183 /* Stash user ESP */ 184 movl %esp, %r8d 185 186 /* Use %rsp as scratch reg. User ESP is stashed in r8 */ 187 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp 188 189 /* Switch to the kernel stack */ 190 movq PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp 191 192SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL) 193 ANNOTATE_NOENDBR 194 195 /* Construct struct pt_regs on stack */ 196 pushq $__USER_DS /* pt_regs->ss */ 197 pushq %r8 /* pt_regs->sp */ 198 pushq %r11 /* pt_regs->flags */ 199 pushq $__USER32_CS /* pt_regs->cs */ 200 pushq %rcx /* pt_regs->ip */ 201SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL) 202 movl %eax, %eax /* discard orig_ax high bits */ 203 pushq %rax /* pt_regs->orig_ax */ 204 PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS 205 UNWIND_HINT_REGS 206 207 IBRS_ENTER 208 UNTRAIN_RET 209 210 movq %rsp, %rdi 211 call do_fast_syscall_32 212 213sysret32_from_system_call: 214 /* XEN PV guests always use IRET path */ 215 ALTERNATIVE "testb %al, %al; jz swapgs_restore_regs_and_return_to_usermode", \ 216 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV 217 218 /* 219 * Opportunistic SYSRET 220 * 221 * We are not going to return to userspace from the trampoline 222 * stack. So let's erase the thread stack right now. 223 */ 224 STACKLEAK_ERASE 225 226 IBRS_EXIT 227 228 movq RBX(%rsp), %rbx /* pt_regs->rbx */ 229 movq RBP(%rsp), %rbp /* pt_regs->rbp */ 230 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */ 231 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */ 232 addq $RAX, %rsp /* Skip r8-r15 */ 233 popq %rax /* pt_regs->rax */ 234 popq %rdx /* Skip pt_regs->cx */ 235 popq %rdx /* pt_regs->dx */ 236 popq %rsi /* pt_regs->si */ 237 popq %rdi /* pt_regs->di */ 238 239 /* 240 * USERGS_SYSRET32 does: 241 * GSBASE = user's GS base 242 * EIP = ECX 243 * RFLAGS = R11 244 * CS = __USER32_CS 245 * SS = __USER_DS 246 * 247 * ECX will not match pt_regs->cx, but we're returning to a vDSO 248 * trampoline that will fix up RCX, so this is okay. 249 * 250 * R12-R15 are callee-saved, so they contain whatever was in them 251 * when the system call started, which is already known to user 252 * code. We zero R8-R10 to avoid info leaks. 253 */ 254 movq RSP-ORIG_RAX(%rsp), %rsp 255SYM_INNER_LABEL(entry_SYSRETL_compat_unsafe_stack, SYM_L_GLOBAL) 256 ANNOTATE_NOENDBR 257 258 /* 259 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored 260 * on the process stack which is not mapped to userspace and 261 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3 262 * switch until after after the last reference to the process 263 * stack. 264 * 265 * %r8/%r9 are zeroed before the sysret, thus safe to clobber. 266 */ 267 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9 268 269 xorl %r8d, %r8d 270 xorl %r9d, %r9d 271 xorl %r10d, %r10d 272 swapgs 273 CLEAR_CPU_BUFFERS 274 sysretl 275SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL) 276 ANNOTATE_NOENDBR 277 int3 278SYM_CODE_END(entry_SYSCALL_compat) 279