xref: /linux/arch/x86/crypto/sha1_ssse3_glue.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * Cryptographic API.
3  *
4  * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using
5  * Supplemental SSE3 instructions.
6  *
7  * This file is based on sha1_generic.c
8  *
9  * Copyright (c) Alan Smithee.
10  * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
11  * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
12  * Copyright (c) Mathias Krause <minipli@googlemail.com>
13  * Copyright (c) Chandramouli Narayanan <mouli@linux.intel.com>
14  *
15  * This program is free software; you can redistribute it and/or modify it
16  * under the terms of the GNU General Public License as published by the Free
17  * Software Foundation; either version 2 of the License, or (at your option)
18  * any later version.
19  *
20  */
21 
22 #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
23 
24 #include <crypto/internal/hash.h>
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/mm.h>
28 #include <linux/cryptohash.h>
29 #include <linux/types.h>
30 #include <crypto/sha.h>
31 #include <crypto/sha1_base.h>
32 #include <asm/fpu/api.h>
33 
34 
35 asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,
36 				     unsigned int rounds);
37 #ifdef CONFIG_AS_AVX
38 asmlinkage void sha1_transform_avx(u32 *digest, const char *data,
39 				   unsigned int rounds);
40 #endif
41 #ifdef CONFIG_AS_AVX2
42 #define SHA1_AVX2_BLOCK_OPTSIZE	4	/* optimal 4*64 bytes of SHA1 blocks */
43 
44 asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
45 				    unsigned int rounds);
46 #endif
47 
48 static void (*sha1_transform_asm)(u32 *, const char *, unsigned int);
49 
50 static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
51 			     unsigned int len)
52 {
53 	struct sha1_state *sctx = shash_desc_ctx(desc);
54 
55 	if (!irq_fpu_usable() ||
56 	    (sctx->count % SHA1_BLOCK_SIZE) + len < SHA1_BLOCK_SIZE)
57 		return crypto_sha1_update(desc, data, len);
58 
59 	/* make sure casting to sha1_block_fn() is safe */
60 	BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);
61 
62 	kernel_fpu_begin();
63 	sha1_base_do_update(desc, data, len,
64 			    (sha1_block_fn *)sha1_transform_asm);
65 	kernel_fpu_end();
66 
67 	return 0;
68 }
69 
70 static int sha1_ssse3_finup(struct shash_desc *desc, const u8 *data,
71 			      unsigned int len, u8 *out)
72 {
73 	if (!irq_fpu_usable())
74 		return crypto_sha1_finup(desc, data, len, out);
75 
76 	kernel_fpu_begin();
77 	if (len)
78 		sha1_base_do_update(desc, data, len,
79 				    (sha1_block_fn *)sha1_transform_asm);
80 	sha1_base_do_finalize(desc, (sha1_block_fn *)sha1_transform_asm);
81 	kernel_fpu_end();
82 
83 	return sha1_base_finish(desc, out);
84 }
85 
86 /* Add padding and return the message digest. */
87 static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
88 {
89 	return sha1_ssse3_finup(desc, NULL, 0, out);
90 }
91 
92 #ifdef CONFIG_AS_AVX2
93 static void sha1_apply_transform_avx2(u32 *digest, const char *data,
94 				unsigned int rounds)
95 {
96 	/* Select the optimal transform based on data block size */
97 	if (rounds >= SHA1_AVX2_BLOCK_OPTSIZE)
98 		sha1_transform_avx2(digest, data, rounds);
99 	else
100 		sha1_transform_avx(digest, data, rounds);
101 }
102 #endif
103 
104 static struct shash_alg alg = {
105 	.digestsize	=	SHA1_DIGEST_SIZE,
106 	.init		=	sha1_base_init,
107 	.update		=	sha1_ssse3_update,
108 	.final		=	sha1_ssse3_final,
109 	.finup		=	sha1_ssse3_finup,
110 	.descsize	=	sizeof(struct sha1_state),
111 	.base		=	{
112 		.cra_name	=	"sha1",
113 		.cra_driver_name=	"sha1-ssse3",
114 		.cra_priority	=	150,
115 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
116 		.cra_blocksize	=	SHA1_BLOCK_SIZE,
117 		.cra_module	=	THIS_MODULE,
118 	}
119 };
120 
121 #ifdef CONFIG_AS_AVX
122 static bool __init avx_usable(void)
123 {
124 	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, NULL)) {
125 		if (cpu_has_avx)
126 			pr_info("AVX detected but unusable.\n");
127 		return false;
128 	}
129 
130 	return true;
131 }
132 
133 #ifdef CONFIG_AS_AVX2
134 static bool __init avx2_usable(void)
135 {
136 	if (avx_usable() && cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI1) &&
137 	    boot_cpu_has(X86_FEATURE_BMI2))
138 		return true;
139 
140 	return false;
141 }
142 #endif
143 #endif
144 
145 static int __init sha1_ssse3_mod_init(void)
146 {
147 	char *algo_name;
148 
149 	/* test for SSSE3 first */
150 	if (cpu_has_ssse3) {
151 		sha1_transform_asm = sha1_transform_ssse3;
152 		algo_name = "SSSE3";
153 	}
154 
155 #ifdef CONFIG_AS_AVX
156 	/* allow AVX to override SSSE3, it's a little faster */
157 	if (avx_usable()) {
158 		sha1_transform_asm = sha1_transform_avx;
159 		algo_name = "AVX";
160 #ifdef CONFIG_AS_AVX2
161 		/* allow AVX2 to override AVX, it's a little faster */
162 		if (avx2_usable()) {
163 			sha1_transform_asm = sha1_apply_transform_avx2;
164 			algo_name = "AVX2";
165 		}
166 #endif
167 	}
168 #endif
169 
170 	if (sha1_transform_asm) {
171 		pr_info("Using %s optimized SHA-1 implementation\n", algo_name);
172 		return crypto_register_shash(&alg);
173 	}
174 	pr_info("Neither AVX nor AVX2 nor SSSE3 is available/usable.\n");
175 
176 	return -ENODEV;
177 }
178 
179 static void __exit sha1_ssse3_mod_fini(void)
180 {
181 	crypto_unregister_shash(&alg);
182 }
183 
184 module_init(sha1_ssse3_mod_init);
185 module_exit(sha1_ssse3_mod_fini);
186 
187 MODULE_LICENSE("GPL");
188 MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
189 
190 MODULE_ALIAS_CRYPTO("sha1");
191