1 // SPDX-License-Identifier: GPL-2.0 2 #include "misc.h" 3 #include <asm/bootparam.h> 4 #include <asm/bootparam_utils.h> 5 #include <asm/cpuid/api.h> 6 #include <asm/e820/types.h> 7 #include <asm/pgtable.h> 8 #include <asm/processor.h> 9 #include "../string.h" 10 #include "efi.h" 11 12 #define BIOS_START_MIN 0x20000U /* 128K, less than this is insane */ 13 #define BIOS_START_MAX 0x9f000U /* 640K, absolute maximum */ 14 15 /* __pgtable_l5_enabled needs to be in .data to avoid being cleared along with .bss */ 16 unsigned int __section(".data") __pgtable_l5_enabled; 17 unsigned int __section(".data") pgdir_shift = 39; 18 unsigned int __section(".data") ptrs_per_p4d = 1; 19 20 /* Buffer to preserve trampoline memory */ 21 static char trampoline_save[TRAMPOLINE_32BIT_SIZE]; 22 23 /* 24 * Trampoline address will be printed by extract_kernel() for debugging 25 * purposes. 26 * 27 * Avoid putting the pointer into .bss as it will be cleared between 28 * configure_5level_paging() and extract_kernel(). 29 */ 30 unsigned long *trampoline_32bit __section(".data"); 31 32 int cmdline_find_option_bool(const char *option); 33 34 static unsigned long find_trampoline_placement(void) 35 { 36 unsigned long bios_start = 0, ebda_start = 0; 37 struct boot_e820_entry *entry; 38 char *signature; 39 int i; 40 41 /* 42 * Find a suitable spot for the trampoline. 43 * This code is based on reserve_bios_regions(). 44 */ 45 46 /* 47 * EFI systems may not provide legacy ROM. The memory may not be mapped 48 * at all. 49 * 50 * Only look for values in the legacy ROM for non-EFI system. 51 */ 52 signature = (char *)&boot_params_ptr->efi_info.efi_loader_signature; 53 if (strncmp(signature, EFI32_LOADER_SIGNATURE, 4) && 54 strncmp(signature, EFI64_LOADER_SIGNATURE, 4)) { 55 ebda_start = *(unsigned short *)0x40e << 4; 56 bios_start = *(unsigned short *)0x413 << 10; 57 } 58 59 if (bios_start < BIOS_START_MIN || bios_start > BIOS_START_MAX) 60 bios_start = BIOS_START_MAX; 61 62 if (ebda_start > BIOS_START_MIN && ebda_start < bios_start) 63 bios_start = ebda_start; 64 65 bios_start = round_down(bios_start, PAGE_SIZE); 66 67 /* Find the first usable memory region under bios_start. */ 68 for (i = boot_params_ptr->e820_entries - 1; i >= 0; i--) { 69 unsigned long new = bios_start; 70 71 entry = &boot_params_ptr->e820_table[i]; 72 73 /* Skip all entries above bios_start. */ 74 if (bios_start <= entry->addr) 75 continue; 76 77 /* Skip non-RAM entries. */ 78 if (entry->type != E820_TYPE_RAM) 79 continue; 80 81 /* Adjust bios_start to the end of the entry if needed. */ 82 if (bios_start > entry->addr + entry->size) 83 new = entry->addr + entry->size; 84 85 /* Keep bios_start page-aligned. */ 86 new = round_down(new, PAGE_SIZE); 87 88 /* Skip the entry if it's too small. */ 89 if (new - TRAMPOLINE_32BIT_SIZE < entry->addr) 90 continue; 91 92 /* Protect against underflow. */ 93 if (new - TRAMPOLINE_32BIT_SIZE > bios_start) 94 break; 95 96 bios_start = new; 97 break; 98 } 99 100 /* Place the trampoline just below the end of low memory */ 101 return bios_start - TRAMPOLINE_32BIT_SIZE; 102 } 103 104 asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable) 105 { 106 void (*toggle_la57)(void *cr3); 107 bool l5_required = false; 108 109 /* Initialize boot_params. Required for cmdline_find_option_bool(). */ 110 sanitize_boot_params(bp); 111 boot_params_ptr = bp; 112 113 /* 114 * Check if LA57 is desired and supported. 115 * 116 * There are several parts to the check: 117 * - if user asked to disable 5-level paging: no5lvl in cmdline 118 * - if the machine supports 5-level paging: 119 * + CPUID leaf 7 is supported 120 * + the leaf has the feature bit set 121 */ 122 if (!cmdline_find_option_bool("no5lvl") && 123 native_cpuid_eax(0) >= 7 && (native_cpuid_ecx(7) & BIT(16))) { 124 l5_required = true; 125 126 /* Initialize variables for 5-level paging */ 127 __pgtable_l5_enabled = 1; 128 pgdir_shift = 48; 129 ptrs_per_p4d = 512; 130 } 131 132 /* 133 * The trampoline will not be used if the paging mode is already set to 134 * the desired one. 135 */ 136 if (l5_required == !!(native_read_cr4() & X86_CR4_LA57)) 137 return; 138 139 trampoline_32bit = (unsigned long *)find_trampoline_placement(); 140 141 /* Preserve trampoline memory */ 142 memcpy(trampoline_save, trampoline_32bit, TRAMPOLINE_32BIT_SIZE); 143 144 /* Clear trampoline memory first */ 145 memset(trampoline_32bit, 0, TRAMPOLINE_32BIT_SIZE); 146 147 /* Copy trampoline code in place */ 148 toggle_la57 = memcpy(trampoline_32bit + 149 TRAMPOLINE_32BIT_CODE_OFFSET / sizeof(unsigned long), 150 &trampoline_32bit_src, TRAMPOLINE_32BIT_CODE_SIZE); 151 152 /* 153 * Avoid the need for a stack in the 32-bit trampoline code, by using 154 * LJMP rather than LRET to return back to long mode. LJMP takes an 155 * immediate absolute address, which needs to be adjusted based on the 156 * placement of the trampoline. 157 */ 158 *(u32 *)((u8 *)toggle_la57 + trampoline_ljmp_imm_offset) += 159 (unsigned long)toggle_la57; 160 161 /* 162 * The code below prepares page table in trampoline memory. 163 * 164 * The new page table will be used by trampoline code for switching 165 * from 4- to 5-level paging or vice versa. 166 */ 167 168 if (l5_required) { 169 /* 170 * For 4- to 5-level paging transition, set up current CR3 as 171 * the first and the only entry in a new top-level page table. 172 */ 173 *trampoline_32bit = native_read_cr3_pa() | _PAGE_TABLE_NOENC; 174 } else { 175 u64 *new_cr3; 176 pgd_t *pgdp; 177 178 /* 179 * For 5- to 4-level paging transition, copy page table pointed 180 * by first entry in the current top-level page table as our 181 * new top-level page table. 182 * 183 * We cannot just point to the page table from trampoline as it 184 * may be above 4G. 185 */ 186 pgdp = (pgd_t *)native_read_cr3_pa(); 187 new_cr3 = (u64 *)(native_pgd_val(pgdp[0]) & PTE_PFN_MASK); 188 memcpy(trampoline_32bit, new_cr3, PAGE_SIZE); 189 } 190 191 toggle_la57(trampoline_32bit); 192 193 /* 194 * Move the top level page table out of trampoline memory. 195 */ 196 memcpy(pgtable, trampoline_32bit, PAGE_SIZE); 197 native_write_cr3((unsigned long)pgtable); 198 199 /* Restore trampoline memory */ 200 memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE); 201 } 202