xref: /linux/arch/x86/boot/compressed/head_64.S (revision c01044cc819160323f3ca4acd44fca487c4432e6)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *  linux/boot/head.S
4 *
5 *  Copyright (C) 1991, 1992, 1993  Linus Torvalds
6 */
7
8/*
9 *  head.S contains the 32-bit startup code.
10 *
11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
12 * the page directory will exist. The startup code will be overwritten by
13 * the page directory. [According to comments etc elsewhere on a compressed
14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
15 *
16 * Page 0 is deliberately kept safe, since System Management Mode code in
17 * laptops may need to access the BIOS data stored there.  This is also
18 * useful for future device drivers that either access the BIOS via VM86
19 * mode.
20 */
21
22/*
23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
24 */
25	.code32
26	.text
27
28#include <linux/init.h>
29#include <linux/linkage.h>
30#include <asm/segment.h>
31#include <asm/boot.h>
32#include <asm/msr.h>
33#include <asm/processor-flags.h>
34#include <asm/asm-offsets.h>
35#include <asm/bootparam.h>
36#include "pgtable.h"
37
38/*
39 * Locally defined symbols should be marked hidden:
40 */
41	.hidden _bss
42	.hidden _ebss
43	.hidden _end
44
45	__HEAD
46
47/*
48 * This macro gives the relative virtual address of X, i.e. the offset of X
49 * from startup_32. This is the same as the link-time virtual address of X,
50 * since startup_32 is at 0, but defining it this way tells the
51 * assembler/linker that we do not want the actual run-time address of X. This
52 * prevents the linker from trying to create unwanted run-time relocation
53 * entries for the reference when the compressed kernel is linked as PIE.
54 *
55 * A reference X(%reg) will result in the link-time VA of X being stored with
56 * the instruction, and a run-time R_X86_64_RELATIVE relocation entry that
57 * adds the 64-bit base address where the kernel is loaded.
58 *
59 * Replacing it with (X-startup_32)(%reg) results in the offset being stored,
60 * and no run-time relocation.
61 *
62 * The macro should be used as a displacement with a base register containing
63 * the run-time address of startup_32 [i.e. rva(X)(%reg)], or as an immediate
64 * [$ rva(X)].
65 *
66 * This macro can only be used from within the .head.text section, since the
67 * expression requires startup_32 to be in the same section as the code being
68 * assembled.
69 */
70#define rva(X) ((X) - startup_32)
71
72	.code32
73SYM_FUNC_START(startup_32)
74	/*
75	 * 32bit entry is 0 and it is ABI so immutable!
76	 * If we come here directly from a bootloader,
77	 * kernel(text+data+bss+brk) ramdisk, zero_page, command line
78	 * all need to be under the 4G limit.
79	 */
80	cld
81	cli
82
83/*
84 * Calculate the delta between where we were compiled to run
85 * at and where we were actually loaded at.  This can only be done
86 * with a short local call on x86.  Nothing  else will tell us what
87 * address we are running at.  The reserved chunk of the real-mode
88 * data at 0x1e4 (defined as a scratch field) are used as the stack
89 * for this calculation. Only 4 bytes are needed.
90 */
91	leal	(BP_scratch+4)(%esi), %esp
92	call	1f
931:	popl	%ebp
94	subl	$ rva(1b), %ebp
95
96	/* Load new GDT with the 64bit segments using 32bit descriptor */
97	leal	rva(gdt)(%ebp), %eax
98	movl	%eax, 2(%eax)
99	lgdt	(%eax)
100
101	/* Load segment registers with our descriptors */
102	movl	$__BOOT_DS, %eax
103	movl	%eax, %ds
104	movl	%eax, %es
105	movl	%eax, %fs
106	movl	%eax, %gs
107	movl	%eax, %ss
108
109/* setup a stack and make sure cpu supports long mode. */
110	leal	rva(boot_stack_end)(%ebp), %esp
111
112	call	verify_cpu
113	testl	%eax, %eax
114	jnz	.Lno_longmode
115
116/*
117 * Compute the delta between where we were compiled to run at
118 * and where the code will actually run at.
119 *
120 * %ebp contains the address we are loaded at by the boot loader and %ebx
121 * contains the address where we should move the kernel image temporarily
122 * for safe in-place decompression.
123 */
124
125#ifdef CONFIG_RELOCATABLE
126	movl	%ebp, %ebx
127
128#ifdef CONFIG_EFI_STUB
129/*
130 * If we were loaded via the EFI LoadImage service, startup_32 will be at an
131 * offset to the start of the space allocated for the image. efi_pe_entry will
132 * set up image_offset to tell us where the image actually starts, so that we
133 * can use the full available buffer.
134 *	image_offset = startup_32 - image_base
135 * Otherwise image_offset will be zero and has no effect on the calculations.
136 */
137	subl    rva(image_offset)(%ebp), %ebx
138#endif
139
140	movl	BP_kernel_alignment(%esi), %eax
141	decl	%eax
142	addl	%eax, %ebx
143	notl	%eax
144	andl	%eax, %ebx
145	cmpl	$LOAD_PHYSICAL_ADDR, %ebx
146	jae	1f
147#endif
148	movl	$LOAD_PHYSICAL_ADDR, %ebx
1491:
150
151	/* Target address to relocate to for decompression */
152	addl	BP_init_size(%esi), %ebx
153	subl	$ rva(_end), %ebx
154
155/*
156 * Prepare for entering 64 bit mode
157 */
158
159	/* Enable PAE mode */
160	movl	%cr4, %eax
161	orl	$X86_CR4_PAE, %eax
162	movl	%eax, %cr4
163
164 /*
165  * Build early 4G boot pagetable
166  */
167	/*
168	 * If SEV is active then set the encryption mask in the page tables.
169	 * This will insure that when the kernel is copied and decompressed
170	 * it will be done so encrypted.
171	 */
172	call	get_sev_encryption_bit
173	xorl	%edx, %edx
174	testl	%eax, %eax
175	jz	1f
176	subl	$32, %eax	/* Encryption bit is always above bit 31 */
177	bts	%eax, %edx	/* Set encryption mask for page tables */
1781:
179
180	/* Initialize Page tables to 0 */
181	leal	rva(pgtable)(%ebx), %edi
182	xorl	%eax, %eax
183	movl	$(BOOT_INIT_PGT_SIZE/4), %ecx
184	rep	stosl
185
186	/* Build Level 4 */
187	leal	rva(pgtable + 0)(%ebx), %edi
188	leal	0x1007 (%edi), %eax
189	movl	%eax, 0(%edi)
190	addl	%edx, 4(%edi)
191
192	/* Build Level 3 */
193	leal	rva(pgtable + 0x1000)(%ebx), %edi
194	leal	0x1007(%edi), %eax
195	movl	$4, %ecx
1961:	movl	%eax, 0x00(%edi)
197	addl	%edx, 0x04(%edi)
198	addl	$0x00001000, %eax
199	addl	$8, %edi
200	decl	%ecx
201	jnz	1b
202
203	/* Build Level 2 */
204	leal	rva(pgtable + 0x2000)(%ebx), %edi
205	movl	$0x00000183, %eax
206	movl	$2048, %ecx
2071:	movl	%eax, 0(%edi)
208	addl	%edx, 4(%edi)
209	addl	$0x00200000, %eax
210	addl	$8, %edi
211	decl	%ecx
212	jnz	1b
213
214	/* Enable the boot page tables */
215	leal	rva(pgtable)(%ebx), %eax
216	movl	%eax, %cr3
217
218	/* Enable Long mode in EFER (Extended Feature Enable Register) */
219	movl	$MSR_EFER, %ecx
220	rdmsr
221	btsl	$_EFER_LME, %eax
222	wrmsr
223
224	/* After gdt is loaded */
225	xorl	%eax, %eax
226	lldt	%ax
227	movl    $__BOOT_TSS, %eax
228	ltr	%ax
229
230	/*
231	 * Setup for the jump to 64bit mode
232	 *
233	 * When the jump is performend we will be in long mode but
234	 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
235	 * (and in turn EFER.LMA = 1).	To jump into 64bit mode we use
236	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
237	 * We place all of the values on our mini stack so lret can
238	 * used to perform that far jump.
239	 */
240	leal	rva(startup_64)(%ebp), %eax
241#ifdef CONFIG_EFI_MIXED
242	movl	rva(efi32_boot_args)(%ebp), %edi
243	cmp	$0, %edi
244	jz	1f
245	leal	rva(efi64_stub_entry)(%ebp), %eax
246	movl	rva(efi32_boot_args+4)(%ebp), %esi
247	movl	rva(efi32_boot_args+8)(%ebp), %edx	// saved bootparams pointer
248	cmpl	$0, %edx
249	jnz	1f
250	/*
251	 * efi_pe_entry uses MS calling convention, which requires 32 bytes of
252	 * shadow space on the stack even if all arguments are passed in
253	 * registers. We also need an additional 8 bytes for the space that
254	 * would be occupied by the return address, and this also results in
255	 * the correct stack alignment for entry.
256	 */
257	subl	$40, %esp
258	leal	rva(efi_pe_entry)(%ebp), %eax
259	movl	%edi, %ecx			// MS calling convention
260	movl	%esi, %edx
2611:
262#endif
263	pushl	$__KERNEL_CS
264	pushl	%eax
265
266	/* Enter paged protected Mode, activating Long Mode */
267	movl	$(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
268	movl	%eax, %cr0
269
270	/* Jump from 32bit compatibility mode into 64bit mode. */
271	lret
272SYM_FUNC_END(startup_32)
273
274#ifdef CONFIG_EFI_MIXED
275	.org 0x190
276SYM_FUNC_START(efi32_stub_entry)
277	add	$0x4, %esp		/* Discard return address */
278	popl	%ecx
279	popl	%edx
280	popl	%esi
281
282	call	1f
2831:	pop	%ebp
284	subl	$ rva(1b), %ebp
285
286	movl	%esi, rva(efi32_boot_args+8)(%ebp)
287SYM_INNER_LABEL(efi32_pe_stub_entry, SYM_L_LOCAL)
288	movl	%ecx, rva(efi32_boot_args)(%ebp)
289	movl	%edx, rva(efi32_boot_args+4)(%ebp)
290	movb	$0, rva(efi_is64)(%ebp)
291
292	/* Save firmware GDTR and code/data selectors */
293	sgdtl	rva(efi32_boot_gdt)(%ebp)
294	movw	%cs, rva(efi32_boot_cs)(%ebp)
295	movw	%ds, rva(efi32_boot_ds)(%ebp)
296
297	/* Disable paging */
298	movl	%cr0, %eax
299	btrl	$X86_CR0_PG_BIT, %eax
300	movl	%eax, %cr0
301
302	jmp	startup_32
303SYM_FUNC_END(efi32_stub_entry)
304#endif
305
306	.code64
307	.org 0x200
308SYM_CODE_START(startup_64)
309	/*
310	 * 64bit entry is 0x200 and it is ABI so immutable!
311	 * We come here either from startup_32 or directly from a
312	 * 64bit bootloader.
313	 * If we come here from a bootloader, kernel(text+data+bss+brk),
314	 * ramdisk, zero_page, command line could be above 4G.
315	 * We depend on an identity mapped page table being provided
316	 * that maps our entire kernel(text+data+bss+brk), zero page
317	 * and command line.
318	 */
319
320	cld
321	cli
322
323	/* Setup data segments. */
324	xorl	%eax, %eax
325	movl	%eax, %ds
326	movl	%eax, %es
327	movl	%eax, %ss
328	movl	%eax, %fs
329	movl	%eax, %gs
330
331	/*
332	 * Compute the decompressed kernel start address.  It is where
333	 * we were loaded at aligned to a 2M boundary. %rbp contains the
334	 * decompressed kernel start address.
335	 *
336	 * If it is a relocatable kernel then decompress and run the kernel
337	 * from load address aligned to 2MB addr, otherwise decompress and
338	 * run the kernel from LOAD_PHYSICAL_ADDR
339	 *
340	 * We cannot rely on the calculation done in 32-bit mode, since we
341	 * may have been invoked via the 64-bit entry point.
342	 */
343
344	/* Start with the delta to where the kernel will run at. */
345#ifdef CONFIG_RELOCATABLE
346	leaq	startup_32(%rip) /* - $startup_32 */, %rbp
347
348#ifdef CONFIG_EFI_STUB
349/*
350 * If we were loaded via the EFI LoadImage service, startup_32 will be at an
351 * offset to the start of the space allocated for the image. efi_pe_entry will
352 * set up image_offset to tell us where the image actually starts, so that we
353 * can use the full available buffer.
354 *	image_offset = startup_32 - image_base
355 * Otherwise image_offset will be zero and has no effect on the calculations.
356 */
357	movl    image_offset(%rip), %eax
358	subq	%rax, %rbp
359#endif
360
361	movl	BP_kernel_alignment(%rsi), %eax
362	decl	%eax
363	addq	%rax, %rbp
364	notq	%rax
365	andq	%rax, %rbp
366	cmpq	$LOAD_PHYSICAL_ADDR, %rbp
367	jae	1f
368#endif
369	movq	$LOAD_PHYSICAL_ADDR, %rbp
3701:
371
372	/* Target address to relocate to for decompression */
373	movl	BP_init_size(%rsi), %ebx
374	subl	$ rva(_end), %ebx
375	addq	%rbp, %rbx
376
377	/* Set up the stack */
378	leaq	rva(boot_stack_end)(%rbx), %rsp
379
380	/*
381	 * At this point we are in long mode with 4-level paging enabled,
382	 * but we might want to enable 5-level paging or vice versa.
383	 *
384	 * The problem is that we cannot do it directly. Setting or clearing
385	 * CR4.LA57 in long mode would trigger #GP. So we need to switch off
386	 * long mode and paging first.
387	 *
388	 * We also need a trampoline in lower memory to switch over from
389	 * 4- to 5-level paging for cases when the bootloader puts the kernel
390	 * above 4G, but didn't enable 5-level paging for us.
391	 *
392	 * The same trampoline can be used to switch from 5- to 4-level paging
393	 * mode, like when starting 4-level paging kernel via kexec() when
394	 * original kernel worked in 5-level paging mode.
395	 *
396	 * For the trampoline, we need the top page table to reside in lower
397	 * memory as we don't have a way to load 64-bit values into CR3 in
398	 * 32-bit mode.
399	 *
400	 * We go though the trampoline even if we don't have to: if we're
401	 * already in a desired paging mode. This way the trampoline code gets
402	 * tested on every boot.
403	 */
404
405	/* Make sure we have GDT with 32-bit code segment */
406	leaq	gdt64(%rip), %rax
407	addq	%rax, 2(%rax)
408	lgdt	(%rax)
409
410	/* Reload CS so IRET returns to a CS actually in the GDT */
411	pushq	$__KERNEL_CS
412	leaq	.Lon_kernel_cs(%rip), %rax
413	pushq	%rax
414	lretq
415
416.Lon_kernel_cs:
417
418	/*
419	 * paging_prepare() sets up the trampoline and checks if we need to
420	 * enable 5-level paging.
421	 *
422	 * paging_prepare() returns a two-quadword structure which lands
423	 * into RDX:RAX:
424	 *   - Address of the trampoline is returned in RAX.
425	 *   - Non zero RDX means trampoline needs to enable 5-level
426	 *     paging.
427	 *
428	 * RSI holds real mode data and needs to be preserved across
429	 * this function call.
430	 */
431	pushq	%rsi
432	movq	%rsi, %rdi		/* real mode address */
433	call	paging_prepare
434	popq	%rsi
435
436	/* Save the trampoline address in RCX */
437	movq	%rax, %rcx
438
439	/*
440	 * Load the address of trampoline_return() into RDI.
441	 * It will be used by the trampoline to return to the main code.
442	 */
443	leaq	trampoline_return(%rip), %rdi
444
445	/* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
446	pushq	$__KERNEL32_CS
447	leaq	TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
448	pushq	%rax
449	lretq
450trampoline_return:
451	/* Restore the stack, the 32-bit trampoline uses its own stack */
452	leaq	rva(boot_stack_end)(%rbx), %rsp
453
454	/*
455	 * cleanup_trampoline() would restore trampoline memory.
456	 *
457	 * RDI is address of the page table to use instead of page table
458	 * in trampoline memory (if required).
459	 *
460	 * RSI holds real mode data and needs to be preserved across
461	 * this function call.
462	 */
463	pushq	%rsi
464	leaq	rva(top_pgtable)(%rbx), %rdi
465	call	cleanup_trampoline
466	popq	%rsi
467
468	/* Zero EFLAGS */
469	pushq	$0
470	popfq
471
472/*
473 * Copy the compressed kernel to the end of our buffer
474 * where decompression in place becomes safe.
475 */
476	pushq	%rsi
477	leaq	(_bss-8)(%rip), %rsi
478	leaq	rva(_bss-8)(%rbx), %rdi
479	movl	$(_bss - startup_32), %ecx
480	shrl	$3, %ecx
481	std
482	rep	movsq
483	cld
484	popq	%rsi
485
486	/*
487	 * The GDT may get overwritten either during the copy we just did or
488	 * during extract_kernel below. To avoid any issues, repoint the GDTR
489	 * to the new copy of the GDT.
490	 */
491	leaq	rva(gdt64)(%rbx), %rax
492	leaq	rva(gdt)(%rbx), %rdx
493	movq	%rdx, 2(%rax)
494	lgdt	(%rax)
495
496/*
497 * Jump to the relocated address.
498 */
499	leaq	rva(.Lrelocated)(%rbx), %rax
500	jmp	*%rax
501SYM_CODE_END(startup_64)
502
503#ifdef CONFIG_EFI_STUB
504	.org 0x390
505SYM_FUNC_START(efi64_stub_entry)
506SYM_FUNC_START_ALIAS(efi_stub_entry)
507	and	$~0xf, %rsp			/* realign the stack */
508	movq	%rdx, %rbx			/* save boot_params pointer */
509	call	efi_main
510	movq	%rbx,%rsi
511	leaq	rva(startup_64)(%rax), %rax
512	jmp	*%rax
513SYM_FUNC_END(efi64_stub_entry)
514SYM_FUNC_END_ALIAS(efi_stub_entry)
515#endif
516
517	.text
518SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated)
519
520/*
521 * Clear BSS (stack is currently empty)
522 */
523	xorl	%eax, %eax
524	leaq    _bss(%rip), %rdi
525	leaq    _ebss(%rip), %rcx
526	subq	%rdi, %rcx
527	shrq	$3, %rcx
528	rep	stosq
529
530/*
531 * Do the extraction, and jump to the new kernel..
532 */
533	pushq	%rsi			/* Save the real mode argument */
534	movq	%rsi, %rdi		/* real mode address */
535	leaq	boot_heap(%rip), %rsi	/* malloc area for uncompression */
536	leaq	input_data(%rip), %rdx  /* input_data */
537	movl	input_len(%rip), %ecx	/* input_len */
538	movq	%rbp, %r8		/* output target address */
539	movl	output_len(%rip), %r9d	/* decompressed length, end of relocs */
540	call	extract_kernel		/* returns kernel location in %rax */
541	popq	%rsi
542
543/*
544 * Jump to the decompressed kernel.
545 */
546	jmp	*%rax
547SYM_FUNC_END(.Lrelocated)
548
549	.code32
550/*
551 * This is the 32-bit trampoline that will be copied over to low memory.
552 *
553 * RDI contains the return address (might be above 4G).
554 * ECX contains the base address of the trampoline memory.
555 * Non zero RDX means trampoline needs to enable 5-level paging.
556 */
557SYM_CODE_START(trampoline_32bit_src)
558	/* Set up data and stack segments */
559	movl	$__KERNEL_DS, %eax
560	movl	%eax, %ds
561	movl	%eax, %ss
562
563	/* Set up new stack */
564	leal	TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
565
566	/* Disable paging */
567	movl	%cr0, %eax
568	btrl	$X86_CR0_PG_BIT, %eax
569	movl	%eax, %cr0
570
571	/* Check what paging mode we want to be in after the trampoline */
572	cmpl	$0, %edx
573	jz	1f
574
575	/* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
576	movl	%cr4, %eax
577	testl	$X86_CR4_LA57, %eax
578	jnz	3f
579	jmp	2f
5801:
581	/* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */
582	movl	%cr4, %eax
583	testl	$X86_CR4_LA57, %eax
584	jz	3f
5852:
586	/* Point CR3 to the trampoline's new top level page table */
587	leal	TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
588	movl	%eax, %cr3
5893:
590	/* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
591	pushl	%ecx
592	pushl	%edx
593	movl	$MSR_EFER, %ecx
594	rdmsr
595	btsl	$_EFER_LME, %eax
596	wrmsr
597	popl	%edx
598	popl	%ecx
599
600	/* Enable PAE and LA57 (if required) paging modes */
601	movl	$X86_CR4_PAE, %eax
602	cmpl	$0, %edx
603	jz	1f
604	orl	$X86_CR4_LA57, %eax
6051:
606	movl	%eax, %cr4
607
608	/* Calculate address of paging_enabled() once we are executing in the trampoline */
609	leal	.Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
610
611	/* Prepare the stack for far return to Long Mode */
612	pushl	$__KERNEL_CS
613	pushl	%eax
614
615	/* Enable paging again */
616	movl	$(X86_CR0_PG | X86_CR0_PE), %eax
617	movl	%eax, %cr0
618
619	lret
620SYM_CODE_END(trampoline_32bit_src)
621
622	.code64
623SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)
624	/* Return from the trampoline */
625	jmp	*%rdi
626SYM_FUNC_END(.Lpaging_enabled)
627
628	/*
629         * The trampoline code has a size limit.
630         * Make sure we fail to compile if the trampoline code grows
631         * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes.
632	 */
633	.org	trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
634
635	.code32
636SYM_FUNC_START_LOCAL_NOALIGN(.Lno_longmode)
637	/* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
6381:
639	hlt
640	jmp     1b
641SYM_FUNC_END(.Lno_longmode)
642
643#include "../../kernel/verify_cpu.S"
644
645	.data
646SYM_DATA_START_LOCAL(gdt64)
647	.word	gdt_end - gdt - 1
648	.quad   gdt - gdt64
649SYM_DATA_END(gdt64)
650	.balign	8
651SYM_DATA_START_LOCAL(gdt)
652	.word	gdt_end - gdt - 1
653	.long	0
654	.word	0
655	.quad	0x00cf9a000000ffff	/* __KERNEL32_CS */
656	.quad	0x00af9a000000ffff	/* __KERNEL_CS */
657	.quad	0x00cf92000000ffff	/* __KERNEL_DS */
658	.quad	0x0080890000000000	/* TS descriptor */
659	.quad   0x0000000000000000	/* TS continued */
660SYM_DATA_END_LABEL(gdt, SYM_L_LOCAL, gdt_end)
661
662#ifdef CONFIG_EFI_STUB
663SYM_DATA(image_offset, .long 0)
664#endif
665
666#ifdef CONFIG_EFI_MIXED
667SYM_DATA_LOCAL(efi32_boot_args, .long 0, 0, 0)
668SYM_DATA(efi_is64, .byte 1)
669
670#define ST32_boottime		60 // offsetof(efi_system_table_32_t, boottime)
671#define BS32_handle_protocol	88 // offsetof(efi_boot_services_32_t, handle_protocol)
672#define LI32_image_base		32 // offsetof(efi_loaded_image_32_t, image_base)
673
674	__HEAD
675	.code32
676SYM_FUNC_START(efi32_pe_entry)
677/*
678 * efi_status_t efi32_pe_entry(efi_handle_t image_handle,
679 *			       efi_system_table_32_t *sys_table)
680 */
681
682	pushl	%ebp
683	movl	%esp, %ebp
684	pushl	%eax				// dummy push to allocate loaded_image
685
686	pushl	%ebx				// save callee-save registers
687	pushl	%edi
688
689	call	verify_cpu			// check for long mode support
690	testl	%eax, %eax
691	movl	$0x80000003, %eax		// EFI_UNSUPPORTED
692	jnz	2f
693
694	call	1f
6951:	pop	%ebx
696	subl	$ rva(1b), %ebx
697
698	/* Get the loaded image protocol pointer from the image handle */
699	leal	-4(%ebp), %eax
700	pushl	%eax				// &loaded_image
701	leal	rva(loaded_image_proto)(%ebx), %eax
702	pushl	%eax				// pass the GUID address
703	pushl	8(%ebp)				// pass the image handle
704
705	/*
706	 * Note the alignment of the stack frame.
707	 *   sys_table
708	 *   handle             <-- 16-byte aligned on entry by ABI
709	 *   return address
710	 *   frame pointer
711	 *   loaded_image       <-- local variable
712	 *   saved %ebx		<-- 16-byte aligned here
713	 *   saved %edi
714	 *   &loaded_image
715	 *   &loaded_image_proto
716	 *   handle             <-- 16-byte aligned for call to handle_protocol
717	 */
718
719	movl	12(%ebp), %eax			// sys_table
720	movl	ST32_boottime(%eax), %eax	// sys_table->boottime
721	call	*BS32_handle_protocol(%eax)	// sys_table->boottime->handle_protocol
722	addl	$12, %esp			// restore argument space
723	testl	%eax, %eax
724	jnz	2f
725
726	movl	8(%ebp), %ecx			// image_handle
727	movl	12(%ebp), %edx			// sys_table
728	movl	-4(%ebp), %esi			// loaded_image
729	movl	LI32_image_base(%esi), %esi	// loaded_image->image_base
730	movl	%ebx, %ebp			// startup_32 for efi32_pe_stub_entry
731	/*
732	 * We need to set the image_offset variable here since startup_32() will
733	 * use it before we get to the 64-bit efi_pe_entry() in C code.
734	 */
735	subl	%esi, %ebx
736	movl	%ebx, rva(image_offset)(%ebp)	// save image_offset
737	jmp	efi32_pe_stub_entry
738
7392:	popl	%edi				// restore callee-save registers
740	popl	%ebx
741	leave
742	ret
743SYM_FUNC_END(efi32_pe_entry)
744
745	.section ".rodata"
746	/* EFI loaded image protocol GUID */
747	.balign 4
748SYM_DATA_START_LOCAL(loaded_image_proto)
749	.long	0x5b1b31a1
750	.word	0x9562, 0x11d2
751	.byte	0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b
752SYM_DATA_END(loaded_image_proto)
753#endif
754
755/*
756 * Stack and heap for uncompression
757 */
758	.bss
759	.balign 4
760SYM_DATA_LOCAL(boot_heap,	.fill BOOT_HEAP_SIZE, 1, 0)
761
762SYM_DATA_START_LOCAL(boot_stack)
763	.fill BOOT_STACK_SIZE, 1, 0
764	.balign 16
765SYM_DATA_END_LABEL(boot_stack, SYM_L_LOCAL, boot_stack_end)
766
767/*
768 * Space for page tables (not in .bss so not zeroed)
769 */
770	.section ".pgtable","aw",@nobits
771	.balign 4096
772SYM_DATA_LOCAL(pgtable,		.fill BOOT_PGT_SIZE, 1, 0)
773
774/*
775 * The page table is going to be used instead of page table in the trampoline
776 * memory.
777 */
778SYM_DATA_LOCAL(top_pgtable,	.fill PAGE_SIZE, 1, 0)
779