xref: /linux/arch/x86/Kconfig.cpu (revision 5ea5880764cbb164afb17a62e76ca75dc371409d)
1# SPDX-License-Identifier: GPL-2.0
2# Put here option for CPU selection and depending optimization
3choice
4	prompt "x86-32 Processor family"
5	depends on X86_32
6	default M686
7	help
8	  This is the processor type of your CPU. This information is
9	  used for optimizing purposes. In order to compile a kernel
10	  that can run on all supported x86 CPU types (albeit not
11	  optimally fast), you can specify "586" here.
12
13	  Note that the 386 and 486 is no longer supported, this includes
14	  AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
15	  UMC 486SX-S and the NexGen Nx586, AMD ELAN and all 486 based
16	  CPUs.
17
18	  The kernel will not necessarily run on earlier architectures than
19	  the one you have chosen, e.g. a Pentium optimized kernel will run on
20	  a PPro, but not necessarily on a i486.
21
22	  Here are the settings recommended for greatest speed:
23	  - "586" for generic Pentium CPUs lacking the TSC
24	    (time stamp counter) register.
25	  - "Pentium-Classic" for the Intel Pentium.
26	  - "Pentium-MMX" for the Intel Pentium MMX.
27	  - "Pentium-Pro" for the Intel Pentium Pro.
28	  - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
29	  - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
30	  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
31	  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
32	  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
33	  - "Crusoe" for the Transmeta Crusoe series.
34	  - "Efficeon" for the Transmeta Efficeon series.
35	  - "Winchip-C6" for original IDT Winchip.
36	  - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
37	  - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
38	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
39	  - "Geode GX/LX" For AMD Geode GX and LX processors.
40	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
41	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
42	  - "VIA C7" for VIA C7.
43	  - "Intel Atom" for the Atom-microarchitecture CPUs.
44
45	  See each option's help text for additional details. If you don't know
46	  what to do, choose "Pentium-Pro".
47
48config M586
49	bool "586/K5/5x86/6x86/6x86MX"
50	depends on X86_32
51	help
52	  Select this for an 586 or 686 series processor such as the AMD K5,
53	  the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
54	  assume the RDTSC (Read Time Stamp Counter) instruction.
55
56config M586TSC
57	bool "Pentium-Classic"
58	depends on X86_32
59	help
60	  Select this for a Pentium Classic processor with the RDTSC (Read
61	  Time Stamp Counter) instruction for benchmarking.
62
63config M586MMX
64	bool "Pentium-MMX"
65	depends on X86_32
66	help
67	  Select this for a Pentium with the MMX graphics/multimedia
68	  extended instructions.
69
70config M686
71	bool "Pentium-Pro"
72	depends on X86_32
73	help
74	  Select this for Intel Pentium Pro chips.  This enables the use of
75	  Pentium Pro extended instructions, and disables the init-time guard
76	  against the f00f bug found in earlier Pentiums.
77
78config MPENTIUMII
79	bool "Pentium-II/Celeron(pre-Coppermine)"
80	depends on X86_32
81	help
82	  Select this for Intel chips based on the Pentium-II and
83	  pre-Coppermine Celeron core.  This option enables an unaligned
84	  copy optimization, compiles the kernel with optimization flags
85	  tailored for the chip, and applies any applicable Pentium Pro
86	  optimizations.
87
88config MPENTIUMIII
89	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
90	depends on X86_32
91	help
92	  Select this for Intel chips based on the Pentium-III and
93	  Celeron-Coppermine core.  This option enables use of some
94	  extended prefetch instructions in addition to the Pentium II
95	  extensions.
96
97config MPENTIUMM
98	bool "Pentium M/Pentium Dual Core/Core Solo/Core Duo"
99	depends on X86_32
100	help
101	  Select this for Intel Pentium M (not Pentium-4 M)
102	  "Merom" Core Solo/Duo notebook chips
103
104config MPENTIUM4
105	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
106	depends on X86_32
107	help
108	  Select this for Intel Pentium 4 chips.  This includes the
109	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and
110	  Pentium-4 M (not Pentium M) chips.  This option enables compile
111	  flags optimized for the chip, uses the correct cache line size, and
112	  applies any applicable optimizations.
113
114	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
115
116	  Select this for:
117	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
118		-Willamette
119		-Northwood
120		-Mobile Pentium 4
121		-Mobile Pentium 4 M
122		-Extreme Edition (Gallatin)
123	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
124		-Foster
125		-Prestonia
126		-Gallatin
127
128config MK6
129	bool "K6/K6-II/K6-III"
130	depends on X86_32
131	help
132	  Select this for an AMD K6-family processor.  Enables use of
133	  some extended instructions, and passes appropriate optimization
134	  flags to GCC.
135
136config MK7
137	bool "Athlon/Duron/K7"
138	depends on X86_32
139	help
140	  Select this for an AMD Athlon K7-family processor.  Enables use of
141	  some extended instructions, and passes appropriate optimization
142	  flags to GCC.
143
144config MCRUSOE
145	bool "Crusoe"
146	depends on X86_32
147	help
148	  Select this for a Transmeta Crusoe processor.  Treats the processor
149	  like a 586 with TSC, and sets some GCC optimization flags (like a
150	  Pentium Pro with no alignment requirements).
151
152config MEFFICEON
153	bool "Efficeon"
154	depends on X86_32
155	help
156	  Select this for a Transmeta Efficeon processor.
157
158config MWINCHIPC6
159	bool "Winchip-C6"
160	depends on X86_32
161	help
162	  Select this for an IDT Winchip C6 chip.  Linux and GCC
163	  treat this chip as a 586TSC with some extended instructions
164	  and alignment requirements.
165
166config MWINCHIP3D
167	bool "Winchip-2/Winchip-2A/Winchip-3"
168	depends on X86_32
169	help
170	  Select this for an IDT Winchip-2, 2A or 3.  Linux and GCC
171	  treat this chip as a 586TSC with some extended instructions
172	  and alignment requirements.  Also enable out of order memory
173	  stores for this CPU, which can increase performance of some
174	  operations.
175
176config MGEODEGX1
177	bool "GeodeGX1"
178	depends on X86_32
179	help
180	  Select this for a Geode GX1 (Cyrix MediaGX) chip.
181
182config MGEODE_LX
183	bool "Geode GX/LX"
184	depends on X86_32
185	help
186	  Select this for AMD Geode GX and LX processors.
187
188config MCYRIXIII
189	bool "CyrixIII/VIA-C3"
190	depends on X86_32
191	help
192	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
193	  treat this chip as a generic 586. Whilst the CPU is 686 class,
194	  it lacks the cmov extension which gcc assumes is present when
195	  generating 686 code.
196	  Note that Nehemiah (Model 9) and above will not boot with this
197	  kernel due to them lacking the 3DNow! instructions used in earlier
198	  incarnations of the CPU.
199
200config MVIAC3_2
201	bool "VIA C3-2 (Nehemiah)"
202	depends on X86_32
203	help
204	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
205	  of SSE and tells gcc to treat the CPU as a 686.
206	  Note, this kernel will not boot on older (pre model 9) C3s.
207
208config MVIAC7
209	bool "VIA C7"
210	depends on X86_32
211	help
212	  Select this for a VIA C7.  Selecting this uses the correct cache
213	  shift and tells gcc to treat the CPU as a 686.
214
215config MATOM
216	bool "Intel Atom"
217	help
218	  Select this for the Intel Atom platform. Intel Atom CPUs have an
219	  in-order pipelining architecture and thus can benefit from
220	  accordingly optimized code. Use a recent GCC with specific Atom
221	  support in order to fully benefit from selecting this option.
222
223endchoice
224
225config CC_HAS_MARCH_NATIVE
226	# This flag might not be available in cross-compilers:
227	def_bool $(cc-option, -march=native)
228	# LLVM 18 has an easily triggered internal compiler error in core
229	# networking code with '-march=native' on certain systems:
230	# https://github.com/llvm/llvm-project/issues/72026
231	# LLVM 19 introduces an optimization that resolves some high stack
232	# usage warnings that only appear wth '-march=native'.
233	depends on CC_IS_GCC || CLANG_VERSION >= 190100
234
235config X86_NATIVE_CPU
236	bool "Build and optimize for local/native CPU"
237	depends on X86_64
238	depends on CC_HAS_MARCH_NATIVE
239	help
240	  Optimize for the current CPU used to compile the kernel.
241	  Use this option if you intend to build the kernel for your
242	  local machine.
243
244	  Note that such a kernel might not work optimally on a
245	  different x86 machine.
246
247	  If unsure, say N.
248
249config X86_GENERIC
250	bool "Generic x86 support"
251	depends on X86_32
252	help
253	  Instead of just including optimizations for the selected
254	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
255	  generic optimizations as well. This will make the kernel
256	  perform better on x86 CPUs other than that selected.
257
258	  This is really intended for distributors who need more
259	  generic optimizations.
260
261#
262# Define implied options from the CPU selection here
263config X86_INTERNODE_CACHE_SHIFT
264	int
265	default "12" if X86_VSMP
266	default X86_L1_CACHE_SHIFT
267
268config X86_L1_CACHE_SHIFT
269	int
270	default "7" if MPENTIUM4
271	default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X86_64
272	default "4" if MGEODEGX1
273	default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
274
275config X86_F00F_BUG
276	def_bool y
277	depends on M586MMX || M586TSC || M586
278
279config X86_INVD_BUG
280	def_bool y
281	depends on M486SX || M486
282
283config X86_ALIGNMENT_16
284	def_bool y
285	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
286
287config X86_INTEL_USERCOPY
288	def_bool y
289	depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK7 || MEFFICEON
290
291config X86_USE_PPRO_CHECKSUM
292	def_bool y
293	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM
294
295config X86_TSC
296	def_bool y
297	depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MATOM) || X86_64
298
299config X86_HAVE_PAE
300	def_bool y
301	depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC7 || MATOM || X86_64
302
303config X86_CX8
304	def_bool y
305	depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7 || MGEODEGX1 || MGEODE_LX
306
307# this should be set for all -march=.. options where the compiler
308# generates cmov.
309config X86_CMOV
310	def_bool y
311	depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || MATOM || MGEODE_LX || X86_64)
312
313config X86_MINIMUM_CPU_FAMILY
314	int
315	default "64" if X86_64
316	default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MK7)
317	default "5"
318
319config X86_DEBUGCTLMSR
320	def_bool y
321	depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586) && !UML
322
323config IA32_FEAT_CTL
324	def_bool y
325	depends on CPU_SUP_INTEL || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN
326
327config X86_VMX_FEATURE_NAMES
328	def_bool y
329	depends on IA32_FEAT_CTL
330
331menuconfig PROCESSOR_SELECT
332	bool "Supported processor vendors" if EXPERT
333	help
334	  This lets you choose what x86 vendor support code your kernel
335	  will include.
336
337config BROADCAST_TLB_FLUSH
338	def_bool y
339	depends on CPU_SUP_AMD && 64BIT
340
341config CPU_SUP_INTEL
342	default y
343	bool "Support Intel processors" if PROCESSOR_SELECT
344	help
345	  This enables detection, tunings and quirks for Intel processors
346
347	  You need this enabled if you want your kernel to run on an
348	  Intel CPU. Disabling this option on other types of CPUs
349	  makes the kernel a tiny bit smaller. Disabling it on an Intel
350	  CPU might render the kernel unbootable.
351
352	  If unsure, say N.
353
354config CPU_SUP_CYRIX_32
355	default y
356	bool "Support Cyrix processors" if PROCESSOR_SELECT
357	depends on M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
358	help
359	  This enables detection, tunings and quirks for Cyrix processors
360
361	  You need this enabled if you want your kernel to run on a
362	  Cyrix CPU. Disabling this option on other types of CPUs
363	  makes the kernel a tiny bit smaller. Disabling it on a Cyrix
364	  CPU might render the kernel unbootable.
365
366	  If unsure, say N.
367
368config CPU_SUP_AMD
369	default y
370	bool "Support AMD processors" if PROCESSOR_SELECT
371	help
372	  This enables detection, tunings and quirks for AMD processors
373
374	  You need this enabled if you want your kernel to run on an
375	  AMD CPU. Disabling this option on other types of CPUs
376	  makes the kernel a tiny bit smaller. Disabling it on an AMD
377	  CPU might render the kernel unbootable.
378
379	  If unsure, say N.
380
381config CPU_SUP_HYGON
382	default y
383	bool "Support Hygon processors" if PROCESSOR_SELECT
384	select CPU_SUP_AMD
385	help
386	  This enables detection, tunings and quirks for Hygon processors
387
388	  You need this enabled if you want your kernel to run on an
389	  Hygon CPU. Disabling this option on other types of CPUs
390	  makes the kernel a tiny bit smaller. Disabling it on an Hygon
391	  CPU might render the kernel unbootable.
392
393	  If unsure, say N.
394
395config CPU_SUP_CENTAUR
396	default y
397	bool "Support Centaur processors" if PROCESSOR_SELECT
398	help
399	  This enables detection, tunings and quirks for Centaur processors
400
401	  You need this enabled if you want your kernel to run on a
402	  Centaur CPU. Disabling this option on other types of CPUs
403	  makes the kernel a tiny bit smaller. Disabling it on a Centaur
404	  CPU might render the kernel unbootable.
405
406	  If unsure, say N.
407
408config CPU_SUP_TRANSMETA_32
409	default y
410	bool "Support Transmeta processors" if PROCESSOR_SELECT
411	depends on !64BIT
412	help
413	  This enables detection, tunings and quirks for Transmeta processors
414
415	  You need this enabled if you want your kernel to run on a
416	  Transmeta CPU. Disabling this option on other types of CPUs
417	  makes the kernel a tiny bit smaller. Disabling it on a Transmeta
418	  CPU might render the kernel unbootable.
419
420	  If unsure, say N.
421
422config CPU_SUP_UMC_32
423	default y
424	bool "Support UMC processors" if PROCESSOR_SELECT
425	depends on M486SX || M486 || (EXPERT && !64BIT)
426	help
427	  This enables detection, tunings and quirks for UMC processors
428
429	  You need this enabled if you want your kernel to run on a
430	  UMC CPU. Disabling this option on other types of CPUs
431	  makes the kernel a tiny bit smaller. Disabling it on a UMC
432	  CPU might render the kernel unbootable.
433
434	  If unsure, say N.
435
436config CPU_SUP_ZHAOXIN
437	default y
438	bool "Support Zhaoxin processors" if PROCESSOR_SELECT
439	help
440	  This enables detection, tunings and quirks for Zhaoxin processors
441
442	  You need this enabled if you want your kernel to run on a
443	  Zhaoxin CPU. Disabling this option on other types of CPUs
444	  makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin
445	  CPU might render the kernel unbootable.
446
447	  If unsure, say N.
448
449config CPU_SUP_VORTEX_32
450	default y
451	bool "Support Vortex processors" if PROCESSOR_SELECT
452	depends on X86_32
453	help
454	  This enables detection, tunings and quirks for Vortex processors
455
456	  You need this enabled if you want your kernel to run on a
457	  Vortex CPU. Disabling this option on other types of CPUs
458	  makes the kernel a tiny bit smaller.
459
460	  If unsure, say N.
461