xref: /linux/arch/um/include/asm/pgtable.h (revision e2683c8868d03382da7e1ce8453b543a043066d1) 
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
4  * Copyright 2003 PathScale, Inc.
5  * Derived from include/asm-i386/pgtable.h
6  */
7 
8 #ifndef __UM_PGTABLE_H
9 #define __UM_PGTABLE_H
10 
11 #include <asm/page.h>
12 #include <linux/mm_types.h>
13 
14 #define _PAGE_PRESENT	0x001
15 #define _PAGE_NEEDSYNC	0x002
16 #define _PAGE_RW	0x020
17 #define _PAGE_USER	0x040
18 #define _PAGE_ACCESSED	0x080
19 #define _PAGE_DIRTY	0x100
20 /* If _PAGE_PRESENT is clear, we use these: */
21 #define _PAGE_PROTNONE	0x010	/* if the user mapped it with PROT_NONE;
22 				   pte_present gives true */
23 
24 /* We borrow bit 10 to store the exclusive marker in swap PTEs. */
25 #define _PAGE_SWP_EXCLUSIVE	0x400
26 
27 #if CONFIG_PGTABLE_LEVELS == 4
28 #include <asm/pgtable-4level.h>
29 #elif CONFIG_PGTABLE_LEVELS == 2
30 #include <asm/pgtable-2level.h>
31 #else
32 #error "Unsupported number of page table levels"
33 #endif
34 
35 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
36 
37 /* Just any arbitrary offset to the start of the vmalloc VM area: the
38  * current 8MB value just means that there will be a 8MB "hole" after the
39  * physical memory until the kernel virtual memory starts.  That means that
40  * any out-of-bounds memory accesses will hopefully be caught.
41  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
42  * area for the same reason. ;)
43  */
44 
45 #ifndef COMPILE_OFFSETS
46 #include <as-layout.h> /* for high_physmem */
47 #endif
48 
49 #define VMALLOC_OFFSET	(__va_space)
50 #define VMALLOC_START	((high_physmem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
51 #define VMALLOC_END	(TASK_SIZE-2*PAGE_SIZE)
52 #define MODULES_VADDR	VMALLOC_START
53 #define MODULES_END	VMALLOC_END
54 
55 #define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
56 #define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
57 #define _PAGE_CHG_MASK	(PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
58 #define __PAGE_KERNEL_EXEC                                              \
59 	 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
60 #define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
61 #define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
62 #define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
63 #define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
64 #define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
65 #define PAGE_KERNEL_EXEC	__pgprot(__PAGE_KERNEL_EXEC)
66 
67 /*
68  * The i386 can't do page protection for execute, and considers that the same
69  * are read.
70  * Also, write permissions imply read permissions. This is the closest we can
71  * get..
72  */
73 
74 #define pte_clear(mm, addr, xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEEDSYNC))
75 
76 #define pmd_none(x)	(!((unsigned long)pmd_val(x) & ~_PAGE_NEEDSYNC))
77 #define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
78 
79 #define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
80 #define pmd_clear(xp)	do { pmd_val(*(xp)) = _PAGE_NEEDSYNC; } while (0)
81 
82 #define pmd_needsync(x)   (pmd_val(x) & _PAGE_NEEDSYNC)
83 #define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEEDSYNC)
84 
85 #define pud_needsync(x)   (pud_val(x) & _PAGE_NEEDSYNC)
86 #define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEEDSYNC)
87 
88 #define p4d_needsync(x)   (p4d_val(x) & _PAGE_NEEDSYNC)
89 #define p4d_mkuptodate(x) (p4d_val(x) &= ~_PAGE_NEEDSYNC)
90 
91 #define pmd_pfn(pmd) (pmd_val(pmd) >> PAGE_SHIFT)
92 #define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
93 
94 #define pte_page(x) pfn_to_page(pte_pfn(x))
95 
96 #define pte_present(x)	pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
97 
98 /*
99  * =================================
100  * Flags checking section.
101  * =================================
102  */
103 
104 static inline int pte_none(pte_t pte)
105 {
106 	return pte_is_zero(pte);
107 }
108 
109 /*
110  * The following only work if pte_present() is true.
111  * Undefined behaviour if not..
112  */
113 static inline int pte_read(pte_t pte)
114 {
115 	return !pte_get_bits(pte, _PAGE_PROTNONE);
116 }
117 
118 static inline int pte_exec(pte_t pte)
119 {
120 	return !pte_get_bits(pte, _PAGE_PROTNONE);
121 }
122 
123 static inline int pte_write(pte_t pte)
124 {
125 	return((pte_get_bits(pte, _PAGE_RW)) &&
126 	       !(pte_get_bits(pte, _PAGE_PROTNONE)));
127 }
128 
129 static inline int pte_dirty(pte_t pte)
130 {
131 	return pte_get_bits(pte, _PAGE_DIRTY);
132 }
133 
134 static inline int pte_young(pte_t pte)
135 {
136 	return pte_get_bits(pte, _PAGE_ACCESSED);
137 }
138 
139 static inline int pte_needsync(pte_t pte)
140 {
141 	return pte_get_bits(pte, _PAGE_NEEDSYNC);
142 }
143 
144 /*
145  * =================================
146  * Flags setting section.
147  * =================================
148  */
149 
150 static inline pte_t pte_mkclean(pte_t pte)
151 {
152 	pte_clear_bits(pte, _PAGE_DIRTY);
153 	return(pte);
154 }
155 
156 static inline pte_t pte_mkold(pte_t pte)
157 {
158 	pte_clear_bits(pte, _PAGE_ACCESSED);
159 	return(pte);
160 }
161 
162 static inline pte_t pte_wrprotect(pte_t pte)
163 {
164 	pte_clear_bits(pte, _PAGE_RW);
165 	return pte;
166 }
167 
168 static inline pte_t pte_mkread(pte_t pte)
169 {
170 	pte_set_bits(pte, _PAGE_USER);
171 	return pte;
172 }
173 
174 static inline pte_t pte_mkdirty(pte_t pte)
175 {
176 	pte_set_bits(pte, _PAGE_DIRTY);
177 	return(pte);
178 }
179 
180 static inline pte_t pte_mkyoung(pte_t pte)
181 {
182 	pte_set_bits(pte, _PAGE_ACCESSED);
183 	return(pte);
184 }
185 
186 static inline pte_t pte_mkwrite_novma(pte_t pte)
187 {
188 	pte_set_bits(pte, _PAGE_RW);
189 	return pte;
190 }
191 
192 static inline pte_t pte_mkuptodate(pte_t pte)
193 {
194 	pte_clear_bits(pte, _PAGE_NEEDSYNC);
195 	return pte;
196 }
197 
198 static inline pte_t pte_mkneedsync(pte_t pte)
199 {
200 	pte_set_bits(pte, _PAGE_NEEDSYNC);
201 	return(pte);
202 }
203 
204 static inline void set_pte(pte_t *pteptr, pte_t pteval)
205 {
206 	pte_copy(*pteptr, pteval);
207 
208 	/* If it's a swap entry, it needs to be marked _PAGE_NEEDSYNC so
209 	 * update_pte_range knows to unmap it.
210 	 */
211 
212 	*pteptr = pte_mkneedsync(*pteptr);
213 }
214 
215 #define PFN_PTE_SHIFT		PAGE_SHIFT
216 
217 static inline void um_tlb_mark_sync(struct mm_struct *mm, unsigned long start,
218 				    unsigned long end)
219 {
220 	guard(spinlock_irqsave)(&mm->context.sync_tlb_lock);
221 
222 	if (!mm->context.sync_tlb_range_to) {
223 		mm->context.sync_tlb_range_from = start;
224 		mm->context.sync_tlb_range_to = end;
225 	} else {
226 		if (start < mm->context.sync_tlb_range_from)
227 			mm->context.sync_tlb_range_from = start;
228 		if (end > mm->context.sync_tlb_range_to)
229 			mm->context.sync_tlb_range_to = end;
230 	}
231 }
232 
233 #define set_ptes set_ptes
234 static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
235 			    pte_t *ptep, pte_t pte, int nr)
236 {
237 	/* Basically the default implementation */
238 	size_t length = nr * PAGE_SIZE;
239 
240 	for (;;) {
241 		set_pte(ptep, pte);
242 		if (--nr == 0)
243 			break;
244 		ptep++;
245 		pte = __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT));
246 	}
247 
248 	um_tlb_mark_sync(mm, addr, addr + length);
249 }
250 
251 #define __HAVE_ARCH_PTE_SAME
252 static inline int pte_same(pte_t pte_a, pte_t pte_b)
253 {
254 	return !((pte_val(pte_a) ^ pte_val(pte_b)) & ~_PAGE_NEEDSYNC);
255 }
256 
257 #define __virt_to_page(virt) phys_to_page(__pa(virt))
258 #define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
259 
260 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
261 {
262 	pte_t pte;
263 
264 	pte_set_val(pte, pfn_to_phys(pfn), pgprot);
265 
266 	return pte;
267 }
268 
269 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
270 {
271 	pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot);
272 	return pte;
273 }
274 
275 /*
276  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
277  *
278  * this macro returns the index of the entry in the pmd page which would
279  * control the given virtual address
280  */
281 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
282 
283 struct mm_struct;
284 extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
285 
286 #define update_mmu_cache(vma,address,ptep) do {} while (0)
287 #define update_mmu_cache_range(vmf, vma, address, ptep, nr) do {} while (0)
288 
289 /*
290  * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
291  * are !pte_none() && !pte_present().
292  *
293  * Format of swap PTEs:
294  *
295  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
296  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
297  *   <--------------- offset ----------------> E < type -> 0 0 0 1 0
298  *
299  *   E is the exclusive marker that is not stored in swap entries.
300  *   _PAGE_NEEDSYNC (bit 1) is always set to 1 in set_pte().
301  */
302 #define __swp_type(x)			(((x).val >> 5) & 0x1f)
303 #define __swp_offset(x)			((x).val >> 11)
304 
305 #define __swp_entry(type, offset) \
306 	((swp_entry_t) { (((type) & 0x1f) << 5) | ((offset) << 11) })
307 #define __pte_to_swp_entry(pte) \
308 	((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })
309 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
310 
311 static inline bool pte_swp_exclusive(pte_t pte)
312 {
313 	return pte_get_bits(pte, _PAGE_SWP_EXCLUSIVE);
314 }
315 
316 static inline pte_t pte_swp_mkexclusive(pte_t pte)
317 {
318 	pte_set_bits(pte, _PAGE_SWP_EXCLUSIVE);
319 	return pte;
320 }
321 
322 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
323 {
324 	pte_clear_bits(pte, _PAGE_SWP_EXCLUSIVE);
325 	return pte;
326 }
327 
328 #endif
329