1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) 4 * Copyright 2003 PathScale, Inc. 5 * Derived from include/asm-i386/pgtable.h 6 */ 7 8 #ifndef __UM_PGTABLE_H 9 #define __UM_PGTABLE_H 10 11 #include <asm/page.h> 12 #include <linux/mm_types.h> 13 14 #define _PAGE_PRESENT 0x001 15 #define _PAGE_NEEDSYNC 0x002 16 #define _PAGE_EXEC 0x004 17 #define _PAGE_RW 0x020 18 #define _PAGE_USER 0x040 19 #define _PAGE_ACCESSED 0x080 20 #define _PAGE_DIRTY 0x100 21 /* If _PAGE_PRESENT is clear, we use these: */ 22 #define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE; 23 pte_present gives true */ 24 25 /* We borrow bit 10 to store the exclusive marker in swap PTEs. */ 26 #define _PAGE_SWP_EXCLUSIVE 0x400 27 28 #if CONFIG_PGTABLE_LEVELS == 4 29 #include <asm/pgtable-4level.h> 30 #elif CONFIG_PGTABLE_LEVELS == 2 31 #include <asm/pgtable-2level.h> 32 #else 33 #error "Unsupported number of page table levels" 34 #endif 35 36 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 37 38 /* Just any arbitrary offset to the start of the vmalloc VM area: the 39 * current 8MB value just means that there will be a 8MB "hole" after the 40 * physical memory until the kernel virtual memory starts. That means that 41 * any out-of-bounds memory accesses will hopefully be caught. 42 * The vmalloc() routines leaves a hole of 4kB between each vmalloced 43 * area for the same reason. ;) 44 */ 45 46 #ifndef COMPILE_OFFSETS 47 #include <as-layout.h> /* for high_physmem */ 48 #endif 49 50 #define VMALLOC_OFFSET (__va_space) 51 #define VMALLOC_START ((high_physmem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) 52 #define VMALLOC_END (TASK_SIZE-2*PAGE_SIZE) 53 #define MODULES_VADDR VMALLOC_START 54 #define MODULES_END VMALLOC_END 55 56 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) 57 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) 58 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 59 60 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED) 61 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) 62 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW) 63 #define PAGE_SHARED_EXEC __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC) 64 #define PAGE_COPY __pgprot(_PAGE_BASE) 65 #define PAGE_COPY_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 66 #define PAGE_READONLY __pgprot(_PAGE_BASE) 67 #define PAGE_READONLY_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 68 69 #define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) 70 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 71 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 72 73 /* 74 * The i386 can't do page protection for execute, and considers that the same 75 * are read. 76 * Also, write permissions imply read permissions. This is the closest we can 77 * get.. 78 */ 79 80 #define pte_clear(mm, addr, xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEEDSYNC)) 81 82 #define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEEDSYNC)) 83 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) 84 85 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) 86 #define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEEDSYNC; } while (0) 87 88 #define pmd_needsync(x) (pmd_val(x) & _PAGE_NEEDSYNC) 89 #define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEEDSYNC) 90 91 #define pud_needsync(x) (pud_val(x) & _PAGE_NEEDSYNC) 92 #define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEEDSYNC) 93 94 #define p4d_needsync(x) (p4d_val(x) & _PAGE_NEEDSYNC) 95 #define p4d_mkuptodate(x) (p4d_val(x) &= ~_PAGE_NEEDSYNC) 96 97 #define pmd_pfn(pmd) (pmd_val(pmd) >> PAGE_SHIFT) 98 #define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK) 99 100 #define pte_page(x) pfn_to_page(pte_pfn(x)) 101 102 #define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE)) 103 104 /* 105 * ================================= 106 * Flags checking section. 107 * ================================= 108 */ 109 110 static inline int pte_none(pte_t pte) 111 { 112 return pte_is_zero(pte); 113 } 114 115 /* 116 * The following only work if pte_present() is true. 117 * Undefined behaviour if not.. 118 */ 119 static inline int pte_read(pte_t pte) 120 { 121 return !pte_get_bits(pte, _PAGE_PROTNONE); 122 } 123 124 static inline int pte_exec(pte_t pte) 125 { 126 return pte_get_bits(pte, _PAGE_EXEC) && 127 !pte_get_bits(pte, _PAGE_PROTNONE); 128 } 129 130 static inline int pte_write(pte_t pte) 131 { 132 return((pte_get_bits(pte, _PAGE_RW)) && 133 !(pte_get_bits(pte, _PAGE_PROTNONE))); 134 } 135 136 static inline int pte_dirty(pte_t pte) 137 { 138 return pte_get_bits(pte, _PAGE_DIRTY); 139 } 140 141 static inline int pte_young(pte_t pte) 142 { 143 return pte_get_bits(pte, _PAGE_ACCESSED); 144 } 145 146 static inline int pte_needsync(pte_t pte) 147 { 148 return pte_get_bits(pte, _PAGE_NEEDSYNC); 149 } 150 151 /* 152 * ================================= 153 * Flags setting section. 154 * ================================= 155 */ 156 157 static inline pte_t pte_mkclean(pte_t pte) 158 { 159 pte_clear_bits(pte, _PAGE_DIRTY); 160 return(pte); 161 } 162 163 static inline pte_t pte_mkold(pte_t pte) 164 { 165 pte_clear_bits(pte, _PAGE_ACCESSED); 166 return(pte); 167 } 168 169 static inline pte_t pte_wrprotect(pte_t pte) 170 { 171 pte_clear_bits(pte, _PAGE_RW); 172 return pte; 173 } 174 175 static inline pte_t pte_mkread(pte_t pte) 176 { 177 pte_set_bits(pte, _PAGE_USER); 178 return pte; 179 } 180 181 static inline pte_t pte_mkdirty(pte_t pte) 182 { 183 pte_set_bits(pte, _PAGE_DIRTY); 184 return(pte); 185 } 186 187 static inline pte_t pte_mkyoung(pte_t pte) 188 { 189 pte_set_bits(pte, _PAGE_ACCESSED); 190 return(pte); 191 } 192 193 static inline pte_t pte_mkwrite_novma(pte_t pte) 194 { 195 pte_set_bits(pte, _PAGE_RW); 196 return pte; 197 } 198 199 static inline pte_t pte_mkuptodate(pte_t pte) 200 { 201 pte_clear_bits(pte, _PAGE_NEEDSYNC); 202 return pte; 203 } 204 205 static inline pte_t pte_mkneedsync(pte_t pte) 206 { 207 pte_set_bits(pte, _PAGE_NEEDSYNC); 208 return(pte); 209 } 210 211 static inline void set_pte(pte_t *pteptr, pte_t pteval) 212 { 213 pte_copy(*pteptr, pteval); 214 215 /* If it's a swap entry, it needs to be marked _PAGE_NEEDSYNC so 216 * update_pte_range knows to unmap it. 217 */ 218 219 *pteptr = pte_mkneedsync(*pteptr); 220 } 221 222 #define PFN_PTE_SHIFT PAGE_SHIFT 223 224 static inline void um_tlb_mark_sync(struct mm_struct *mm, unsigned long start, 225 unsigned long end) 226 { 227 guard(spinlock_irqsave)(&mm->context.sync_tlb_lock); 228 229 if (!mm->context.sync_tlb_range_to) { 230 mm->context.sync_tlb_range_from = start; 231 mm->context.sync_tlb_range_to = end; 232 } else { 233 if (start < mm->context.sync_tlb_range_from) 234 mm->context.sync_tlb_range_from = start; 235 if (end > mm->context.sync_tlb_range_to) 236 mm->context.sync_tlb_range_to = end; 237 } 238 } 239 240 #define set_ptes set_ptes 241 static inline void set_ptes(struct mm_struct *mm, unsigned long addr, 242 pte_t *ptep, pte_t pte, int nr) 243 { 244 /* Basically the default implementation */ 245 size_t length = nr * PAGE_SIZE; 246 247 for (;;) { 248 set_pte(ptep, pte); 249 if (--nr == 0) 250 break; 251 ptep++; 252 pte = __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT)); 253 } 254 255 um_tlb_mark_sync(mm, addr, addr + length); 256 } 257 258 #define __HAVE_ARCH_PTE_SAME 259 static inline int pte_same(pte_t pte_a, pte_t pte_b) 260 { 261 return !((pte_val(pte_a) ^ pte_val(pte_b)) & ~_PAGE_NEEDSYNC); 262 } 263 264 #define __virt_to_page(virt) phys_to_page(__pa(virt)) 265 #define virt_to_page(addr) __virt_to_page((const unsigned long) addr) 266 267 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) 268 { 269 pte_t pte; 270 271 pte_set_val(pte, pfn_to_phys(pfn), pgprot); 272 273 return pte; 274 } 275 276 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 277 { 278 pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot); 279 return pte; 280 } 281 282 /* 283 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] 284 * 285 * this macro returns the index of the entry in the pmd page which would 286 * control the given virtual address 287 */ 288 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) 289 290 struct mm_struct; 291 extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr); 292 293 #define update_mmu_cache(vma,address,ptep) do {} while (0) 294 #define update_mmu_cache_range(vmf, vma, address, ptep, nr) do {} while (0) 295 296 /* 297 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that 298 * are !pte_none() && !pte_present(). 299 * 300 * Format of swap PTEs: 301 * 302 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 303 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 304 * <--------------- offset ----------------> E < type -> 0 0 0 1 0 305 * 306 * E is the exclusive marker that is not stored in swap entries. 307 * _PAGE_NEEDSYNC (bit 1) is always set to 1 in set_pte(). 308 */ 309 #define __swp_type(x) (((x).val >> 5) & 0x1f) 310 #define __swp_offset(x) ((x).val >> 11) 311 312 #define __swp_entry(type, offset) \ 313 ((swp_entry_t) { (((type) & 0x1f) << 5) | ((offset) << 11) }) 314 #define __pte_to_swp_entry(pte) \ 315 ((swp_entry_t) { pte_val(pte_mkuptodate(pte)) }) 316 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 317 318 static inline bool pte_swp_exclusive(pte_t pte) 319 { 320 return pte_get_bits(pte, _PAGE_SWP_EXCLUSIVE); 321 } 322 323 static inline pte_t pte_swp_mkexclusive(pte_t pte) 324 { 325 pte_set_bits(pte, _PAGE_SWP_EXCLUSIVE); 326 return pte; 327 } 328 329 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 330 { 331 pte_clear_bits(pte, _PAGE_SWP_EXCLUSIVE); 332 return pte; 333 } 334 335 #endif 336