11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * iommu.c: IOMMU specific routines for memory management. 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 51da177e4SLinus Torvalds * Copyright (C) 1995,2002 Pete Zaitcev (zaitcev@yahoo.com) 61da177e4SLinus Torvalds * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 71da177e4SLinus Torvalds * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 81da177e4SLinus Torvalds */ 91da177e4SLinus Torvalds 101da177e4SLinus Torvalds #include <linux/kernel.h> 111da177e4SLinus Torvalds #include <linux/init.h> 121da177e4SLinus Torvalds #include <linux/mm.h> 131da177e4SLinus Torvalds #include <linux/slab.h> 141da177e4SLinus Torvalds #include <linux/highmem.h> /* pte_offset_map => kmap_atomic */ 150912a5dbSJens Axboe #include <linux/scatterlist.h> 169dc69230SDavid S. Miller #include <linux/of.h> 179dc69230SDavid S. Miller #include <linux/of_device.h> 181da177e4SLinus Torvalds 191da177e4SLinus Torvalds #include <asm/pgalloc.h> 201da177e4SLinus Torvalds #include <asm/pgtable.h> 211da177e4SLinus Torvalds #include <asm/io.h> 221da177e4SLinus Torvalds #include <asm/mxcc.h> 231da177e4SLinus Torvalds #include <asm/mbus.h> 241da177e4SLinus Torvalds #include <asm/cacheflush.h> 251da177e4SLinus Torvalds #include <asm/tlbflush.h> 261da177e4SLinus Torvalds #include <asm/bitext.h> 271da177e4SLinus Torvalds #include <asm/iommu.h> 281da177e4SLinus Torvalds #include <asm/dma.h> 291da177e4SLinus Torvalds 30*e8c29c83SSam Ravnborg #include "mm_32.h" 31*e8c29c83SSam Ravnborg 321da177e4SLinus Torvalds /* 331da177e4SLinus Torvalds * This can be sized dynamically, but we will do this 341da177e4SLinus Torvalds * only when we have a guidance about actual I/O pressures. 351da177e4SLinus Torvalds */ 361da177e4SLinus Torvalds #define IOMMU_RNGE IOMMU_RNGE_256MB 371da177e4SLinus Torvalds #define IOMMU_START 0xF0000000 381da177e4SLinus Torvalds #define IOMMU_WINSIZE (256*1024*1024U) 399a0ac1b6SAkinobu Mita #define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */ 401da177e4SLinus Torvalds #define IOMMU_ORDER 6 /* 4096 * (1<<6) */ 411da177e4SLinus Torvalds 421da177e4SLinus Torvalds static int viking_flush; 431da177e4SLinus Torvalds /* viking.S */ 441da177e4SLinus Torvalds extern void viking_flush_page(unsigned long page); 451da177e4SLinus Torvalds extern void viking_mxcc_flush_page(unsigned long page); 461da177e4SLinus Torvalds 471da177e4SLinus Torvalds /* 481da177e4SLinus Torvalds * Values precomputed according to CPU type. 491da177e4SLinus Torvalds */ 501da177e4SLinus Torvalds static unsigned int ioperm_noc; /* Consistent mapping iopte flags */ 511da177e4SLinus Torvalds static pgprot_t dvma_prot; /* Consistent mapping pte flags */ 521da177e4SLinus Torvalds 531da177e4SLinus Torvalds #define IOPERM (IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID) 541da177e4SLinus Torvalds #define MKIOPTE(pfn, perm) (((((pfn)<<8) & IOPTE_PAGE) | (perm)) & ~IOPTE_WAZ) 551da177e4SLinus Torvalds 56cd4cd730SGrant Likely static void __init sbus_iommu_init(struct platform_device *op) 571da177e4SLinus Torvalds { 581da177e4SLinus Torvalds struct iommu_struct *iommu; 59e0039348SDavid S. Miller unsigned int impl, vers; 601da177e4SLinus Torvalds unsigned long *bitmap; 61e0039348SDavid S. Miller unsigned long tmp; 62e0039348SDavid S. Miller 6371cd03b0SJulia Lawall iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); 641da177e4SLinus Torvalds if (!iommu) { 651da177e4SLinus Torvalds prom_printf("Unable to allocate iommu structure\n"); 661da177e4SLinus Torvalds prom_halt(); 671da177e4SLinus Torvalds } 68e0039348SDavid S. Miller 69046e26a8SDavid S. Miller iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, 70e0039348SDavid S. Miller "iommu_regs"); 711da177e4SLinus Torvalds if (!iommu->regs) { 721da177e4SLinus Torvalds prom_printf("Cannot map IOMMU registers\n"); 731da177e4SLinus Torvalds prom_halt(); 741da177e4SLinus Torvalds } 751da177e4SLinus Torvalds impl = (iommu->regs->control & IOMMU_CTRL_IMPL) >> 28; 761da177e4SLinus Torvalds vers = (iommu->regs->control & IOMMU_CTRL_VERS) >> 24; 771da177e4SLinus Torvalds tmp = iommu->regs->control; 781da177e4SLinus Torvalds tmp &= ~(IOMMU_CTRL_RNGE); 791da177e4SLinus Torvalds tmp |= (IOMMU_RNGE_256MB | IOMMU_CTRL_ENAB); 801da177e4SLinus Torvalds iommu->regs->control = tmp; 811da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 821da177e4SLinus Torvalds iommu->start = IOMMU_START; 831da177e4SLinus Torvalds iommu->end = 0xffffffff; 841da177e4SLinus Torvalds 851da177e4SLinus Torvalds /* Allocate IOMMU page table */ 861da177e4SLinus Torvalds /* Stupid alignment constraints give me a headache. 871da177e4SLinus Torvalds We need 256K or 512K or 1M or 2M area aligned to 881da177e4SLinus Torvalds its size and current gfp will fortunately give 891da177e4SLinus Torvalds it to us. */ 901da177e4SLinus Torvalds tmp = __get_free_pages(GFP_KERNEL, IOMMU_ORDER); 911da177e4SLinus Torvalds if (!tmp) { 925da444aaSAkinobu Mita prom_printf("Unable to allocate iommu table [0x%lx]\n", 931da177e4SLinus Torvalds IOMMU_NPTES * sizeof(iopte_t)); 941da177e4SLinus Torvalds prom_halt(); 951da177e4SLinus Torvalds } 961da177e4SLinus Torvalds iommu->page_table = (iopte_t *)tmp; 971da177e4SLinus Torvalds 981da177e4SLinus Torvalds /* Initialize new table. */ 991da177e4SLinus Torvalds memset(iommu->page_table, 0, IOMMU_NPTES*sizeof(iopte_t)); 1001da177e4SLinus Torvalds flush_cache_all(); 1011da177e4SLinus Torvalds flush_tlb_all(); 1021da177e4SLinus Torvalds iommu->regs->base = __pa((unsigned long) iommu->page_table) >> 4; 1031da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 1041da177e4SLinus Torvalds 1051da177e4SLinus Torvalds bitmap = kmalloc(IOMMU_NPTES>>3, GFP_KERNEL); 1061da177e4SLinus Torvalds if (!bitmap) { 1071da177e4SLinus Torvalds prom_printf("Unable to allocate iommu bitmap [%d]\n", 1081da177e4SLinus Torvalds (int)(IOMMU_NPTES>>3)); 1091da177e4SLinus Torvalds prom_halt(); 1101da177e4SLinus Torvalds } 1111da177e4SLinus Torvalds bit_map_init(&iommu->usemap, bitmap, IOMMU_NPTES); 1121da177e4SLinus Torvalds /* To be coherent on HyperSparc, the page color of DVMA 1131da177e4SLinus Torvalds * and physical addresses must match. 1141da177e4SLinus Torvalds */ 1151da177e4SLinus Torvalds if (srmmu_modtype == HyperSparc) 1161da177e4SLinus Torvalds iommu->usemap.num_colors = vac_cache_size >> PAGE_SHIFT; 1171da177e4SLinus Torvalds else 1181da177e4SLinus Torvalds iommu->usemap.num_colors = 1; 1191da177e4SLinus Torvalds 120046e26a8SDavid S. Miller printk(KERN_INFO "IOMMU: impl %d vers %d table 0x%p[%d B] map [%d b]\n", 1211da177e4SLinus Torvalds impl, vers, iommu->page_table, 1221da177e4SLinus Torvalds (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES); 1231da177e4SLinus Torvalds 124e0039348SDavid S. Miller op->dev.archdata.iommu = iommu; 1251da177e4SLinus Torvalds } 1261da177e4SLinus Torvalds 127046e26a8SDavid S. Miller static int __init iommu_init(void) 128046e26a8SDavid S. Miller { 129046e26a8SDavid S. Miller struct device_node *dp; 130046e26a8SDavid S. Miller 131046e26a8SDavid S. Miller for_each_node_by_name(dp, "iommu") { 132cd4cd730SGrant Likely struct platform_device *op = of_find_device_by_node(dp); 133046e26a8SDavid S. Miller 134046e26a8SDavid S. Miller sbus_iommu_init(op); 135046e26a8SDavid S. Miller of_propagate_archdata(op); 136046e26a8SDavid S. Miller } 137046e26a8SDavid S. Miller 138046e26a8SDavid S. Miller return 0; 139046e26a8SDavid S. Miller } 140046e26a8SDavid S. Miller 141046e26a8SDavid S. Miller subsys_initcall(iommu_init); 142046e26a8SDavid S. Miller 1431da177e4SLinus Torvalds /* Flush the iotlb entries to ram. */ 1441da177e4SLinus Torvalds /* This could be better if we didn't have to flush whole pages. */ 1451da177e4SLinus Torvalds static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte) 1461da177e4SLinus Torvalds { 1471da177e4SLinus Torvalds unsigned long start; 1481da177e4SLinus Torvalds unsigned long end; 1491da177e4SLinus Torvalds 1503185d4d2SBob Breuer start = (unsigned long)iopte; 1511da177e4SLinus Torvalds end = PAGE_ALIGN(start + niopte*sizeof(iopte_t)); 1523185d4d2SBob Breuer start &= PAGE_MASK; 1531da177e4SLinus Torvalds if (viking_mxcc_present) { 1541da177e4SLinus Torvalds while(start < end) { 1551da177e4SLinus Torvalds viking_mxcc_flush_page(start); 1561da177e4SLinus Torvalds start += PAGE_SIZE; 1571da177e4SLinus Torvalds } 1581da177e4SLinus Torvalds } else if (viking_flush) { 1591da177e4SLinus Torvalds while(start < end) { 1601da177e4SLinus Torvalds viking_flush_page(start); 1611da177e4SLinus Torvalds start += PAGE_SIZE; 1621da177e4SLinus Torvalds } 1631da177e4SLinus Torvalds } else { 1641da177e4SLinus Torvalds while(start < end) { 1651da177e4SLinus Torvalds __flush_page_to_ram(start); 1661da177e4SLinus Torvalds start += PAGE_SIZE; 1671da177e4SLinus Torvalds } 1681da177e4SLinus Torvalds } 1691da177e4SLinus Torvalds } 1701da177e4SLinus Torvalds 171260489faSDavid S. Miller static u32 iommu_get_one(struct device *dev, struct page *page, int npages) 1721da177e4SLinus Torvalds { 173260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 1741da177e4SLinus Torvalds int ioptex; 1751da177e4SLinus Torvalds iopte_t *iopte, *iopte0; 1761da177e4SLinus Torvalds unsigned int busa, busa0; 1771da177e4SLinus Torvalds int i; 1781da177e4SLinus Torvalds 1791da177e4SLinus Torvalds /* page color = pfn of page */ 1801da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, npages, page_to_pfn(page)); 1811da177e4SLinus Torvalds if (ioptex < 0) 1821da177e4SLinus Torvalds panic("iommu out"); 1831da177e4SLinus Torvalds busa0 = iommu->start + (ioptex << PAGE_SHIFT); 1841da177e4SLinus Torvalds iopte0 = &iommu->page_table[ioptex]; 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds busa = busa0; 1871da177e4SLinus Torvalds iopte = iopte0; 1881da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 1891da177e4SLinus Torvalds iopte_val(*iopte) = MKIOPTE(page_to_pfn(page), IOPERM); 1901da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 1911da177e4SLinus Torvalds busa += PAGE_SIZE; 1921da177e4SLinus Torvalds iopte++; 1931da177e4SLinus Torvalds page++; 1941da177e4SLinus Torvalds } 1951da177e4SLinus Torvalds 1961da177e4SLinus Torvalds iommu_flush_iotlb(iopte0, npages); 1971da177e4SLinus Torvalds 1981da177e4SLinus Torvalds return busa0; 1991da177e4SLinus Torvalds } 2001da177e4SLinus Torvalds 201260489faSDavid S. Miller static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len) 2021da177e4SLinus Torvalds { 2031da177e4SLinus Torvalds unsigned long off; 2041da177e4SLinus Torvalds int npages; 2051da177e4SLinus Torvalds struct page *page; 2061da177e4SLinus Torvalds u32 busa; 2071da177e4SLinus Torvalds 2081da177e4SLinus Torvalds off = (unsigned long)vaddr & ~PAGE_MASK; 2091da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 2101da177e4SLinus Torvalds page = virt_to_page((unsigned long)vaddr & PAGE_MASK); 211260489faSDavid S. Miller busa = iommu_get_one(dev, page, npages); 2121da177e4SLinus Torvalds return busa + off; 2131da177e4SLinus Torvalds } 2141da177e4SLinus Torvalds 215260489faSDavid S. Miller static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len) 2161da177e4SLinus Torvalds { 2171da177e4SLinus Torvalds flush_page_for_dma(0); 218260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2191da177e4SLinus Torvalds } 2201da177e4SLinus Torvalds 221260489faSDavid S. Miller static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned long len) 2221da177e4SLinus Torvalds { 2231da177e4SLinus Torvalds unsigned long page = ((unsigned long) vaddr) & PAGE_MASK; 2241da177e4SLinus Torvalds 2251da177e4SLinus Torvalds while(page < ((unsigned long)(vaddr + len))) { 2261da177e4SLinus Torvalds flush_page_for_dma(page); 2271da177e4SLinus Torvalds page += PAGE_SIZE; 2281da177e4SLinus Torvalds } 229260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2301da177e4SLinus Torvalds } 2311da177e4SLinus Torvalds 232260489faSDavid S. Miller static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz) 2331da177e4SLinus Torvalds { 2341da177e4SLinus Torvalds int n; 2351da177e4SLinus Torvalds 2361da177e4SLinus Torvalds flush_page_for_dma(0); 2371da177e4SLinus Torvalds while (sz != 0) { 2381da177e4SLinus Torvalds --sz; 2391da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 240aa83a26aSRobert Reif sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 241aa83a26aSRobert Reif sg->dma_length = sg->length; 2420912a5dbSJens Axboe sg = sg_next(sg); 2431da177e4SLinus Torvalds } 2441da177e4SLinus Torvalds } 2451da177e4SLinus Torvalds 246260489faSDavid S. Miller static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg, int sz) 2471da177e4SLinus Torvalds { 2481da177e4SLinus Torvalds unsigned long page, oldpage = 0; 2491da177e4SLinus Torvalds int n, i; 2501da177e4SLinus Torvalds 2511da177e4SLinus Torvalds while(sz != 0) { 2521da177e4SLinus Torvalds --sz; 2531da177e4SLinus Torvalds 2541da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 2551da177e4SLinus Torvalds 2561da177e4SLinus Torvalds /* 2571da177e4SLinus Torvalds * We expect unmapped highmem pages to be not in the cache. 2581da177e4SLinus Torvalds * XXX Is this a good assumption? 2591da177e4SLinus Torvalds * XXX What if someone else unmaps it here and races us? 2601da177e4SLinus Torvalds */ 26158b053e4SJens Axboe if ((page = (unsigned long) page_address(sg_page(sg))) != 0) { 2621da177e4SLinus Torvalds for (i = 0; i < n; i++) { 2631da177e4SLinus Torvalds if (page != oldpage) { /* Already flushed? */ 2641da177e4SLinus Torvalds flush_page_for_dma(page); 2651da177e4SLinus Torvalds oldpage = page; 2661da177e4SLinus Torvalds } 2671da177e4SLinus Torvalds page += PAGE_SIZE; 2681da177e4SLinus Torvalds } 2691da177e4SLinus Torvalds } 2701da177e4SLinus Torvalds 271aa83a26aSRobert Reif sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 272aa83a26aSRobert Reif sg->dma_length = sg->length; 2730912a5dbSJens Axboe sg = sg_next(sg); 2741da177e4SLinus Torvalds } 2751da177e4SLinus Torvalds } 2761da177e4SLinus Torvalds 277260489faSDavid S. Miller static void iommu_release_one(struct device *dev, u32 busa, int npages) 2781da177e4SLinus Torvalds { 279260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 2801da177e4SLinus Torvalds int ioptex; 2811da177e4SLinus Torvalds int i; 2821da177e4SLinus Torvalds 2831ae61388SEric Sesterhenn BUG_ON(busa < iommu->start); 2841da177e4SLinus Torvalds ioptex = (busa - iommu->start) >> PAGE_SHIFT; 2851da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 2861da177e4SLinus Torvalds iopte_val(iommu->page_table[ioptex + i]) = 0; 2871da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 2881da177e4SLinus Torvalds busa += PAGE_SIZE; 2891da177e4SLinus Torvalds } 2901da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, npages); 2911da177e4SLinus Torvalds } 2921da177e4SLinus Torvalds 293260489faSDavid S. Miller static void iommu_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len) 2941da177e4SLinus Torvalds { 2951da177e4SLinus Torvalds unsigned long off; 2961da177e4SLinus Torvalds int npages; 2971da177e4SLinus Torvalds 2981da177e4SLinus Torvalds off = vaddr & ~PAGE_MASK; 2991da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 300260489faSDavid S. Miller iommu_release_one(dev, vaddr & PAGE_MASK, npages); 3011da177e4SLinus Torvalds } 3021da177e4SLinus Torvalds 303260489faSDavid S. Miller static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 3041da177e4SLinus Torvalds { 3051da177e4SLinus Torvalds int n; 3061da177e4SLinus Torvalds 3071da177e4SLinus Torvalds while(sz != 0) { 3081da177e4SLinus Torvalds --sz; 3091da177e4SLinus Torvalds 3101da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 311aa83a26aSRobert Reif iommu_release_one(dev, sg->dma_address & PAGE_MASK, n); 312aa83a26aSRobert Reif sg->dma_address = 0x21212121; 3130912a5dbSJens Axboe sg = sg_next(sg); 3141da177e4SLinus Torvalds } 3151da177e4SLinus Torvalds } 3161da177e4SLinus Torvalds 3171da177e4SLinus Torvalds #ifdef CONFIG_SBUS 3184b1c5df2SDavid S. Miller static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, 3191da177e4SLinus Torvalds unsigned long addr, int len) 3201da177e4SLinus Torvalds { 3214b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3221da177e4SLinus Torvalds unsigned long page, end; 3231da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 3241da177e4SLinus Torvalds iopte_t *first; 3251da177e4SLinus Torvalds int ioptex; 3261da177e4SLinus Torvalds 3271ae61388SEric Sesterhenn BUG_ON((va & ~PAGE_MASK) != 0); 3281ae61388SEric Sesterhenn BUG_ON((addr & ~PAGE_MASK) != 0); 3291ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 3301da177e4SLinus Torvalds 3311da177e4SLinus Torvalds /* page color = physical address */ 3321da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, len >> PAGE_SHIFT, 3331da177e4SLinus Torvalds addr >> PAGE_SHIFT); 3341da177e4SLinus Torvalds if (ioptex < 0) 3351da177e4SLinus Torvalds panic("iommu out"); 3361da177e4SLinus Torvalds 3371da177e4SLinus Torvalds iopte += ioptex; 3381da177e4SLinus Torvalds first = iopte; 3391da177e4SLinus Torvalds end = addr + len; 3401da177e4SLinus Torvalds while(addr < end) { 3411da177e4SLinus Torvalds page = va; 3421da177e4SLinus Torvalds { 3431da177e4SLinus Torvalds pgd_t *pgdp; 3441da177e4SLinus Torvalds pmd_t *pmdp; 3451da177e4SLinus Torvalds pte_t *ptep; 3461da177e4SLinus Torvalds 3471da177e4SLinus Torvalds if (viking_mxcc_present) 3481da177e4SLinus Torvalds viking_mxcc_flush_page(page); 3491da177e4SLinus Torvalds else if (viking_flush) 3501da177e4SLinus Torvalds viking_flush_page(page); 3511da177e4SLinus Torvalds else 3521da177e4SLinus Torvalds __flush_page_to_ram(page); 3531da177e4SLinus Torvalds 3541da177e4SLinus Torvalds pgdp = pgd_offset(&init_mm, addr); 3551da177e4SLinus Torvalds pmdp = pmd_offset(pgdp, addr); 3561da177e4SLinus Torvalds ptep = pte_offset_map(pmdp, addr); 3571da177e4SLinus Torvalds 3581da177e4SLinus Torvalds set_pte(ptep, mk_pte(virt_to_page(page), dvma_prot)); 3591da177e4SLinus Torvalds } 3601da177e4SLinus Torvalds iopte_val(*iopte++) = 3611da177e4SLinus Torvalds MKIOPTE(page_to_pfn(virt_to_page(page)), ioperm_noc); 3621da177e4SLinus Torvalds addr += PAGE_SIZE; 3631da177e4SLinus Torvalds va += PAGE_SIZE; 3641da177e4SLinus Torvalds } 3651da177e4SLinus Torvalds /* P3: why do we need this? 3661da177e4SLinus Torvalds * 3671da177e4SLinus Torvalds * DAVEM: Because there are several aspects, none of which 3681da177e4SLinus Torvalds * are handled by a single interface. Some cpus are 3691da177e4SLinus Torvalds * completely not I/O DMA coherent, and some have 3701da177e4SLinus Torvalds * virtually indexed caches. The driver DMA flushing 3711da177e4SLinus Torvalds * methods handle the former case, but here during 3721da177e4SLinus Torvalds * IOMMU page table modifications, and usage of non-cacheable 3731da177e4SLinus Torvalds * cpu mappings of pages potentially in the cpu caches, we have 3741da177e4SLinus Torvalds * to handle the latter case as well. 3751da177e4SLinus Torvalds */ 3761da177e4SLinus Torvalds flush_cache_all(); 3771da177e4SLinus Torvalds iommu_flush_iotlb(first, len >> PAGE_SHIFT); 3781da177e4SLinus Torvalds flush_tlb_all(); 3791da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 3801da177e4SLinus Torvalds 3811da177e4SLinus Torvalds *pba = iommu->start + (ioptex << PAGE_SHIFT); 3821da177e4SLinus Torvalds return 0; 3831da177e4SLinus Torvalds } 3841da177e4SLinus Torvalds 3854b1c5df2SDavid S. Miller static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len) 3861da177e4SLinus Torvalds { 3874b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3881da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 3891da177e4SLinus Torvalds unsigned long end; 3901da177e4SLinus Torvalds int ioptex = (busa - iommu->start) >> PAGE_SHIFT; 3911da177e4SLinus Torvalds 3921ae61388SEric Sesterhenn BUG_ON((busa & ~PAGE_MASK) != 0); 3931ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 3941da177e4SLinus Torvalds 3951da177e4SLinus Torvalds iopte += ioptex; 3961da177e4SLinus Torvalds end = busa + len; 3971da177e4SLinus Torvalds while (busa < end) { 3981da177e4SLinus Torvalds iopte_val(*iopte++) = 0; 3991da177e4SLinus Torvalds busa += PAGE_SIZE; 4001da177e4SLinus Torvalds } 4011da177e4SLinus Torvalds flush_tlb_all(); 4021da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 4031da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT); 4041da177e4SLinus Torvalds } 4051da177e4SLinus Torvalds #endif 4061da177e4SLinus Torvalds 407d894d964SDavid S. Miller static const struct sparc32_dma_ops iommu_dma_gflush_ops = { 408d894d964SDavid S. Miller .get_scsi_one = iommu_get_scsi_one_gflush, 409d894d964SDavid S. Miller .get_scsi_sgl = iommu_get_scsi_sgl_gflush, 410d894d964SDavid S. Miller .release_scsi_one = iommu_release_scsi_one, 411d894d964SDavid S. Miller .release_scsi_sgl = iommu_release_scsi_sgl, 412d894d964SDavid S. Miller #ifdef CONFIG_SBUS 413d894d964SDavid S. Miller .map_dma_area = iommu_map_dma_area, 414d894d964SDavid S. Miller .unmap_dma_area = iommu_unmap_dma_area, 415d894d964SDavid S. Miller #endif 416d894d964SDavid S. Miller }; 417d894d964SDavid S. Miller 418d894d964SDavid S. Miller static const struct sparc32_dma_ops iommu_dma_pflush_ops = { 419d894d964SDavid S. Miller .get_scsi_one = iommu_get_scsi_one_pflush, 420d894d964SDavid S. Miller .get_scsi_sgl = iommu_get_scsi_sgl_pflush, 421d894d964SDavid S. Miller .release_scsi_one = iommu_release_scsi_one, 422d894d964SDavid S. Miller .release_scsi_sgl = iommu_release_scsi_sgl, 423d894d964SDavid S. Miller #ifdef CONFIG_SBUS 424d894d964SDavid S. Miller .map_dma_area = iommu_map_dma_area, 425d894d964SDavid S. Miller .unmap_dma_area = iommu_unmap_dma_area, 426d894d964SDavid S. Miller #endif 427d894d964SDavid S. Miller }; 428d894d964SDavid S. Miller 4291da177e4SLinus Torvalds void __init ld_mmu_iommu(void) 4301da177e4SLinus Torvalds { 4315d83d666SDavid S. Miller if (flush_page_for_dma_global) { 4321da177e4SLinus Torvalds /* flush_page_for_dma flushes everything, no matter of what page is it */ 433d894d964SDavid S. Miller sparc32_dma_ops = &iommu_dma_gflush_ops; 4341da177e4SLinus Torvalds } else { 435d894d964SDavid S. Miller sparc32_dma_ops = &iommu_dma_pflush_ops; 4361da177e4SLinus Torvalds } 4371da177e4SLinus Torvalds 4381da177e4SLinus Torvalds if (viking_mxcc_present || srmmu_modtype == HyperSparc) { 4391da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV); 4401da177e4SLinus Torvalds ioperm_noc = IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID; 4411da177e4SLinus Torvalds } else { 4421da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV); 4431da177e4SLinus Torvalds ioperm_noc = IOPTE_WRITE | IOPTE_VALID; 4441da177e4SLinus Torvalds } 4451da177e4SLinus Torvalds } 446