1*b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds * iommu.c: IOMMU specific routines for memory management. 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 61da177e4SLinus Torvalds * Copyright (C) 1995,2002 Pete Zaitcev (zaitcev@yahoo.com) 71da177e4SLinus Torvalds * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 81da177e4SLinus Torvalds * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 91da177e4SLinus Torvalds */ 101da177e4SLinus Torvalds 111da177e4SLinus Torvalds #include <linux/kernel.h> 121da177e4SLinus Torvalds #include <linux/init.h> 131da177e4SLinus Torvalds #include <linux/mm.h> 141da177e4SLinus Torvalds #include <linux/slab.h> 151da177e4SLinus Torvalds #include <linux/highmem.h> /* pte_offset_map => kmap_atomic */ 160912a5dbSJens Axboe #include <linux/scatterlist.h> 179dc69230SDavid S. Miller #include <linux/of.h> 189dc69230SDavid S. Miller #include <linux/of_device.h> 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds #include <asm/pgalloc.h> 211da177e4SLinus Torvalds #include <asm/pgtable.h> 221da177e4SLinus Torvalds #include <asm/io.h> 231da177e4SLinus Torvalds #include <asm/mxcc.h> 241da177e4SLinus Torvalds #include <asm/mbus.h> 251da177e4SLinus Torvalds #include <asm/cacheflush.h> 261da177e4SLinus Torvalds #include <asm/tlbflush.h> 271da177e4SLinus Torvalds #include <asm/bitext.h> 281da177e4SLinus Torvalds #include <asm/iommu.h> 291da177e4SLinus Torvalds #include <asm/dma.h> 301da177e4SLinus Torvalds 31e8c29c83SSam Ravnborg #include "mm_32.h" 32e8c29c83SSam Ravnborg 331da177e4SLinus Torvalds /* 341da177e4SLinus Torvalds * This can be sized dynamically, but we will do this 351da177e4SLinus Torvalds * only when we have a guidance about actual I/O pressures. 361da177e4SLinus Torvalds */ 371da177e4SLinus Torvalds #define IOMMU_RNGE IOMMU_RNGE_256MB 381da177e4SLinus Torvalds #define IOMMU_START 0xF0000000 391da177e4SLinus Torvalds #define IOMMU_WINSIZE (256*1024*1024U) 409a0ac1b6SAkinobu Mita #define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */ 411da177e4SLinus Torvalds #define IOMMU_ORDER 6 /* 4096 * (1<<6) */ 421da177e4SLinus Torvalds 431da177e4SLinus Torvalds static int viking_flush; 441da177e4SLinus Torvalds /* viking.S */ 451da177e4SLinus Torvalds extern void viking_flush_page(unsigned long page); 461da177e4SLinus Torvalds extern void viking_mxcc_flush_page(unsigned long page); 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds /* 491da177e4SLinus Torvalds * Values precomputed according to CPU type. 501da177e4SLinus Torvalds */ 511da177e4SLinus Torvalds static unsigned int ioperm_noc; /* Consistent mapping iopte flags */ 521da177e4SLinus Torvalds static pgprot_t dvma_prot; /* Consistent mapping pte flags */ 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds #define IOPERM (IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID) 551da177e4SLinus Torvalds #define MKIOPTE(pfn, perm) (((((pfn)<<8) & IOPTE_PAGE) | (perm)) & ~IOPTE_WAZ) 561da177e4SLinus Torvalds 57cd4cd730SGrant Likely static void __init sbus_iommu_init(struct platform_device *op) 581da177e4SLinus Torvalds { 591da177e4SLinus Torvalds struct iommu_struct *iommu; 60e0039348SDavid S. Miller unsigned int impl, vers; 611da177e4SLinus Torvalds unsigned long *bitmap; 62f977ea49SSam Ravnborg unsigned long control; 63f977ea49SSam Ravnborg unsigned long base; 64e0039348SDavid S. Miller unsigned long tmp; 65e0039348SDavid S. Miller 6671cd03b0SJulia Lawall iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); 671da177e4SLinus Torvalds if (!iommu) { 681da177e4SLinus Torvalds prom_printf("Unable to allocate iommu structure\n"); 691da177e4SLinus Torvalds prom_halt(); 701da177e4SLinus Torvalds } 71e0039348SDavid S. Miller 72046e26a8SDavid S. Miller iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, 73e0039348SDavid S. Miller "iommu_regs"); 741da177e4SLinus Torvalds if (!iommu->regs) { 751da177e4SLinus Torvalds prom_printf("Cannot map IOMMU registers\n"); 761da177e4SLinus Torvalds prom_halt(); 771da177e4SLinus Torvalds } 78f977ea49SSam Ravnborg 79f977ea49SSam Ravnborg control = sbus_readl(&iommu->regs->control); 80f977ea49SSam Ravnborg impl = (control & IOMMU_CTRL_IMPL) >> 28; 81f977ea49SSam Ravnborg vers = (control & IOMMU_CTRL_VERS) >> 24; 82f977ea49SSam Ravnborg control &= ~(IOMMU_CTRL_RNGE); 83f977ea49SSam Ravnborg control |= (IOMMU_RNGE_256MB | IOMMU_CTRL_ENAB); 84f977ea49SSam Ravnborg sbus_writel(control, &iommu->regs->control); 85f977ea49SSam Ravnborg 861da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 871da177e4SLinus Torvalds iommu->start = IOMMU_START; 881da177e4SLinus Torvalds iommu->end = 0xffffffff; 891da177e4SLinus Torvalds 901da177e4SLinus Torvalds /* Allocate IOMMU page table */ 911da177e4SLinus Torvalds /* Stupid alignment constraints give me a headache. 921da177e4SLinus Torvalds We need 256K or 512K or 1M or 2M area aligned to 931da177e4SLinus Torvalds its size and current gfp will fortunately give 941da177e4SLinus Torvalds it to us. */ 951da177e4SLinus Torvalds tmp = __get_free_pages(GFP_KERNEL, IOMMU_ORDER); 961da177e4SLinus Torvalds if (!tmp) { 975da444aaSAkinobu Mita prom_printf("Unable to allocate iommu table [0x%lx]\n", 981da177e4SLinus Torvalds IOMMU_NPTES * sizeof(iopte_t)); 991da177e4SLinus Torvalds prom_halt(); 1001da177e4SLinus Torvalds } 1011da177e4SLinus Torvalds iommu->page_table = (iopte_t *)tmp; 1021da177e4SLinus Torvalds 1031da177e4SLinus Torvalds /* Initialize new table. */ 1041da177e4SLinus Torvalds memset(iommu->page_table, 0, IOMMU_NPTES*sizeof(iopte_t)); 1051da177e4SLinus Torvalds flush_cache_all(); 1061da177e4SLinus Torvalds flush_tlb_all(); 107f977ea49SSam Ravnborg 108f977ea49SSam Ravnborg base = __pa((unsigned long)iommu->page_table) >> 4; 109f977ea49SSam Ravnborg sbus_writel(base, &iommu->regs->base); 1101da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 1111da177e4SLinus Torvalds 1121da177e4SLinus Torvalds bitmap = kmalloc(IOMMU_NPTES>>3, GFP_KERNEL); 1131da177e4SLinus Torvalds if (!bitmap) { 1141da177e4SLinus Torvalds prom_printf("Unable to allocate iommu bitmap [%d]\n", 1151da177e4SLinus Torvalds (int)(IOMMU_NPTES>>3)); 1161da177e4SLinus Torvalds prom_halt(); 1171da177e4SLinus Torvalds } 1181da177e4SLinus Torvalds bit_map_init(&iommu->usemap, bitmap, IOMMU_NPTES); 1191da177e4SLinus Torvalds /* To be coherent on HyperSparc, the page color of DVMA 1201da177e4SLinus Torvalds * and physical addresses must match. 1211da177e4SLinus Torvalds */ 1221da177e4SLinus Torvalds if (srmmu_modtype == HyperSparc) 1231da177e4SLinus Torvalds iommu->usemap.num_colors = vac_cache_size >> PAGE_SHIFT; 1241da177e4SLinus Torvalds else 1251da177e4SLinus Torvalds iommu->usemap.num_colors = 1; 1261da177e4SLinus Torvalds 127046e26a8SDavid S. Miller printk(KERN_INFO "IOMMU: impl %d vers %d table 0x%p[%d B] map [%d b]\n", 1281da177e4SLinus Torvalds impl, vers, iommu->page_table, 1291da177e4SLinus Torvalds (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES); 1301da177e4SLinus Torvalds 131e0039348SDavid S. Miller op->dev.archdata.iommu = iommu; 1321da177e4SLinus Torvalds } 1331da177e4SLinus Torvalds 134046e26a8SDavid S. Miller static int __init iommu_init(void) 135046e26a8SDavid S. Miller { 136046e26a8SDavid S. Miller struct device_node *dp; 137046e26a8SDavid S. Miller 138046e26a8SDavid S. Miller for_each_node_by_name(dp, "iommu") { 139cd4cd730SGrant Likely struct platform_device *op = of_find_device_by_node(dp); 140046e26a8SDavid S. Miller 141046e26a8SDavid S. Miller sbus_iommu_init(op); 142046e26a8SDavid S. Miller of_propagate_archdata(op); 143046e26a8SDavid S. Miller } 144046e26a8SDavid S. Miller 145046e26a8SDavid S. Miller return 0; 146046e26a8SDavid S. Miller } 147046e26a8SDavid S. Miller 148046e26a8SDavid S. Miller subsys_initcall(iommu_init); 149046e26a8SDavid S. Miller 1501da177e4SLinus Torvalds /* Flush the iotlb entries to ram. */ 1511da177e4SLinus Torvalds /* This could be better if we didn't have to flush whole pages. */ 1521da177e4SLinus Torvalds static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte) 1531da177e4SLinus Torvalds { 1541da177e4SLinus Torvalds unsigned long start; 1551da177e4SLinus Torvalds unsigned long end; 1561da177e4SLinus Torvalds 1573185d4d2SBob Breuer start = (unsigned long)iopte; 1581da177e4SLinus Torvalds end = PAGE_ALIGN(start + niopte*sizeof(iopte_t)); 1593185d4d2SBob Breuer start &= PAGE_MASK; 1601da177e4SLinus Torvalds if (viking_mxcc_present) { 1611da177e4SLinus Torvalds while(start < end) { 1621da177e4SLinus Torvalds viking_mxcc_flush_page(start); 1631da177e4SLinus Torvalds start += PAGE_SIZE; 1641da177e4SLinus Torvalds } 1651da177e4SLinus Torvalds } else if (viking_flush) { 1661da177e4SLinus Torvalds while(start < end) { 1671da177e4SLinus Torvalds viking_flush_page(start); 1681da177e4SLinus Torvalds start += PAGE_SIZE; 1691da177e4SLinus Torvalds } 1701da177e4SLinus Torvalds } else { 1711da177e4SLinus Torvalds while(start < end) { 1721da177e4SLinus Torvalds __flush_page_to_ram(start); 1731da177e4SLinus Torvalds start += PAGE_SIZE; 1741da177e4SLinus Torvalds } 1751da177e4SLinus Torvalds } 1761da177e4SLinus Torvalds } 1771da177e4SLinus Torvalds 178260489faSDavid S. Miller static u32 iommu_get_one(struct device *dev, struct page *page, int npages) 1791da177e4SLinus Torvalds { 180260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 1811da177e4SLinus Torvalds int ioptex; 1821da177e4SLinus Torvalds iopte_t *iopte, *iopte0; 1831da177e4SLinus Torvalds unsigned int busa, busa0; 1841da177e4SLinus Torvalds int i; 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds /* page color = pfn of page */ 1871da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, npages, page_to_pfn(page)); 1881da177e4SLinus Torvalds if (ioptex < 0) 1891da177e4SLinus Torvalds panic("iommu out"); 1901da177e4SLinus Torvalds busa0 = iommu->start + (ioptex << PAGE_SHIFT); 1911da177e4SLinus Torvalds iopte0 = &iommu->page_table[ioptex]; 1921da177e4SLinus Torvalds 1931da177e4SLinus Torvalds busa = busa0; 1941da177e4SLinus Torvalds iopte = iopte0; 1951da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 1961da177e4SLinus Torvalds iopte_val(*iopte) = MKIOPTE(page_to_pfn(page), IOPERM); 1971da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 1981da177e4SLinus Torvalds busa += PAGE_SIZE; 1991da177e4SLinus Torvalds iopte++; 2001da177e4SLinus Torvalds page++; 2011da177e4SLinus Torvalds } 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds iommu_flush_iotlb(iopte0, npages); 2041da177e4SLinus Torvalds 2051da177e4SLinus Torvalds return busa0; 2061da177e4SLinus Torvalds } 2071da177e4SLinus Torvalds 208260489faSDavid S. Miller static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len) 2091da177e4SLinus Torvalds { 2101da177e4SLinus Torvalds unsigned long off; 2111da177e4SLinus Torvalds int npages; 2121da177e4SLinus Torvalds struct page *page; 2131da177e4SLinus Torvalds u32 busa; 2141da177e4SLinus Torvalds 2151da177e4SLinus Torvalds off = (unsigned long)vaddr & ~PAGE_MASK; 2161da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 2171da177e4SLinus Torvalds page = virt_to_page((unsigned long)vaddr & PAGE_MASK); 218260489faSDavid S. Miller busa = iommu_get_one(dev, page, npages); 2191da177e4SLinus Torvalds return busa + off; 2201da177e4SLinus Torvalds } 2211da177e4SLinus Torvalds 222260489faSDavid S. Miller static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len) 2231da177e4SLinus Torvalds { 2241da177e4SLinus Torvalds flush_page_for_dma(0); 225260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2261da177e4SLinus Torvalds } 2271da177e4SLinus Torvalds 228260489faSDavid S. Miller static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned long len) 2291da177e4SLinus Torvalds { 2301da177e4SLinus Torvalds unsigned long page = ((unsigned long) vaddr) & PAGE_MASK; 2311da177e4SLinus Torvalds 2321da177e4SLinus Torvalds while(page < ((unsigned long)(vaddr + len))) { 2331da177e4SLinus Torvalds flush_page_for_dma(page); 2341da177e4SLinus Torvalds page += PAGE_SIZE; 2351da177e4SLinus Torvalds } 236260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2371da177e4SLinus Torvalds } 2381da177e4SLinus Torvalds 239260489faSDavid S. Miller static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz) 2401da177e4SLinus Torvalds { 2411da177e4SLinus Torvalds int n; 2421da177e4SLinus Torvalds 2431da177e4SLinus Torvalds flush_page_for_dma(0); 2441da177e4SLinus Torvalds while (sz != 0) { 2451da177e4SLinus Torvalds --sz; 2461da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 247aa83a26aSRobert Reif sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 248aa83a26aSRobert Reif sg->dma_length = sg->length; 2490912a5dbSJens Axboe sg = sg_next(sg); 2501da177e4SLinus Torvalds } 2511da177e4SLinus Torvalds } 2521da177e4SLinus Torvalds 253260489faSDavid S. Miller static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg, int sz) 2541da177e4SLinus Torvalds { 2551da177e4SLinus Torvalds unsigned long page, oldpage = 0; 2561da177e4SLinus Torvalds int n, i; 2571da177e4SLinus Torvalds 2581da177e4SLinus Torvalds while(sz != 0) { 2591da177e4SLinus Torvalds --sz; 2601da177e4SLinus Torvalds 2611da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 2621da177e4SLinus Torvalds 2631da177e4SLinus Torvalds /* 2641da177e4SLinus Torvalds * We expect unmapped highmem pages to be not in the cache. 2651da177e4SLinus Torvalds * XXX Is this a good assumption? 2661da177e4SLinus Torvalds * XXX What if someone else unmaps it here and races us? 2671da177e4SLinus Torvalds */ 26858b053e4SJens Axboe if ((page = (unsigned long) page_address(sg_page(sg))) != 0) { 2691da177e4SLinus Torvalds for (i = 0; i < n; i++) { 2701da177e4SLinus Torvalds if (page != oldpage) { /* Already flushed? */ 2711da177e4SLinus Torvalds flush_page_for_dma(page); 2721da177e4SLinus Torvalds oldpage = page; 2731da177e4SLinus Torvalds } 2741da177e4SLinus Torvalds page += PAGE_SIZE; 2751da177e4SLinus Torvalds } 2761da177e4SLinus Torvalds } 2771da177e4SLinus Torvalds 278aa83a26aSRobert Reif sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 279aa83a26aSRobert Reif sg->dma_length = sg->length; 2800912a5dbSJens Axboe sg = sg_next(sg); 2811da177e4SLinus Torvalds } 2821da177e4SLinus Torvalds } 2831da177e4SLinus Torvalds 284260489faSDavid S. Miller static void iommu_release_one(struct device *dev, u32 busa, int npages) 2851da177e4SLinus Torvalds { 286260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 2871da177e4SLinus Torvalds int ioptex; 2881da177e4SLinus Torvalds int i; 2891da177e4SLinus Torvalds 2901ae61388SEric Sesterhenn BUG_ON(busa < iommu->start); 2911da177e4SLinus Torvalds ioptex = (busa - iommu->start) >> PAGE_SHIFT; 2921da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 2931da177e4SLinus Torvalds iopte_val(iommu->page_table[ioptex + i]) = 0; 2941da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 2951da177e4SLinus Torvalds busa += PAGE_SIZE; 2961da177e4SLinus Torvalds } 2971da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, npages); 2981da177e4SLinus Torvalds } 2991da177e4SLinus Torvalds 300260489faSDavid S. Miller static void iommu_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len) 3011da177e4SLinus Torvalds { 3021da177e4SLinus Torvalds unsigned long off; 3031da177e4SLinus Torvalds int npages; 3041da177e4SLinus Torvalds 3051da177e4SLinus Torvalds off = vaddr & ~PAGE_MASK; 3061da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 307260489faSDavid S. Miller iommu_release_one(dev, vaddr & PAGE_MASK, npages); 3081da177e4SLinus Torvalds } 3091da177e4SLinus Torvalds 310260489faSDavid S. Miller static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 3111da177e4SLinus Torvalds { 3121da177e4SLinus Torvalds int n; 3131da177e4SLinus Torvalds 3141da177e4SLinus Torvalds while(sz != 0) { 3151da177e4SLinus Torvalds --sz; 3161da177e4SLinus Torvalds 3171da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 318aa83a26aSRobert Reif iommu_release_one(dev, sg->dma_address & PAGE_MASK, n); 319aa83a26aSRobert Reif sg->dma_address = 0x21212121; 3200912a5dbSJens Axboe sg = sg_next(sg); 3211da177e4SLinus Torvalds } 3221da177e4SLinus Torvalds } 3231da177e4SLinus Torvalds 3241da177e4SLinus Torvalds #ifdef CONFIG_SBUS 3254b1c5df2SDavid S. Miller static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, 3261da177e4SLinus Torvalds unsigned long addr, int len) 3271da177e4SLinus Torvalds { 3284b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3291da177e4SLinus Torvalds unsigned long page, end; 3301da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 3311da177e4SLinus Torvalds iopte_t *first; 3321da177e4SLinus Torvalds int ioptex; 3331da177e4SLinus Torvalds 3341ae61388SEric Sesterhenn BUG_ON((va & ~PAGE_MASK) != 0); 3351ae61388SEric Sesterhenn BUG_ON((addr & ~PAGE_MASK) != 0); 3361ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 3371da177e4SLinus Torvalds 3381da177e4SLinus Torvalds /* page color = physical address */ 3391da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, len >> PAGE_SHIFT, 3401da177e4SLinus Torvalds addr >> PAGE_SHIFT); 3411da177e4SLinus Torvalds if (ioptex < 0) 3421da177e4SLinus Torvalds panic("iommu out"); 3431da177e4SLinus Torvalds 3441da177e4SLinus Torvalds iopte += ioptex; 3451da177e4SLinus Torvalds first = iopte; 3461da177e4SLinus Torvalds end = addr + len; 3471da177e4SLinus Torvalds while(addr < end) { 3481da177e4SLinus Torvalds page = va; 3491da177e4SLinus Torvalds { 3501da177e4SLinus Torvalds pgd_t *pgdp; 3511da177e4SLinus Torvalds pmd_t *pmdp; 3521da177e4SLinus Torvalds pte_t *ptep; 3531da177e4SLinus Torvalds 3541da177e4SLinus Torvalds if (viking_mxcc_present) 3551da177e4SLinus Torvalds viking_mxcc_flush_page(page); 3561da177e4SLinus Torvalds else if (viking_flush) 3571da177e4SLinus Torvalds viking_flush_page(page); 3581da177e4SLinus Torvalds else 3591da177e4SLinus Torvalds __flush_page_to_ram(page); 3601da177e4SLinus Torvalds 3611da177e4SLinus Torvalds pgdp = pgd_offset(&init_mm, addr); 3621da177e4SLinus Torvalds pmdp = pmd_offset(pgdp, addr); 3631da177e4SLinus Torvalds ptep = pte_offset_map(pmdp, addr); 3641da177e4SLinus Torvalds 3651da177e4SLinus Torvalds set_pte(ptep, mk_pte(virt_to_page(page), dvma_prot)); 3661da177e4SLinus Torvalds } 3671da177e4SLinus Torvalds iopte_val(*iopte++) = 3681da177e4SLinus Torvalds MKIOPTE(page_to_pfn(virt_to_page(page)), ioperm_noc); 3691da177e4SLinus Torvalds addr += PAGE_SIZE; 3701da177e4SLinus Torvalds va += PAGE_SIZE; 3711da177e4SLinus Torvalds } 3721da177e4SLinus Torvalds /* P3: why do we need this? 3731da177e4SLinus Torvalds * 3741da177e4SLinus Torvalds * DAVEM: Because there are several aspects, none of which 3751da177e4SLinus Torvalds * are handled by a single interface. Some cpus are 3761da177e4SLinus Torvalds * completely not I/O DMA coherent, and some have 3771da177e4SLinus Torvalds * virtually indexed caches. The driver DMA flushing 3781da177e4SLinus Torvalds * methods handle the former case, but here during 3791da177e4SLinus Torvalds * IOMMU page table modifications, and usage of non-cacheable 3801da177e4SLinus Torvalds * cpu mappings of pages potentially in the cpu caches, we have 3811da177e4SLinus Torvalds * to handle the latter case as well. 3821da177e4SLinus Torvalds */ 3831da177e4SLinus Torvalds flush_cache_all(); 3841da177e4SLinus Torvalds iommu_flush_iotlb(first, len >> PAGE_SHIFT); 3851da177e4SLinus Torvalds flush_tlb_all(); 3861da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 3871da177e4SLinus Torvalds 3881da177e4SLinus Torvalds *pba = iommu->start + (ioptex << PAGE_SHIFT); 3891da177e4SLinus Torvalds return 0; 3901da177e4SLinus Torvalds } 3911da177e4SLinus Torvalds 3924b1c5df2SDavid S. Miller static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len) 3931da177e4SLinus Torvalds { 3944b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3951da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 3961da177e4SLinus Torvalds unsigned long end; 3971da177e4SLinus Torvalds int ioptex = (busa - iommu->start) >> PAGE_SHIFT; 3981da177e4SLinus Torvalds 3991ae61388SEric Sesterhenn BUG_ON((busa & ~PAGE_MASK) != 0); 4001ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 4011da177e4SLinus Torvalds 4021da177e4SLinus Torvalds iopte += ioptex; 4031da177e4SLinus Torvalds end = busa + len; 4041da177e4SLinus Torvalds while (busa < end) { 4051da177e4SLinus Torvalds iopte_val(*iopte++) = 0; 4061da177e4SLinus Torvalds busa += PAGE_SIZE; 4071da177e4SLinus Torvalds } 4081da177e4SLinus Torvalds flush_tlb_all(); 4091da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 4101da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT); 4111da177e4SLinus Torvalds } 4121da177e4SLinus Torvalds #endif 4131da177e4SLinus Torvalds 414d894d964SDavid S. Miller static const struct sparc32_dma_ops iommu_dma_gflush_ops = { 415d894d964SDavid S. Miller .get_scsi_one = iommu_get_scsi_one_gflush, 416d894d964SDavid S. Miller .get_scsi_sgl = iommu_get_scsi_sgl_gflush, 417d894d964SDavid S. Miller .release_scsi_one = iommu_release_scsi_one, 418d894d964SDavid S. Miller .release_scsi_sgl = iommu_release_scsi_sgl, 419d894d964SDavid S. Miller #ifdef CONFIG_SBUS 420d894d964SDavid S. Miller .map_dma_area = iommu_map_dma_area, 421d894d964SDavid S. Miller .unmap_dma_area = iommu_unmap_dma_area, 422d894d964SDavid S. Miller #endif 423d894d964SDavid S. Miller }; 424d894d964SDavid S. Miller 425d894d964SDavid S. Miller static const struct sparc32_dma_ops iommu_dma_pflush_ops = { 426d894d964SDavid S. Miller .get_scsi_one = iommu_get_scsi_one_pflush, 427d894d964SDavid S. Miller .get_scsi_sgl = iommu_get_scsi_sgl_pflush, 428d894d964SDavid S. Miller .release_scsi_one = iommu_release_scsi_one, 429d894d964SDavid S. Miller .release_scsi_sgl = iommu_release_scsi_sgl, 430d894d964SDavid S. Miller #ifdef CONFIG_SBUS 431d894d964SDavid S. Miller .map_dma_area = iommu_map_dma_area, 432d894d964SDavid S. Miller .unmap_dma_area = iommu_unmap_dma_area, 433d894d964SDavid S. Miller #endif 434d894d964SDavid S. Miller }; 435d894d964SDavid S. Miller 4361da177e4SLinus Torvalds void __init ld_mmu_iommu(void) 4371da177e4SLinus Torvalds { 4385d83d666SDavid S. Miller if (flush_page_for_dma_global) { 4391da177e4SLinus Torvalds /* flush_page_for_dma flushes everything, no matter of what page is it */ 440d894d964SDavid S. Miller sparc32_dma_ops = &iommu_dma_gflush_ops; 4411da177e4SLinus Torvalds } else { 442d894d964SDavid S. Miller sparc32_dma_ops = &iommu_dma_pflush_ops; 4431da177e4SLinus Torvalds } 4441da177e4SLinus Torvalds 4451da177e4SLinus Torvalds if (viking_mxcc_present || srmmu_modtype == HyperSparc) { 4461da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV); 4471da177e4SLinus Torvalds ioperm_noc = IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID; 4481da177e4SLinus Torvalds } else { 4491da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV); 4501da177e4SLinus Torvalds ioperm_noc = IOPTE_WRITE | IOPTE_VALID; 4511da177e4SLinus Torvalds } 4521da177e4SLinus Torvalds } 453