11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * iommu.c: IOMMU specific routines for memory management. 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 51da177e4SLinus Torvalds * Copyright (C) 1995,2002 Pete Zaitcev (zaitcev@yahoo.com) 61da177e4SLinus Torvalds * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 71da177e4SLinus Torvalds * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 81da177e4SLinus Torvalds */ 91da177e4SLinus Torvalds 101da177e4SLinus Torvalds #include <linux/kernel.h> 111da177e4SLinus Torvalds #include <linux/init.h> 121da177e4SLinus Torvalds #include <linux/mm.h> 131da177e4SLinus Torvalds #include <linux/slab.h> 141da177e4SLinus Torvalds #include <linux/highmem.h> /* pte_offset_map => kmap_atomic */ 150912a5dbSJens Axboe #include <linux/scatterlist.h> 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds #include <asm/pgalloc.h> 181da177e4SLinus Torvalds #include <asm/pgtable.h> 191da177e4SLinus Torvalds #include <asm/sbus.h> 201da177e4SLinus Torvalds #include <asm/io.h> 211da177e4SLinus Torvalds #include <asm/mxcc.h> 221da177e4SLinus Torvalds #include <asm/mbus.h> 231da177e4SLinus Torvalds #include <asm/cacheflush.h> 241da177e4SLinus Torvalds #include <asm/tlbflush.h> 251da177e4SLinus Torvalds #include <asm/bitext.h> 261da177e4SLinus Torvalds #include <asm/iommu.h> 271da177e4SLinus Torvalds #include <asm/dma.h> 281da177e4SLinus Torvalds 291da177e4SLinus Torvalds /* 301da177e4SLinus Torvalds * This can be sized dynamically, but we will do this 311da177e4SLinus Torvalds * only when we have a guidance about actual I/O pressures. 321da177e4SLinus Torvalds */ 331da177e4SLinus Torvalds #define IOMMU_RNGE IOMMU_RNGE_256MB 341da177e4SLinus Torvalds #define IOMMU_START 0xF0000000 351da177e4SLinus Torvalds #define IOMMU_WINSIZE (256*1024*1024U) 361da177e4SLinus Torvalds #define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 265KB */ 371da177e4SLinus Torvalds #define IOMMU_ORDER 6 /* 4096 * (1<<6) */ 381da177e4SLinus Torvalds 391da177e4SLinus Torvalds /* srmmu.c */ 401da177e4SLinus Torvalds extern int viking_mxcc_present; 411da177e4SLinus Torvalds BTFIXUPDEF_CALL(void, flush_page_for_dma, unsigned long) 421da177e4SLinus Torvalds #define flush_page_for_dma(page) BTFIXUP_CALL(flush_page_for_dma)(page) 431da177e4SLinus Torvalds extern int flush_page_for_dma_global; 441da177e4SLinus Torvalds static int viking_flush; 451da177e4SLinus Torvalds /* viking.S */ 461da177e4SLinus Torvalds extern void viking_flush_page(unsigned long page); 471da177e4SLinus Torvalds extern void viking_mxcc_flush_page(unsigned long page); 481da177e4SLinus Torvalds 491da177e4SLinus Torvalds /* 501da177e4SLinus Torvalds * Values precomputed according to CPU type. 511da177e4SLinus Torvalds */ 521da177e4SLinus Torvalds static unsigned int ioperm_noc; /* Consistent mapping iopte flags */ 531da177e4SLinus Torvalds static pgprot_t dvma_prot; /* Consistent mapping pte flags */ 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds #define IOPERM (IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID) 561da177e4SLinus Torvalds #define MKIOPTE(pfn, perm) (((((pfn)<<8) & IOPTE_PAGE) | (perm)) & ~IOPTE_WAZ) 571da177e4SLinus Torvalds 58*046e26a8SDavid S. Miller static void __init sbus_iommu_init(struct of_device *op) 591da177e4SLinus Torvalds { 601da177e4SLinus Torvalds struct iommu_struct *iommu; 61e0039348SDavid S. Miller unsigned int impl, vers; 621da177e4SLinus Torvalds unsigned long *bitmap; 63e0039348SDavid S. Miller unsigned long tmp; 64e0039348SDavid S. Miller 651da177e4SLinus Torvalds iommu = kmalloc(sizeof(struct iommu_struct), GFP_ATOMIC); 661da177e4SLinus Torvalds if (!iommu) { 671da177e4SLinus Torvalds prom_printf("Unable to allocate iommu structure\n"); 681da177e4SLinus Torvalds prom_halt(); 691da177e4SLinus Torvalds } 70e0039348SDavid S. Miller 71*046e26a8SDavid S. Miller iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, 72e0039348SDavid S. Miller "iommu_regs"); 731da177e4SLinus Torvalds if (!iommu->regs) { 741da177e4SLinus Torvalds prom_printf("Cannot map IOMMU registers\n"); 751da177e4SLinus Torvalds prom_halt(); 761da177e4SLinus Torvalds } 771da177e4SLinus Torvalds impl = (iommu->regs->control & IOMMU_CTRL_IMPL) >> 28; 781da177e4SLinus Torvalds vers = (iommu->regs->control & IOMMU_CTRL_VERS) >> 24; 791da177e4SLinus Torvalds tmp = iommu->regs->control; 801da177e4SLinus Torvalds tmp &= ~(IOMMU_CTRL_RNGE); 811da177e4SLinus Torvalds tmp |= (IOMMU_RNGE_256MB | IOMMU_CTRL_ENAB); 821da177e4SLinus Torvalds iommu->regs->control = tmp; 831da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 841da177e4SLinus Torvalds iommu->start = IOMMU_START; 851da177e4SLinus Torvalds iommu->end = 0xffffffff; 861da177e4SLinus Torvalds 871da177e4SLinus Torvalds /* Allocate IOMMU page table */ 881da177e4SLinus Torvalds /* Stupid alignment constraints give me a headache. 891da177e4SLinus Torvalds We need 256K or 512K or 1M or 2M area aligned to 901da177e4SLinus Torvalds its size and current gfp will fortunately give 911da177e4SLinus Torvalds it to us. */ 921da177e4SLinus Torvalds tmp = __get_free_pages(GFP_KERNEL, IOMMU_ORDER); 931da177e4SLinus Torvalds if (!tmp) { 941da177e4SLinus Torvalds prom_printf("Unable to allocate iommu table [0x%08x]\n", 951da177e4SLinus Torvalds IOMMU_NPTES*sizeof(iopte_t)); 961da177e4SLinus Torvalds prom_halt(); 971da177e4SLinus Torvalds } 981da177e4SLinus Torvalds iommu->page_table = (iopte_t *)tmp; 991da177e4SLinus Torvalds 1001da177e4SLinus Torvalds /* Initialize new table. */ 1011da177e4SLinus Torvalds memset(iommu->page_table, 0, IOMMU_NPTES*sizeof(iopte_t)); 1021da177e4SLinus Torvalds flush_cache_all(); 1031da177e4SLinus Torvalds flush_tlb_all(); 1041da177e4SLinus Torvalds iommu->regs->base = __pa((unsigned long) iommu->page_table) >> 4; 1051da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 1061da177e4SLinus Torvalds 1071da177e4SLinus Torvalds bitmap = kmalloc(IOMMU_NPTES>>3, GFP_KERNEL); 1081da177e4SLinus Torvalds if (!bitmap) { 1091da177e4SLinus Torvalds prom_printf("Unable to allocate iommu bitmap [%d]\n", 1101da177e4SLinus Torvalds (int)(IOMMU_NPTES>>3)); 1111da177e4SLinus Torvalds prom_halt(); 1121da177e4SLinus Torvalds } 1131da177e4SLinus Torvalds bit_map_init(&iommu->usemap, bitmap, IOMMU_NPTES); 1141da177e4SLinus Torvalds /* To be coherent on HyperSparc, the page color of DVMA 1151da177e4SLinus Torvalds * and physical addresses must match. 1161da177e4SLinus Torvalds */ 1171da177e4SLinus Torvalds if (srmmu_modtype == HyperSparc) 1181da177e4SLinus Torvalds iommu->usemap.num_colors = vac_cache_size >> PAGE_SHIFT; 1191da177e4SLinus Torvalds else 1201da177e4SLinus Torvalds iommu->usemap.num_colors = 1; 1211da177e4SLinus Torvalds 122*046e26a8SDavid S. Miller printk(KERN_INFO "IOMMU: impl %d vers %d table 0x%p[%d B] map [%d b]\n", 1231da177e4SLinus Torvalds impl, vers, iommu->page_table, 1241da177e4SLinus Torvalds (int)(IOMMU_NPTES*sizeof(iopte_t)), (int)IOMMU_NPTES); 1251da177e4SLinus Torvalds 126e0039348SDavid S. Miller op->dev.archdata.iommu = iommu; 1271da177e4SLinus Torvalds } 1281da177e4SLinus Torvalds 129*046e26a8SDavid S. Miller static int __init iommu_init(void) 130*046e26a8SDavid S. Miller { 131*046e26a8SDavid S. Miller struct device_node *dp; 132*046e26a8SDavid S. Miller 133*046e26a8SDavid S. Miller for_each_node_by_name(dp, "iommu") { 134*046e26a8SDavid S. Miller struct of_device *op = of_find_device_by_node(dp); 135*046e26a8SDavid S. Miller 136*046e26a8SDavid S. Miller sbus_iommu_init(op); 137*046e26a8SDavid S. Miller of_propagate_archdata(op); 138*046e26a8SDavid S. Miller } 139*046e26a8SDavid S. Miller 140*046e26a8SDavid S. Miller return 0; 141*046e26a8SDavid S. Miller } 142*046e26a8SDavid S. Miller 143*046e26a8SDavid S. Miller subsys_initcall(iommu_init); 144*046e26a8SDavid S. Miller 1451da177e4SLinus Torvalds /* This begs to be btfixup-ed by srmmu. */ 1461da177e4SLinus Torvalds /* Flush the iotlb entries to ram. */ 1471da177e4SLinus Torvalds /* This could be better if we didn't have to flush whole pages. */ 1481da177e4SLinus Torvalds static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte) 1491da177e4SLinus Torvalds { 1501da177e4SLinus Torvalds unsigned long start; 1511da177e4SLinus Torvalds unsigned long end; 1521da177e4SLinus Torvalds 1533185d4d2SBob Breuer start = (unsigned long)iopte; 1541da177e4SLinus Torvalds end = PAGE_ALIGN(start + niopte*sizeof(iopte_t)); 1553185d4d2SBob Breuer start &= PAGE_MASK; 1561da177e4SLinus Torvalds if (viking_mxcc_present) { 1571da177e4SLinus Torvalds while(start < end) { 1581da177e4SLinus Torvalds viking_mxcc_flush_page(start); 1591da177e4SLinus Torvalds start += PAGE_SIZE; 1601da177e4SLinus Torvalds } 1611da177e4SLinus Torvalds } else if (viking_flush) { 1621da177e4SLinus Torvalds while(start < end) { 1631da177e4SLinus Torvalds viking_flush_page(start); 1641da177e4SLinus Torvalds start += PAGE_SIZE; 1651da177e4SLinus Torvalds } 1661da177e4SLinus Torvalds } else { 1671da177e4SLinus Torvalds while(start < end) { 1681da177e4SLinus Torvalds __flush_page_to_ram(start); 1691da177e4SLinus Torvalds start += PAGE_SIZE; 1701da177e4SLinus Torvalds } 1711da177e4SLinus Torvalds } 1721da177e4SLinus Torvalds } 1731da177e4SLinus Torvalds 174260489faSDavid S. Miller static u32 iommu_get_one(struct device *dev, struct page *page, int npages) 1751da177e4SLinus Torvalds { 176260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 1771da177e4SLinus Torvalds int ioptex; 1781da177e4SLinus Torvalds iopte_t *iopte, *iopte0; 1791da177e4SLinus Torvalds unsigned int busa, busa0; 1801da177e4SLinus Torvalds int i; 1811da177e4SLinus Torvalds 1821da177e4SLinus Torvalds /* page color = pfn of page */ 1831da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, npages, page_to_pfn(page)); 1841da177e4SLinus Torvalds if (ioptex < 0) 1851da177e4SLinus Torvalds panic("iommu out"); 1861da177e4SLinus Torvalds busa0 = iommu->start + (ioptex << PAGE_SHIFT); 1871da177e4SLinus Torvalds iopte0 = &iommu->page_table[ioptex]; 1881da177e4SLinus Torvalds 1891da177e4SLinus Torvalds busa = busa0; 1901da177e4SLinus Torvalds iopte = iopte0; 1911da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 1921da177e4SLinus Torvalds iopte_val(*iopte) = MKIOPTE(page_to_pfn(page), IOPERM); 1931da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 1941da177e4SLinus Torvalds busa += PAGE_SIZE; 1951da177e4SLinus Torvalds iopte++; 1961da177e4SLinus Torvalds page++; 1971da177e4SLinus Torvalds } 1981da177e4SLinus Torvalds 1991da177e4SLinus Torvalds iommu_flush_iotlb(iopte0, npages); 2001da177e4SLinus Torvalds 2011da177e4SLinus Torvalds return busa0; 2021da177e4SLinus Torvalds } 2031da177e4SLinus Torvalds 204260489faSDavid S. Miller static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len) 2051da177e4SLinus Torvalds { 2061da177e4SLinus Torvalds unsigned long off; 2071da177e4SLinus Torvalds int npages; 2081da177e4SLinus Torvalds struct page *page; 2091da177e4SLinus Torvalds u32 busa; 2101da177e4SLinus Torvalds 2111da177e4SLinus Torvalds off = (unsigned long)vaddr & ~PAGE_MASK; 2121da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 2131da177e4SLinus Torvalds page = virt_to_page((unsigned long)vaddr & PAGE_MASK); 214260489faSDavid S. Miller busa = iommu_get_one(dev, page, npages); 2151da177e4SLinus Torvalds return busa + off; 2161da177e4SLinus Torvalds } 2171da177e4SLinus Torvalds 218260489faSDavid S. Miller static __u32 iommu_get_scsi_one_noflush(struct device *dev, char *vaddr, unsigned long len) 2191da177e4SLinus Torvalds { 220260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2211da177e4SLinus Torvalds } 2221da177e4SLinus Torvalds 223260489faSDavid S. Miller static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len) 2241da177e4SLinus Torvalds { 2251da177e4SLinus Torvalds flush_page_for_dma(0); 226260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2271da177e4SLinus Torvalds } 2281da177e4SLinus Torvalds 229260489faSDavid S. Miller static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned long len) 2301da177e4SLinus Torvalds { 2311da177e4SLinus Torvalds unsigned long page = ((unsigned long) vaddr) & PAGE_MASK; 2321da177e4SLinus Torvalds 2331da177e4SLinus Torvalds while(page < ((unsigned long)(vaddr + len))) { 2341da177e4SLinus Torvalds flush_page_for_dma(page); 2351da177e4SLinus Torvalds page += PAGE_SIZE; 2361da177e4SLinus Torvalds } 237260489faSDavid S. Miller return iommu_get_scsi_one(dev, vaddr, len); 2381da177e4SLinus Torvalds } 2391da177e4SLinus Torvalds 240260489faSDavid S. Miller static void iommu_get_scsi_sgl_noflush(struct device *dev, struct scatterlist *sg, int sz) 2411da177e4SLinus Torvalds { 2421da177e4SLinus Torvalds int n; 2431da177e4SLinus Torvalds 2441da177e4SLinus Torvalds while (sz != 0) { 2451da177e4SLinus Torvalds --sz; 2461da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 247260489faSDavid S. Miller sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 2481da177e4SLinus Torvalds sg->dvma_length = (__u32) sg->length; 2490912a5dbSJens Axboe sg = sg_next(sg); 2501da177e4SLinus Torvalds } 2511da177e4SLinus Torvalds } 2521da177e4SLinus Torvalds 253260489faSDavid S. Miller static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz) 2541da177e4SLinus Torvalds { 2551da177e4SLinus Torvalds int n; 2561da177e4SLinus Torvalds 2571da177e4SLinus Torvalds flush_page_for_dma(0); 2581da177e4SLinus Torvalds while (sz != 0) { 2591da177e4SLinus Torvalds --sz; 2601da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 261260489faSDavid S. Miller sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 2621da177e4SLinus Torvalds sg->dvma_length = (__u32) sg->length; 2630912a5dbSJens Axboe sg = sg_next(sg); 2641da177e4SLinus Torvalds } 2651da177e4SLinus Torvalds } 2661da177e4SLinus Torvalds 267260489faSDavid S. Miller static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg, int sz) 2681da177e4SLinus Torvalds { 2691da177e4SLinus Torvalds unsigned long page, oldpage = 0; 2701da177e4SLinus Torvalds int n, i; 2711da177e4SLinus Torvalds 2721da177e4SLinus Torvalds while(sz != 0) { 2731da177e4SLinus Torvalds --sz; 2741da177e4SLinus Torvalds 2751da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds /* 2781da177e4SLinus Torvalds * We expect unmapped highmem pages to be not in the cache. 2791da177e4SLinus Torvalds * XXX Is this a good assumption? 2801da177e4SLinus Torvalds * XXX What if someone else unmaps it here and races us? 2811da177e4SLinus Torvalds */ 28258b053e4SJens Axboe if ((page = (unsigned long) page_address(sg_page(sg))) != 0) { 2831da177e4SLinus Torvalds for (i = 0; i < n; i++) { 2841da177e4SLinus Torvalds if (page != oldpage) { /* Already flushed? */ 2851da177e4SLinus Torvalds flush_page_for_dma(page); 2861da177e4SLinus Torvalds oldpage = page; 2871da177e4SLinus Torvalds } 2881da177e4SLinus Torvalds page += PAGE_SIZE; 2891da177e4SLinus Torvalds } 2901da177e4SLinus Torvalds } 2911da177e4SLinus Torvalds 292260489faSDavid S. Miller sg->dvma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 2931da177e4SLinus Torvalds sg->dvma_length = (__u32) sg->length; 2940912a5dbSJens Axboe sg = sg_next(sg); 2951da177e4SLinus Torvalds } 2961da177e4SLinus Torvalds } 2971da177e4SLinus Torvalds 298260489faSDavid S. Miller static void iommu_release_one(struct device *dev, u32 busa, int npages) 2991da177e4SLinus Torvalds { 300260489faSDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3011da177e4SLinus Torvalds int ioptex; 3021da177e4SLinus Torvalds int i; 3031da177e4SLinus Torvalds 3041ae61388SEric Sesterhenn BUG_ON(busa < iommu->start); 3051da177e4SLinus Torvalds ioptex = (busa - iommu->start) >> PAGE_SHIFT; 3061da177e4SLinus Torvalds for (i = 0; i < npages; i++) { 3071da177e4SLinus Torvalds iopte_val(iommu->page_table[ioptex + i]) = 0; 3081da177e4SLinus Torvalds iommu_invalidate_page(iommu->regs, busa); 3091da177e4SLinus Torvalds busa += PAGE_SIZE; 3101da177e4SLinus Torvalds } 3111da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, npages); 3121da177e4SLinus Torvalds } 3131da177e4SLinus Torvalds 314260489faSDavid S. Miller static void iommu_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len) 3151da177e4SLinus Torvalds { 3161da177e4SLinus Torvalds unsigned long off; 3171da177e4SLinus Torvalds int npages; 3181da177e4SLinus Torvalds 3191da177e4SLinus Torvalds off = vaddr & ~PAGE_MASK; 3201da177e4SLinus Torvalds npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 321260489faSDavid S. Miller iommu_release_one(dev, vaddr & PAGE_MASK, npages); 3221da177e4SLinus Torvalds } 3231da177e4SLinus Torvalds 324260489faSDavid S. Miller static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 3251da177e4SLinus Torvalds { 3261da177e4SLinus Torvalds int n; 3271da177e4SLinus Torvalds 3281da177e4SLinus Torvalds while(sz != 0) { 3291da177e4SLinus Torvalds --sz; 3301da177e4SLinus Torvalds 3311da177e4SLinus Torvalds n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 332260489faSDavid S. Miller iommu_release_one(dev, sg->dvma_address & PAGE_MASK, n); 3331da177e4SLinus Torvalds sg->dvma_address = 0x21212121; 3340912a5dbSJens Axboe sg = sg_next(sg); 3351da177e4SLinus Torvalds } 3361da177e4SLinus Torvalds } 3371da177e4SLinus Torvalds 3381da177e4SLinus Torvalds #ifdef CONFIG_SBUS 3394b1c5df2SDavid S. Miller static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, 3401da177e4SLinus Torvalds unsigned long addr, int len) 3411da177e4SLinus Torvalds { 3424b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 3431da177e4SLinus Torvalds unsigned long page, end; 3441da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 3451da177e4SLinus Torvalds iopte_t *first; 3461da177e4SLinus Torvalds int ioptex; 3471da177e4SLinus Torvalds 3481ae61388SEric Sesterhenn BUG_ON((va & ~PAGE_MASK) != 0); 3491ae61388SEric Sesterhenn BUG_ON((addr & ~PAGE_MASK) != 0); 3501ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 3511da177e4SLinus Torvalds 3521da177e4SLinus Torvalds /* page color = physical address */ 3531da177e4SLinus Torvalds ioptex = bit_map_string_get(&iommu->usemap, len >> PAGE_SHIFT, 3541da177e4SLinus Torvalds addr >> PAGE_SHIFT); 3551da177e4SLinus Torvalds if (ioptex < 0) 3561da177e4SLinus Torvalds panic("iommu out"); 3571da177e4SLinus Torvalds 3581da177e4SLinus Torvalds iopte += ioptex; 3591da177e4SLinus Torvalds first = iopte; 3601da177e4SLinus Torvalds end = addr + len; 3611da177e4SLinus Torvalds while(addr < end) { 3621da177e4SLinus Torvalds page = va; 3631da177e4SLinus Torvalds { 3641da177e4SLinus Torvalds pgd_t *pgdp; 3651da177e4SLinus Torvalds pmd_t *pmdp; 3661da177e4SLinus Torvalds pte_t *ptep; 3671da177e4SLinus Torvalds 3681da177e4SLinus Torvalds if (viking_mxcc_present) 3691da177e4SLinus Torvalds viking_mxcc_flush_page(page); 3701da177e4SLinus Torvalds else if (viking_flush) 3711da177e4SLinus Torvalds viking_flush_page(page); 3721da177e4SLinus Torvalds else 3731da177e4SLinus Torvalds __flush_page_to_ram(page); 3741da177e4SLinus Torvalds 3751da177e4SLinus Torvalds pgdp = pgd_offset(&init_mm, addr); 3761da177e4SLinus Torvalds pmdp = pmd_offset(pgdp, addr); 3771da177e4SLinus Torvalds ptep = pte_offset_map(pmdp, addr); 3781da177e4SLinus Torvalds 3791da177e4SLinus Torvalds set_pte(ptep, mk_pte(virt_to_page(page), dvma_prot)); 3801da177e4SLinus Torvalds } 3811da177e4SLinus Torvalds iopte_val(*iopte++) = 3821da177e4SLinus Torvalds MKIOPTE(page_to_pfn(virt_to_page(page)), ioperm_noc); 3831da177e4SLinus Torvalds addr += PAGE_SIZE; 3841da177e4SLinus Torvalds va += PAGE_SIZE; 3851da177e4SLinus Torvalds } 3861da177e4SLinus Torvalds /* P3: why do we need this? 3871da177e4SLinus Torvalds * 3881da177e4SLinus Torvalds * DAVEM: Because there are several aspects, none of which 3891da177e4SLinus Torvalds * are handled by a single interface. Some cpus are 3901da177e4SLinus Torvalds * completely not I/O DMA coherent, and some have 3911da177e4SLinus Torvalds * virtually indexed caches. The driver DMA flushing 3921da177e4SLinus Torvalds * methods handle the former case, but here during 3931da177e4SLinus Torvalds * IOMMU page table modifications, and usage of non-cacheable 3941da177e4SLinus Torvalds * cpu mappings of pages potentially in the cpu caches, we have 3951da177e4SLinus Torvalds * to handle the latter case as well. 3961da177e4SLinus Torvalds */ 3971da177e4SLinus Torvalds flush_cache_all(); 3981da177e4SLinus Torvalds iommu_flush_iotlb(first, len >> PAGE_SHIFT); 3991da177e4SLinus Torvalds flush_tlb_all(); 4001da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 4011da177e4SLinus Torvalds 4021da177e4SLinus Torvalds *pba = iommu->start + (ioptex << PAGE_SHIFT); 4031da177e4SLinus Torvalds return 0; 4041da177e4SLinus Torvalds } 4051da177e4SLinus Torvalds 4064b1c5df2SDavid S. Miller static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len) 4071da177e4SLinus Torvalds { 4084b1c5df2SDavid S. Miller struct iommu_struct *iommu = dev->archdata.iommu; 4091da177e4SLinus Torvalds iopte_t *iopte = iommu->page_table; 4101da177e4SLinus Torvalds unsigned long end; 4111da177e4SLinus Torvalds int ioptex = (busa - iommu->start) >> PAGE_SHIFT; 4121da177e4SLinus Torvalds 4131ae61388SEric Sesterhenn BUG_ON((busa & ~PAGE_MASK) != 0); 4141ae61388SEric Sesterhenn BUG_ON((len & ~PAGE_MASK) != 0); 4151da177e4SLinus Torvalds 4161da177e4SLinus Torvalds iopte += ioptex; 4171da177e4SLinus Torvalds end = busa + len; 4181da177e4SLinus Torvalds while (busa < end) { 4191da177e4SLinus Torvalds iopte_val(*iopte++) = 0; 4201da177e4SLinus Torvalds busa += PAGE_SIZE; 4211da177e4SLinus Torvalds } 4221da177e4SLinus Torvalds flush_tlb_all(); 4231da177e4SLinus Torvalds iommu_invalidate(iommu->regs); 4241da177e4SLinus Torvalds bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT); 4251da177e4SLinus Torvalds } 4261da177e4SLinus Torvalds #endif 4271da177e4SLinus Torvalds 4281da177e4SLinus Torvalds static char *iommu_lockarea(char *vaddr, unsigned long len) 4291da177e4SLinus Torvalds { 4301da177e4SLinus Torvalds return vaddr; 4311da177e4SLinus Torvalds } 4321da177e4SLinus Torvalds 4331da177e4SLinus Torvalds static void iommu_unlockarea(char *vaddr, unsigned long len) 4341da177e4SLinus Torvalds { 4351da177e4SLinus Torvalds } 4361da177e4SLinus Torvalds 4371da177e4SLinus Torvalds void __init ld_mmu_iommu(void) 4381da177e4SLinus Torvalds { 4391da177e4SLinus Torvalds viking_flush = (BTFIXUPVAL_CALL(flush_page_for_dma) == (unsigned long)viking_flush_page); 4401da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_lockarea, iommu_lockarea, BTFIXUPCALL_RETO0); 4411da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_unlockarea, iommu_unlockarea, BTFIXUPCALL_NOP); 4421da177e4SLinus Torvalds 4431da177e4SLinus Torvalds if (!BTFIXUPVAL_CALL(flush_page_for_dma)) { 4441da177e4SLinus Torvalds /* IO coherent chip */ 4451da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_noflush, BTFIXUPCALL_RETO0); 4461da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_noflush, BTFIXUPCALL_NORM); 4471da177e4SLinus Torvalds } else if (flush_page_for_dma_global) { 4481da177e4SLinus Torvalds /* flush_page_for_dma flushes everything, no matter of what page is it */ 4491da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_gflush, BTFIXUPCALL_NORM); 4501da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_gflush, BTFIXUPCALL_NORM); 4511da177e4SLinus Torvalds } else { 4521da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_pflush, BTFIXUPCALL_NORM); 4531da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_pflush, BTFIXUPCALL_NORM); 4541da177e4SLinus Torvalds } 4551da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_release_scsi_one, iommu_release_scsi_one, BTFIXUPCALL_NORM); 4561da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_release_scsi_sgl, iommu_release_scsi_sgl, BTFIXUPCALL_NORM); 4571da177e4SLinus Torvalds 4581da177e4SLinus Torvalds #ifdef CONFIG_SBUS 4591da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_map_dma_area, iommu_map_dma_area, BTFIXUPCALL_NORM); 4601da177e4SLinus Torvalds BTFIXUPSET_CALL(mmu_unmap_dma_area, iommu_unmap_dma_area, BTFIXUPCALL_NORM); 4611da177e4SLinus Torvalds #endif 4621da177e4SLinus Torvalds 4631da177e4SLinus Torvalds if (viking_mxcc_present || srmmu_modtype == HyperSparc) { 4641da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV); 4651da177e4SLinus Torvalds ioperm_noc = IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID; 4661da177e4SLinus Torvalds } else { 4671da177e4SLinus Torvalds dvma_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV); 4681da177e4SLinus Torvalds ioperm_noc = IOPTE_WRITE | IOPTE_VALID; 4691da177e4SLinus Torvalds } 4701da177e4SLinus Torvalds } 471