1 /* sun4m_smp.c: Sparc SUN4M SMP support. 2 * 3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 4 */ 5 6 #include <asm/head.h> 7 8 #include <linux/kernel.h> 9 #include <linux/sched.h> 10 #include <linux/threads.h> 11 #include <linux/smp.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel_stat.h> 14 #include <linux/init.h> 15 #include <linux/spinlock.h> 16 #include <linux/mm.h> 17 #include <linux/swap.h> 18 #include <linux/profile.h> 19 #include <linux/delay.h> 20 #include <linux/cpu.h> 21 22 #include <asm/cacheflush.h> 23 #include <asm/tlbflush.h> 24 #include <asm/irq_regs.h> 25 26 #include <asm/ptrace.h> 27 #include <asm/atomic.h> 28 29 #include <asm/irq.h> 30 #include <asm/page.h> 31 #include <asm/pgalloc.h> 32 #include <asm/pgtable.h> 33 #include <asm/oplib.h> 34 #include <asm/cpudata.h> 35 36 #include "irq.h" 37 38 #define IRQ_CROSS_CALL 15 39 40 extern ctxd_t *srmmu_ctx_table_phys; 41 42 extern volatile unsigned long cpu_callin_map[NR_CPUS]; 43 extern unsigned char boot_cpu_id; 44 45 extern cpumask_t smp_commenced_mask; 46 47 extern int __smp4m_processor_id(void); 48 49 /*#define SMP_DEBUG*/ 50 51 #ifdef SMP_DEBUG 52 #define SMP_PRINTK(x) printk x 53 #else 54 #define SMP_PRINTK(x) 55 #endif 56 57 static inline unsigned long 58 swap_ulong(volatile unsigned long *ptr, unsigned long val) 59 { 60 __asm__ __volatile__("swap [%1], %0\n\t" : 61 "=&r" (val), "=&r" (ptr) : 62 "0" (val), "1" (ptr)); 63 return val; 64 } 65 66 static void smp_setup_percpu_timer(void); 67 extern void cpu_probe(void); 68 69 void __cpuinit smp4m_callin(void) 70 { 71 int cpuid = hard_smp_processor_id(); 72 73 local_flush_cache_all(); 74 local_flush_tlb_all(); 75 76 notify_cpu_starting(cpuid); 77 78 /* Get our local ticker going. */ 79 smp_setup_percpu_timer(); 80 81 calibrate_delay(); 82 smp_store_cpu_info(cpuid); 83 84 local_flush_cache_all(); 85 local_flush_tlb_all(); 86 87 /* 88 * Unblock the master CPU _only_ when the scheduler state 89 * of all secondary CPUs will be up-to-date, so after 90 * the SMP initialization the master will be just allowed 91 * to call the scheduler code. 92 */ 93 /* Allow master to continue. */ 94 swap_ulong(&cpu_callin_map[cpuid], 1); 95 96 /* XXX: What's up with all the flushes? */ 97 local_flush_cache_all(); 98 local_flush_tlb_all(); 99 100 cpu_probe(); 101 102 /* Fix idle thread fields. */ 103 __asm__ __volatile__("ld [%0], %%g6\n\t" 104 : : "r" (¤t_set[cpuid]) 105 : "memory" /* paranoid */); 106 107 /* Attach to the address space of init_task. */ 108 atomic_inc(&init_mm.mm_count); 109 current->active_mm = &init_mm; 110 111 while (!cpu_isset(cpuid, smp_commenced_mask)) 112 mb(); 113 114 local_irq_enable(); 115 116 cpu_set(cpuid, cpu_online_map); 117 } 118 119 /* 120 * Cycle through the processors asking the PROM to start each one. 121 */ 122 123 extern struct linux_prom_registers smp_penguin_ctable; 124 extern unsigned long trapbase_cpu1[]; 125 extern unsigned long trapbase_cpu2[]; 126 extern unsigned long trapbase_cpu3[]; 127 128 void __init smp4m_boot_cpus(void) 129 { 130 smp_setup_percpu_timer(); 131 local_flush_cache_all(); 132 } 133 134 int __cpuinit smp4m_boot_one_cpu(int i) 135 { 136 extern unsigned long sun4m_cpu_startup; 137 unsigned long *entry = &sun4m_cpu_startup; 138 struct task_struct *p; 139 int timeout; 140 int cpu_node; 141 142 cpu_find_by_mid(i, &cpu_node); 143 144 /* Cook up an idler for this guy. */ 145 p = fork_idle(i); 146 current_set[i] = task_thread_info(p); 147 /* See trampoline.S for details... */ 148 entry += ((i-1) * 3); 149 150 /* 151 * Initialize the contexts table 152 * Since the call to prom_startcpu() trashes the structure, 153 * we need to re-initialize it for each cpu 154 */ 155 smp_penguin_ctable.which_io = 0; 156 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys; 157 smp_penguin_ctable.reg_size = 0; 158 159 /* whirrr, whirrr, whirrrrrrrrr... */ 160 printk("Starting CPU %d at %p\n", i, entry); 161 local_flush_cache_all(); 162 prom_startcpu(cpu_node, 163 &smp_penguin_ctable, 0, (char *)entry); 164 165 /* wheee... it's going... */ 166 for(timeout = 0; timeout < 10000; timeout++) { 167 if(cpu_callin_map[i]) 168 break; 169 udelay(200); 170 } 171 172 if (!(cpu_callin_map[i])) { 173 printk("Processor %d is stuck.\n", i); 174 return -ENODEV; 175 } 176 177 local_flush_cache_all(); 178 return 0; 179 } 180 181 void __init smp4m_smp_done(void) 182 { 183 int i, first; 184 int *prev; 185 186 /* setup cpu list for irq rotation */ 187 first = 0; 188 prev = &first; 189 for (i = 0; i < NR_CPUS; i++) { 190 if (cpu_online(i)) { 191 *prev = i; 192 prev = &cpu_data(i).next; 193 } 194 } 195 *prev = first; 196 local_flush_cache_all(); 197 198 /* Free unneeded trap tables */ 199 if (!cpu_isset(1, cpu_present_map)) { 200 ClearPageReserved(virt_to_page(trapbase_cpu1)); 201 init_page_count(virt_to_page(trapbase_cpu1)); 202 free_page((unsigned long)trapbase_cpu1); 203 totalram_pages++; 204 num_physpages++; 205 } 206 if (!cpu_isset(2, cpu_present_map)) { 207 ClearPageReserved(virt_to_page(trapbase_cpu2)); 208 init_page_count(virt_to_page(trapbase_cpu2)); 209 free_page((unsigned long)trapbase_cpu2); 210 totalram_pages++; 211 num_physpages++; 212 } 213 if (!cpu_isset(3, cpu_present_map)) { 214 ClearPageReserved(virt_to_page(trapbase_cpu3)); 215 init_page_count(virt_to_page(trapbase_cpu3)); 216 free_page((unsigned long)trapbase_cpu3); 217 totalram_pages++; 218 num_physpages++; 219 } 220 221 /* Ok, they are spinning and ready to go. */ 222 } 223 224 /* At each hardware IRQ, we get this called to forward IRQ reception 225 * to the next processor. The caller must disable the IRQ level being 226 * serviced globally so that there are no double interrupts received. 227 * 228 * XXX See sparc64 irq.c. 229 */ 230 void smp4m_irq_rotate(int cpu) 231 { 232 int next = cpu_data(cpu).next; 233 if (next != cpu) 234 set_irq_udt(next); 235 } 236 237 static struct smp_funcall { 238 smpfunc_t func; 239 unsigned long arg1; 240 unsigned long arg2; 241 unsigned long arg3; 242 unsigned long arg4; 243 unsigned long arg5; 244 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */ 245 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */ 246 } ccall_info; 247 248 static DEFINE_SPINLOCK(cross_call_lock); 249 250 /* Cross calls must be serialized, at least currently. */ 251 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1, 252 unsigned long arg2, unsigned long arg3, 253 unsigned long arg4) 254 { 255 register int ncpus = SUN4M_NCPUS; 256 unsigned long flags; 257 258 spin_lock_irqsave(&cross_call_lock, flags); 259 260 /* Init function glue. */ 261 ccall_info.func = func; 262 ccall_info.arg1 = arg1; 263 ccall_info.arg2 = arg2; 264 ccall_info.arg3 = arg3; 265 ccall_info.arg4 = arg4; 266 ccall_info.arg5 = 0; 267 268 /* Init receive/complete mapping, plus fire the IPI's off. */ 269 { 270 register int i; 271 272 cpu_clear(smp_processor_id(), mask); 273 cpus_and(mask, cpu_online_map, mask); 274 for(i = 0; i < ncpus; i++) { 275 if (cpu_isset(i, mask)) { 276 ccall_info.processors_in[i] = 0; 277 ccall_info.processors_out[i] = 0; 278 set_cpu_int(i, IRQ_CROSS_CALL); 279 } else { 280 ccall_info.processors_in[i] = 1; 281 ccall_info.processors_out[i] = 1; 282 } 283 } 284 } 285 286 { 287 register int i; 288 289 i = 0; 290 do { 291 if (!cpu_isset(i, mask)) 292 continue; 293 while(!ccall_info.processors_in[i]) 294 barrier(); 295 } while(++i < ncpus); 296 297 i = 0; 298 do { 299 if (!cpu_isset(i, mask)) 300 continue; 301 while(!ccall_info.processors_out[i]) 302 barrier(); 303 } while(++i < ncpus); 304 } 305 306 spin_unlock_irqrestore(&cross_call_lock, flags); 307 } 308 309 /* Running cross calls. */ 310 void smp4m_cross_call_irq(void) 311 { 312 int i = smp_processor_id(); 313 314 ccall_info.processors_in[i] = 1; 315 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3, 316 ccall_info.arg4, ccall_info.arg5); 317 ccall_info.processors_out[i] = 1; 318 } 319 320 extern void sun4m_clear_profile_irq(int cpu); 321 322 void smp4m_percpu_timer_interrupt(struct pt_regs *regs) 323 { 324 struct pt_regs *old_regs; 325 int cpu = smp_processor_id(); 326 327 old_regs = set_irq_regs(regs); 328 329 sun4m_clear_profile_irq(cpu); 330 331 profile_tick(CPU_PROFILING); 332 333 if(!--prof_counter(cpu)) { 334 int user = user_mode(regs); 335 336 irq_enter(); 337 update_process_times(user); 338 irq_exit(); 339 340 prof_counter(cpu) = prof_multiplier(cpu); 341 } 342 set_irq_regs(old_regs); 343 } 344 345 extern unsigned int lvl14_resolution; 346 347 static void __cpuinit smp_setup_percpu_timer(void) 348 { 349 int cpu = smp_processor_id(); 350 351 prof_counter(cpu) = prof_multiplier(cpu) = 1; 352 load_profile_irq(cpu, lvl14_resolution); 353 354 if(cpu == boot_cpu_id) 355 enable_pil_irq(14); 356 } 357 358 static void __init smp4m_blackbox_id(unsigned *addr) 359 { 360 int rd = *addr & 0x3e000000; 361 int rs1 = rd >> 11; 362 363 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */ 364 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */ 365 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */ 366 } 367 368 static void __init smp4m_blackbox_current(unsigned *addr) 369 { 370 int rd = *addr & 0x3e000000; 371 int rs1 = rd >> 11; 372 373 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */ 374 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */ 375 addr[4] = 0x8008200c | rd | rs1; /* and reg, 0xc, reg */ 376 } 377 378 void __init sun4m_init_smp(void) 379 { 380 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id); 381 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current); 382 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM); 383 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM); 384 } 385