1 /* 2 * pcic.c: MicroSPARC-IIep PCI controller support 3 * 4 * Copyright (C) 1998 V. Roganov and G. Raiko 5 * 6 * Code is derived from Ultra/PCI PSYCHO controller support, see that 7 * for author info. 8 * 9 * Support for diverse IIep based platforms by Pete Zaitcev. 10 * CP-1200 by Eric Brower. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/init.h> 16 #include <linux/mm.h> 17 #include <linux/slab.h> 18 #include <linux/jiffies.h> 19 20 #include <asm/ebus.h> 21 #include <asm/sbus.h> /* for sanity check... */ 22 #include <asm/swift.h> /* for cache flushing. */ 23 #include <asm/io.h> 24 25 #include <linux/ctype.h> 26 #include <linux/pci.h> 27 #include <linux/time.h> 28 #include <linux/timex.h> 29 #include <linux/interrupt.h> 30 31 #include <asm/irq.h> 32 #include <asm/oplib.h> 33 #include <asm/prom.h> 34 #include <asm/pcic.h> 35 #include <asm/timer.h> 36 #include <asm/uaccess.h> 37 #include <asm/irq_regs.h> 38 39 40 unsigned int pcic_pin_to_irq(unsigned int pin, char *name); 41 42 /* 43 * I studied different documents and many live PROMs both from 2.30 44 * family and 3.xx versions. I came to the amazing conclusion: there is 45 * absolutely no way to route interrupts in IIep systems relying on 46 * information which PROM presents. We must hardcode interrupt routing 47 * schematics. And this actually sucks. -- zaitcev 1999/05/12 48 * 49 * To find irq for a device we determine which routing map 50 * is in effect or, in other words, on which machine we are running. 51 * We use PROM name for this although other techniques may be used 52 * in special cases (Gleb reports a PROMless IIep based system). 53 * Once we know the map we take device configuration address and 54 * find PCIC pin number where INT line goes. Then we may either program 55 * preferred irq into the PCIC or supply the preexisting irq to the device. 56 */ 57 struct pcic_ca2irq { 58 unsigned char busno; /* PCI bus number */ 59 unsigned char devfn; /* Configuration address */ 60 unsigned char pin; /* PCIC external interrupt pin */ 61 unsigned char irq; /* Preferred IRQ (mappable in PCIC) */ 62 unsigned int force; /* Enforce preferred IRQ */ 63 }; 64 65 struct pcic_sn2list { 66 char *sysname; 67 struct pcic_ca2irq *intmap; 68 int mapdim; 69 }; 70 71 /* 72 * JavaEngine-1 apparently has different versions. 73 * 74 * According to communications with Sun folks, for P2 build 501-4628-03: 75 * pin 0 - parallel, audio; 76 * pin 1 - Ethernet; 77 * pin 2 - su; 78 * pin 3 - PS/2 kbd and mouse. 79 * 80 * OEM manual (805-1486): 81 * pin 0: Ethernet 82 * pin 1: All EBus 83 * pin 2: IGA (unused) 84 * pin 3: Not connected 85 * OEM manual says that 501-4628 & 501-4811 are the same thing, 86 * only the latter has NAND flash in place. 87 * 88 * So far unofficial Sun wins over the OEM manual. Poor OEMs... 89 */ 90 static struct pcic_ca2irq pcic_i_je1a[] = { /* 501-4811-03 */ 91 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */ 92 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */ 93 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */ 94 }; 95 96 /* XXX JS-E entry is incomplete - PCI Slot 2 address (pin 7)? */ 97 static struct pcic_ca2irq pcic_i_jse[] = { 98 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */ 99 { 0, 0x01, 1, 6, 0 }, /* hme */ 100 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */ 101 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */ 102 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */ 103 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */ 104 { 0, 0x80, 5, 11, 0 }, /* EIDE */ 105 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */ 106 { 0, 0xA0, 4, 9, 0 }, /* USB */ 107 /* 108 * Some pins belong to non-PCI devices, we hardcode them in drivers. 109 * sun4m timers - irq 10, 14 110 * PC style RTC - pin 7, irq 4 ? 111 * Smart card, Parallel - pin 4 shared with USB, ISA 112 * audio - pin 3, irq 5 ? 113 */ 114 }; 115 116 /* SPARCengine-6 was the original release name of CP1200. 117 * The documentation differs between the two versions 118 */ 119 static struct pcic_ca2irq pcic_i_se6[] = { 120 { 0, 0x08, 0, 2, 0 }, /* SCSI */ 121 { 0, 0x01, 1, 6, 0 }, /* HME */ 122 { 0, 0x00, 3, 13, 0 }, /* EBus */ 123 }; 124 125 /* 126 * Krups (courtesy of Varol Kaptan) 127 * No documentation available, but it was easy to guess 128 * because it was very similar to Espresso. 129 * 130 * pin 0 - kbd, mouse, serial; 131 * pin 1 - Ethernet; 132 * pin 2 - igs (we do not use it); 133 * pin 3 - audio; 134 * pin 4,5,6 - unused; 135 * pin 7 - RTC (from P2 onwards as David B. says). 136 */ 137 static struct pcic_ca2irq pcic_i_jk[] = { 138 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */ 139 { 0, 0x01, 1, 6, 0 }, /* hme */ 140 }; 141 142 /* 143 * Several entries in this list may point to the same routing map 144 * as several PROMs may be installed on the same physical board. 145 */ 146 #define SN2L_INIT(name, map) \ 147 { name, map, ARRAY_SIZE(map) } 148 149 static struct pcic_sn2list pcic_known_sysnames[] = { 150 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a), /* JE1, PROM 2.32 */ 151 SN2L_INIT("SUNW,JS-E", pcic_i_jse), /* PROLL JavaStation-E */ 152 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6), /* SPARCengine-6/CP-1200 */ 153 SN2L_INIT("SUNW,JS-NC", pcic_i_jk), /* PROLL JavaStation-NC */ 154 SN2L_INIT("SUNW,JSIIep", pcic_i_jk), /* OBP JavaStation-NC */ 155 { NULL, NULL, 0 } 156 }; 157 158 /* 159 * Only one PCIC per IIep, 160 * and since we have no SMP IIep, only one per system. 161 */ 162 static int pcic0_up; 163 static struct linux_pcic pcic0; 164 165 void __iomem *pcic_regs; 166 volatile int pcic_speculative; 167 volatile int pcic_trapped; 168 169 static void pci_do_gettimeofday(struct timeval *tv); 170 static int pci_do_settimeofday(struct timespec *tv); 171 172 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3)) 173 174 static int pcic_read_config_dword(unsigned int busno, unsigned int devfn, 175 int where, u32 *value) 176 { 177 struct linux_pcic *pcic; 178 unsigned long flags; 179 180 pcic = &pcic0; 181 182 local_irq_save(flags); 183 #if 0 /* does not fail here */ 184 pcic_speculative = 1; 185 pcic_trapped = 0; 186 #endif 187 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); 188 #if 0 /* does not fail here */ 189 nop(); 190 if (pcic_trapped) { 191 local_irq_restore(flags); 192 *value = ~0; 193 return 0; 194 } 195 #endif 196 pcic_speculative = 2; 197 pcic_trapped = 0; 198 *value = readl(pcic->pcic_config_space_data + (where&4)); 199 nop(); 200 if (pcic_trapped) { 201 pcic_speculative = 0; 202 local_irq_restore(flags); 203 *value = ~0; 204 return 0; 205 } 206 pcic_speculative = 0; 207 local_irq_restore(flags); 208 return 0; 209 } 210 211 static int pcic_read_config(struct pci_bus *bus, unsigned int devfn, 212 int where, int size, u32 *val) 213 { 214 unsigned int v; 215 216 if (bus->number != 0) return -EINVAL; 217 switch (size) { 218 case 1: 219 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 220 *val = 0xff & (v >> (8*(where & 3))); 221 return 0; 222 case 2: 223 if (where&1) return -EINVAL; 224 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 225 *val = 0xffff & (v >> (8*(where & 3))); 226 return 0; 227 case 4: 228 if (where&3) return -EINVAL; 229 pcic_read_config_dword(bus->number, devfn, where&~3, val); 230 return 0; 231 } 232 return -EINVAL; 233 } 234 235 static int pcic_write_config_dword(unsigned int busno, unsigned int devfn, 236 int where, u32 value) 237 { 238 struct linux_pcic *pcic; 239 unsigned long flags; 240 241 pcic = &pcic0; 242 243 local_irq_save(flags); 244 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); 245 writel(value, pcic->pcic_config_space_data + (where&4)); 246 local_irq_restore(flags); 247 return 0; 248 } 249 250 static int pcic_write_config(struct pci_bus *bus, unsigned int devfn, 251 int where, int size, u32 val) 252 { 253 unsigned int v; 254 255 if (bus->number != 0) return -EINVAL; 256 switch (size) { 257 case 1: 258 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 259 v = (v & ~(0xff << (8*(where&3)))) | 260 ((0xff&val) << (8*(where&3))); 261 return pcic_write_config_dword(bus->number, devfn, where&~3, v); 262 case 2: 263 if (where&1) return -EINVAL; 264 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 265 v = (v & ~(0xffff << (8*(where&3)))) | 266 ((0xffff&val) << (8*(where&3))); 267 return pcic_write_config_dword(bus->number, devfn, where&~3, v); 268 case 4: 269 if (where&3) return -EINVAL; 270 return pcic_write_config_dword(bus->number, devfn, where, val); 271 } 272 return -EINVAL; 273 } 274 275 static struct pci_ops pcic_ops = { 276 .read = pcic_read_config, 277 .write = pcic_write_config, 278 }; 279 280 /* 281 * On sparc64 pcibios_init() calls pci_controller_probe(). 282 * We want PCIC probed little ahead so that interrupt controller 283 * would be operational. 284 */ 285 int __init pcic_probe(void) 286 { 287 struct linux_pcic *pcic; 288 struct linux_prom_registers regs[PROMREG_MAX]; 289 struct linux_pbm_info* pbm; 290 char namebuf[64]; 291 int node; 292 int err; 293 294 if (pcic0_up) { 295 prom_printf("PCIC: called twice!\n"); 296 prom_halt(); 297 } 298 pcic = &pcic0; 299 300 node = prom_getchild (prom_root_node); 301 node = prom_searchsiblings (node, "pci"); 302 if (node == 0) 303 return -ENODEV; 304 /* 305 * Map in PCIC register set, config space, and IO base 306 */ 307 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs)); 308 if (err == 0 || err == -1) { 309 prom_printf("PCIC: Error, cannot get PCIC registers " 310 "from PROM.\n"); 311 prom_halt(); 312 } 313 314 pcic0_up = 1; 315 316 pcic->pcic_res_regs.name = "pcic_registers"; 317 pcic->pcic_regs = ioremap(regs[0].phys_addr, regs[0].reg_size); 318 if (!pcic->pcic_regs) { 319 prom_printf("PCIC: Error, cannot map PCIC registers.\n"); 320 prom_halt(); 321 } 322 323 pcic->pcic_res_io.name = "pcic_io"; 324 if ((pcic->pcic_io = (unsigned long) 325 ioremap(regs[1].phys_addr, 0x10000)) == 0) { 326 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n"); 327 prom_halt(); 328 } 329 330 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr"; 331 if ((pcic->pcic_config_space_addr = 332 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == 0) { 333 prom_printf("PCIC: Error, cannot map" 334 "PCI Configuration Space Address.\n"); 335 prom_halt(); 336 } 337 338 /* 339 * Docs say three least significant bits in address and data 340 * must be the same. Thus, we need adjust size of data. 341 */ 342 pcic->pcic_res_cfg_data.name = "pcic_cfg_data"; 343 if ((pcic->pcic_config_space_data = 344 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == 0) { 345 prom_printf("PCIC: Error, cannot map" 346 "PCI Configuration Space Data.\n"); 347 prom_halt(); 348 } 349 350 pbm = &pcic->pbm; 351 pbm->prom_node = node; 352 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 353 strcpy(pbm->prom_name, namebuf); 354 355 { 356 extern volatile int t_nmi[1]; 357 extern int pcic_nmi_trap_patch[1]; 358 359 t_nmi[0] = pcic_nmi_trap_patch[0]; 360 t_nmi[1] = pcic_nmi_trap_patch[1]; 361 t_nmi[2] = pcic_nmi_trap_patch[2]; 362 t_nmi[3] = pcic_nmi_trap_patch[3]; 363 swift_flush_dcache(); 364 pcic_regs = pcic->pcic_regs; 365 } 366 367 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0; 368 { 369 struct pcic_sn2list *p; 370 371 for (p = pcic_known_sysnames; p->sysname != NULL; p++) { 372 if (strcmp(namebuf, p->sysname) == 0) 373 break; 374 } 375 pcic->pcic_imap = p->intmap; 376 pcic->pcic_imdim = p->mapdim; 377 } 378 if (pcic->pcic_imap == NULL) { 379 /* 380 * We do not panic here for the sake of embedded systems. 381 */ 382 printk("PCIC: System %s is unknown, cannot route interrupts\n", 383 namebuf); 384 } 385 386 return 0; 387 } 388 389 static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic) 390 { 391 struct linux_pbm_info *pbm = &pcic->pbm; 392 393 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm); 394 #if 0 /* deadwood transplanted from sparc64 */ 395 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node); 396 pci_record_assignments(pbm, pbm->pci_bus); 397 pci_assign_unassigned(pbm, pbm->pci_bus); 398 pci_fixup_irq(pbm, pbm->pci_bus); 399 #endif 400 } 401 402 /* 403 * Main entry point from the PCI subsystem. 404 */ 405 static int __init pcic_init(void) 406 { 407 struct linux_pcic *pcic; 408 409 /* 410 * PCIC should be initialized at start of the timer. 411 * So, here we report the presence of PCIC and do some magic passes. 412 */ 413 if(!pcic0_up) 414 return 0; 415 pcic = &pcic0; 416 417 /* 418 * Switch off IOTLB translation. 419 */ 420 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE, 421 pcic->pcic_regs+PCI_DVMA_CONTROL); 422 423 /* 424 * Increase mapped size for PCI memory space (DMA access). 425 * Should be done in that order (size first, address second). 426 * Why we couldn't set up 4GB and forget about it? XXX 427 */ 428 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0); 429 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY, 430 pcic->pcic_regs+PCI_BASE_ADDRESS_0); 431 432 pcic_pbm_scan_bus(pcic); 433 434 ebus_init(); 435 return 0; 436 } 437 438 int pcic_present(void) 439 { 440 return pcic0_up; 441 } 442 443 static int __init pdev_to_pnode(struct linux_pbm_info *pbm, 444 struct pci_dev *pdev) 445 { 446 struct linux_prom_pci_registers regs[PROMREG_MAX]; 447 int err; 448 int node = prom_getchild(pbm->prom_node); 449 450 while(node) { 451 err = prom_getproperty(node, "reg", 452 (char *)®s[0], sizeof(regs)); 453 if(err != 0 && err != -1) { 454 unsigned long devfn = (regs[0].which_io >> 8) & 0xff; 455 if(devfn == pdev->devfn) 456 return node; 457 } 458 node = prom_getsibling(node); 459 } 460 return 0; 461 } 462 463 static inline struct pcidev_cookie *pci_devcookie_alloc(void) 464 { 465 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC); 466 } 467 468 static void pcic_map_pci_device(struct linux_pcic *pcic, 469 struct pci_dev *dev, int node) 470 { 471 char namebuf[64]; 472 unsigned long address; 473 unsigned long flags; 474 int j; 475 476 if (node == 0 || node == -1) { 477 strcpy(namebuf, "???"); 478 } else { 479 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 480 } 481 482 for (j = 0; j < 6; j++) { 483 address = dev->resource[j].start; 484 if (address == 0) break; /* are sequential */ 485 flags = dev->resource[j].flags; 486 if ((flags & IORESOURCE_IO) != 0) { 487 if (address < 0x10000) { 488 /* 489 * A device responds to I/O cycles on PCI. 490 * We generate these cycles with memory 491 * access into the fixed map (phys 0x30000000). 492 * 493 * Since a device driver does not want to 494 * do ioremap() before accessing PC-style I/O, 495 * we supply virtual, ready to access address. 496 * 497 * Ebus devices do not come here even if 498 * CheerIO makes a similar conversion. 499 * See ebus.c for details. 500 * 501 * Note that request_region() 502 * works for these devices. 503 * 504 * XXX Neat trick, but it's a *bad* idea 505 * to shit into regions like that. 506 * What if we want to allocate one more 507 * PCI base address... 508 */ 509 dev->resource[j].start = 510 pcic->pcic_io + address; 511 dev->resource[j].end = 1; /* XXX */ 512 dev->resource[j].flags = 513 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM; 514 } else { 515 /* 516 * OOPS... PCI Spec allows this. Sun does 517 * not have any devices getting above 64K 518 * so it must be user with a weird I/O 519 * board in a PCI slot. We must remap it 520 * under 64K but it is not done yet. XXX 521 */ 522 printk("PCIC: Skipping I/O space at 0x%lx," 523 "this will Oops if a driver attaches;" 524 "device '%s' at %02x:%02x)\n", address, 525 namebuf, dev->bus->number, dev->devfn); 526 } 527 } 528 } 529 } 530 531 static void 532 pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node) 533 { 534 struct pcic_ca2irq *p; 535 int i, ivec; 536 char namebuf[64]; 537 538 if (node == 0 || node == -1) { 539 strcpy(namebuf, "???"); 540 } else { 541 prom_getstring(node, "name", namebuf, sizeof(namebuf)); 542 } 543 544 if ((p = pcic->pcic_imap) == 0) { 545 dev->irq = 0; 546 return; 547 } 548 for (i = 0; i < pcic->pcic_imdim; i++) { 549 if (p->busno == dev->bus->number && p->devfn == dev->devfn) 550 break; 551 p++; 552 } 553 if (i >= pcic->pcic_imdim) { 554 printk("PCIC: device %s devfn %02x:%02x not found in %d\n", 555 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim); 556 dev->irq = 0; 557 return; 558 } 559 560 i = p->pin; 561 if (i >= 0 && i < 4) { 562 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 563 dev->irq = ivec >> (i << 2) & 0xF; 564 } else if (i >= 4 && i < 8) { 565 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 566 dev->irq = ivec >> ((i-4) << 2) & 0xF; 567 } else { /* Corrupted map */ 568 printk("PCIC: BAD PIN %d\n", i); for (;;) {} 569 } 570 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */ 571 572 /* 573 * dev->irq=0 means PROM did not bother to program the upper 574 * half of PCIC. This happens on JS-E with PROM 3.11, for instance. 575 */ 576 if (dev->irq == 0 || p->force) { 577 if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */ 578 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {} 579 } 580 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n", 581 p->irq, p->pin, dev->bus->number, dev->devfn); 582 dev->irq = p->irq; 583 584 i = p->pin; 585 if (i >= 4) { 586 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 587 ivec &= ~(0xF << ((i - 4) << 2)); 588 ivec |= p->irq << ((i - 4) << 2); 589 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI); 590 } else { 591 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 592 ivec &= ~(0xF << (i << 2)); 593 ivec |= p->irq << (i << 2); 594 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO); 595 } 596 } 597 598 return; 599 } 600 601 /* 602 * Normally called from {do_}pci_scan_bus... 603 */ 604 void __init pcibios_fixup_bus(struct pci_bus *bus) 605 { 606 struct pci_dev *dev; 607 int i, has_io, has_mem; 608 unsigned int cmd; 609 struct linux_pcic *pcic; 610 /* struct linux_pbm_info* pbm = &pcic->pbm; */ 611 int node; 612 struct pcidev_cookie *pcp; 613 614 if (!pcic0_up) { 615 printk("pcibios_fixup_bus: no PCIC\n"); 616 return; 617 } 618 pcic = &pcic0; 619 620 /* 621 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus); 622 */ 623 if (bus->number != 0) { 624 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number); 625 return; 626 } 627 628 list_for_each_entry(dev, &bus->devices, bus_list) { 629 630 /* 631 * Comment from i386 branch: 632 * There are buggy BIOSes that forget to enable I/O and memory 633 * access to PCI devices. We try to fix this, but we need to 634 * be sure that the BIOS didn't forget to assign an address 635 * to the device. [mj] 636 * OBP is a case of such BIOS :-) 637 */ 638 has_io = has_mem = 0; 639 for(i=0; i<6; i++) { 640 unsigned long f = dev->resource[i].flags; 641 if (f & IORESOURCE_IO) { 642 has_io = 1; 643 } else if (f & IORESOURCE_MEM) 644 has_mem = 1; 645 } 646 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd); 647 if (has_io && !(cmd & PCI_COMMAND_IO)) { 648 printk("PCIC: Enabling I/O for device %02x:%02x\n", 649 dev->bus->number, dev->devfn); 650 cmd |= PCI_COMMAND_IO; 651 pcic_write_config(dev->bus, dev->devfn, 652 PCI_COMMAND, 2, cmd); 653 } 654 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) { 655 printk("PCIC: Enabling memory for device %02x:%02x\n", 656 dev->bus->number, dev->devfn); 657 cmd |= PCI_COMMAND_MEMORY; 658 pcic_write_config(dev->bus, dev->devfn, 659 PCI_COMMAND, 2, cmd); 660 } 661 662 node = pdev_to_pnode(&pcic->pbm, dev); 663 if(node == 0) 664 node = -1; 665 666 /* cookies */ 667 pcp = pci_devcookie_alloc(); 668 pcp->pbm = &pcic->pbm; 669 pcp->prom_node = of_find_node_by_phandle(node); 670 dev->sysdata = pcp; 671 672 /* fixing I/O to look like memory */ 673 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE) 674 pcic_map_pci_device(pcic, dev, node); 675 676 pcic_fill_irq(pcic, dev, node); 677 } 678 } 679 680 /* 681 * pcic_pin_to_irq() is exported to ebus.c. 682 */ 683 unsigned int 684 pcic_pin_to_irq(unsigned int pin, char *name) 685 { 686 struct linux_pcic *pcic = &pcic0; 687 unsigned int irq; 688 unsigned int ivec; 689 690 if (pin < 4) { 691 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 692 irq = ivec >> (pin << 2) & 0xF; 693 } else if (pin < 8) { 694 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 695 irq = ivec >> ((pin-4) << 2) & 0xF; 696 } else { /* Corrupted map */ 697 printk("PCIC: BAD PIN %d FOR %s\n", pin, name); 698 for (;;) {} /* XXX Cannot panic properly in case of PROLL */ 699 } 700 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */ 701 return irq; 702 } 703 704 /* Makes compiler happy */ 705 static volatile int pcic_timer_dummy; 706 707 static void pcic_clear_clock_irq(void) 708 { 709 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT); 710 } 711 712 static irqreturn_t pcic_timer_handler (int irq, void *h) 713 { 714 write_seqlock(&xtime_lock); /* Dummy, to show that we remember */ 715 pcic_clear_clock_irq(); 716 do_timer(1); 717 #ifndef CONFIG_SMP 718 update_process_times(user_mode(get_irq_regs())); 719 #endif 720 write_sequnlock(&xtime_lock); 721 return IRQ_HANDLED; 722 } 723 724 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */ 725 #define TICK_TIMER_LIMIT ((100*1000000/4)/100) 726 727 void __init pci_time_init(void) 728 { 729 struct linux_pcic *pcic = &pcic0; 730 unsigned long v; 731 int timer_irq, irq; 732 733 /* A hack until do_gettimeofday prototype is moved to arch specific headers 734 and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */ 735 ((unsigned int *)do_gettimeofday)[0] = 736 0x10800000 | ((((unsigned long)pci_do_gettimeofday - 737 (unsigned long)do_gettimeofday) >> 2) & 0x003fffff); 738 ((unsigned int *)do_gettimeofday)[1] = 0x01000000; 739 BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM); 740 btfixup(); 741 742 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT); 743 /* PROM should set appropriate irq */ 744 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ); 745 timer_irq = PCI_COUNTER_IRQ_SYS(v); 746 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0), 747 pcic->pcic_regs+PCI_COUNTER_IRQ); 748 irq = request_irq(timer_irq, pcic_timer_handler, 749 (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); 750 if (irq) { 751 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq); 752 prom_halt(); 753 } 754 local_irq_enable(); 755 } 756 757 static __inline__ unsigned long do_gettimeoffset(void) 758 { 759 /* 760 * We devide all to 100 761 * to have microsecond resolution and to avoid overflow 762 */ 763 unsigned long count = 764 readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW; 765 count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100); 766 return count; 767 } 768 769 static void pci_do_gettimeofday(struct timeval *tv) 770 { 771 unsigned long flags; 772 unsigned long seq; 773 unsigned long usec, sec; 774 unsigned long max_ntp_tick = tick_usec - tickadj; 775 776 do { 777 seq = read_seqbegin_irqsave(&xtime_lock, flags); 778 usec = do_gettimeoffset(); 779 780 /* 781 * If time_adjust is negative then NTP is slowing the clock 782 * so make sure not to go into next possible interval. 783 * Better to lose some accuracy than have time go backwards.. 784 */ 785 if (unlikely(time_adjust < 0)) 786 usec = min(usec, max_ntp_tick); 787 788 sec = xtime.tv_sec; 789 usec += (xtime.tv_nsec / 1000); 790 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); 791 792 while (usec >= 1000000) { 793 usec -= 1000000; 794 sec++; 795 } 796 797 tv->tv_sec = sec; 798 tv->tv_usec = usec; 799 } 800 801 static int pci_do_settimeofday(struct timespec *tv) 802 { 803 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) 804 return -EINVAL; 805 806 /* 807 * This is revolting. We need to set "xtime" correctly. However, the 808 * value in this location is the value at the most recent update of 809 * wall time. Discover what correction gettimeofday() would have 810 * made, and then undo it! 811 */ 812 tv->tv_nsec -= 1000 * do_gettimeoffset(); 813 while (tv->tv_nsec < 0) { 814 tv->tv_nsec += NSEC_PER_SEC; 815 tv->tv_sec--; 816 } 817 818 wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec; 819 wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec; 820 821 if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) { 822 wall_to_monotonic.tv_nsec -= NSEC_PER_SEC; 823 wall_to_monotonic.tv_sec++; 824 } 825 if (wall_to_monotonic.tv_nsec < 0) { 826 wall_to_monotonic.tv_nsec += NSEC_PER_SEC; 827 wall_to_monotonic.tv_sec--; 828 } 829 830 xtime.tv_sec = tv->tv_sec; 831 xtime.tv_nsec = tv->tv_nsec; 832 ntp_clear(); 833 return 0; 834 } 835 836 #if 0 837 static void watchdog_reset() { 838 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS); 839 } 840 #endif 841 842 /* 843 * Other archs parse arguments here. 844 */ 845 char * __init pcibios_setup(char *str) 846 { 847 return str; 848 } 849 850 void pcibios_align_resource(void *data, struct resource *res, 851 resource_size_t size, resource_size_t align) 852 { 853 } 854 855 int pcibios_enable_device(struct pci_dev *pdev, int mask) 856 { 857 return 0; 858 } 859 860 /* 861 * NMI 862 */ 863 void pcic_nmi(unsigned int pend, struct pt_regs *regs) 864 { 865 866 pend = flip_dword(pend); 867 868 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) { 869 /* 870 * XXX On CP-1200 PCI #SERR may happen, we do not know 871 * what to do about it yet. 872 */ 873 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n", 874 pend, (int)regs->pc, pcic_speculative); 875 for (;;) { } 876 } 877 pcic_speculative = 0; 878 pcic_trapped = 1; 879 regs->pc = regs->npc; 880 regs->npc += 4; 881 } 882 883 static inline unsigned long get_irqmask(int irq_nr) 884 { 885 return 1 << irq_nr; 886 } 887 888 static void pcic_disable_irq(unsigned int irq_nr) 889 { 890 unsigned long mask, flags; 891 892 mask = get_irqmask(irq_nr); 893 local_irq_save(flags); 894 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); 895 local_irq_restore(flags); 896 } 897 898 static void pcic_enable_irq(unsigned int irq_nr) 899 { 900 unsigned long mask, flags; 901 902 mask = get_irqmask(irq_nr); 903 local_irq_save(flags); 904 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); 905 local_irq_restore(flags); 906 } 907 908 static void pcic_clear_profile_irq(int cpu) 909 { 910 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); 911 } 912 913 static void pcic_load_profile_irq(int cpu, unsigned int limit) 914 { 915 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); 916 } 917 918 /* We assume the caller has disabled local interrupts when these are called, 919 * or else very bizarre behavior will result. 920 */ 921 static void pcic_disable_pil_irq(unsigned int pil) 922 { 923 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); 924 } 925 926 static void pcic_enable_pil_irq(unsigned int pil) 927 { 928 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); 929 } 930 931 void __init sun4m_pci_init_IRQ(void) 932 { 933 BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM); 934 BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM); 935 BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM); 936 BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM); 937 BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); 938 BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM); 939 BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); 940 } 941 942 int pcibios_assign_resource(struct pci_dev *pdev, int resource) 943 { 944 return -ENXIO; 945 } 946 947 struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) 948 { 949 struct pcidev_cookie *pc = pdev->sysdata; 950 951 return pc->prom_node; 952 } 953 EXPORT_SYMBOL(pci_device_to_OF_node); 954 955 /* 956 * This probably belongs here rather than ioport.c because 957 * we do not want this crud linked into SBus kernels. 958 * Also, think for a moment about likes of floppy.c that 959 * include architecture specific parts. They may want to redefine ins/outs. 960 * 961 * We do not use horroble macroses here because we want to 962 * advance pointer by sizeof(size). 963 */ 964 void outsb(unsigned long addr, const void *src, unsigned long count) 965 { 966 while (count) { 967 count -= 1; 968 outb(*(const char *)src, addr); 969 src += 1; 970 /* addr += 1; */ 971 } 972 } 973 974 void outsw(unsigned long addr, const void *src, unsigned long count) 975 { 976 while (count) { 977 count -= 2; 978 outw(*(const short *)src, addr); 979 src += 2; 980 /* addr += 2; */ 981 } 982 } 983 984 void outsl(unsigned long addr, const void *src, unsigned long count) 985 { 986 while (count) { 987 count -= 4; 988 outl(*(const long *)src, addr); 989 src += 4; 990 /* addr += 4; */ 991 } 992 } 993 994 void insb(unsigned long addr, void *dst, unsigned long count) 995 { 996 while (count) { 997 count -= 1; 998 *(unsigned char *)dst = inb(addr); 999 dst += 1; 1000 /* addr += 1; */ 1001 } 1002 } 1003 1004 void insw(unsigned long addr, void *dst, unsigned long count) 1005 { 1006 while (count) { 1007 count -= 2; 1008 *(unsigned short *)dst = inw(addr); 1009 dst += 2; 1010 /* addr += 2; */ 1011 } 1012 } 1013 1014 void insl(unsigned long addr, void *dst, unsigned long count) 1015 { 1016 while (count) { 1017 count -= 4; 1018 /* 1019 * XXX I am sure we are in for an unaligned trap here. 1020 */ 1021 *(unsigned long *)dst = inl(addr); 1022 dst += 4; 1023 /* addr += 4; */ 1024 } 1025 } 1026 1027 subsys_initcall(pcic_init); 1028