xref: /linux/arch/sparc/kernel/leon_pci.c (revision 3932b9ca55b0be314a36d3e84faff3e823c081f5)
1 /*
2  * leon_pci.c: LEON Host PCI support
3  *
4  * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5  *
6  * Code is partially derived from pcic.c
7  */
8 
9 #include <linux/of_device.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/export.h>
13 #include <asm/leon.h>
14 #include <asm/leon_pci.h>
15 
16 /* The LEON architecture does not rely on a BIOS or bootloader to setup
17  * PCI for us. The Linux generic routines are used to setup resources,
18  * reset values of configuration-space register settings are preserved.
19  *
20  * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
21  * accessed through a Window which is translated to low 64KB in PCI space, the
22  * first 4KB is not used so 60KB is available.
23  */
24 void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
25 {
26 	LIST_HEAD(resources);
27 	struct pci_bus *root_bus;
28 
29 	pci_add_resource_offset(&resources, &info->io_space,
30 				info->io_space.start - 0x1000);
31 	pci_add_resource(&resources, &info->mem_space);
32 	info->busn.flags = IORESOURCE_BUS;
33 	pci_add_resource(&resources, &info->busn);
34 
35 	root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
36 				     &resources);
37 	if (root_bus) {
38 		/* Setup IRQs of all devices using custom routines */
39 		pci_fixup_irqs(pci_common_swizzle, info->map_irq);
40 
41 		/* Assign devices with resources */
42 		pci_assign_unassigned_resources();
43 	} else {
44 		pci_free_resource_list(&resources);
45 	}
46 }
47 
48 void pcibios_fixup_bus(struct pci_bus *pbus)
49 {
50 	struct pci_dev *dev;
51 	int i, has_io, has_mem;
52 	u16 cmd;
53 
54 	list_for_each_entry(dev, &pbus->devices, bus_list) {
55 		/*
56 		 * We can not rely on that the bootloader has enabled I/O
57 		 * or memory access to PCI devices. Instead we enable it here
58 		 * if the device has BARs of respective type.
59 		 */
60 		has_io = has_mem = 0;
61 		for (i = 0; i < PCI_ROM_RESOURCE; i++) {
62 			unsigned long f = dev->resource[i].flags;
63 			if (f & IORESOURCE_IO)
64 				has_io = 1;
65 			else if (f & IORESOURCE_MEM)
66 				has_mem = 1;
67 		}
68 		/* ROM BARs are mapped into 32-bit memory space */
69 		if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
70 			dev->resource[PCI_ROM_RESOURCE].flags |=
71 							IORESOURCE_ROM_ENABLE;
72 			has_mem = 1;
73 		}
74 		pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
75 		if (has_io && !(cmd & PCI_COMMAND_IO)) {
76 #ifdef CONFIG_PCI_DEBUG
77 			printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
78 					 pci_name(dev));
79 #endif
80 			cmd |= PCI_COMMAND_IO;
81 			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
82 									cmd);
83 		}
84 		if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
85 #ifdef CONFIG_PCI_DEBUG
86 			printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
87 					 "%s\n", pci_name(dev));
88 #endif
89 			cmd |= PCI_COMMAND_MEMORY;
90 			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
91 									cmd);
92 		}
93 	}
94 }
95 
96 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
97 				resource_size_t size, resource_size_t align)
98 {
99 	return res->start;
100 }
101