1 #ifndef _ENTRY_H 2 #define _ENTRY_H 3 4 #include <linux/kernel.h> 5 #include <linux/types.h> 6 #include <linux/init.h> 7 8 /* irq */ 9 extern void handler_irq(int irq, struct pt_regs *regs); 10 11 #ifdef CONFIG_SPARC32 12 /* traps */ 13 extern void do_hw_interrupt(struct pt_regs *regs, unsigned long type); 14 extern void do_illegal_instruction(struct pt_regs *regs, unsigned long pc, 15 unsigned long npc, unsigned long psr); 16 17 extern void do_priv_instruction(struct pt_regs *regs, unsigned long pc, 18 unsigned long npc, unsigned long psr); 19 extern void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc, 20 unsigned long npc, 21 unsigned long psr); 22 extern void do_fpd_trap(struct pt_regs *regs, unsigned long pc, 23 unsigned long npc, unsigned long psr); 24 extern void do_fpe_trap(struct pt_regs *regs, unsigned long pc, 25 unsigned long npc, unsigned long psr); 26 extern void handle_tag_overflow(struct pt_regs *regs, unsigned long pc, 27 unsigned long npc, unsigned long psr); 28 extern void handle_watchpoint(struct pt_regs *regs, unsigned long pc, 29 unsigned long npc, unsigned long psr); 30 extern void handle_reg_access(struct pt_regs *regs, unsigned long pc, 31 unsigned long npc, unsigned long psr); 32 extern void handle_cp_disabled(struct pt_regs *regs, unsigned long pc, 33 unsigned long npc, unsigned long psr); 34 extern void handle_cp_exception(struct pt_regs *regs, unsigned long pc, 35 unsigned long npc, unsigned long psr); 36 37 38 39 /* entry.S */ 40 extern void fpsave(unsigned long *fpregs, unsigned long *fsr, 41 void *fpqueue, unsigned long *fpqdepth); 42 extern void fpload(unsigned long *fpregs, unsigned long *fsr); 43 44 #else /* CONFIG_SPARC32 */ 45 46 #include <asm/trap_block.h> 47 48 struct popc_3insn_patch_entry { 49 unsigned int addr; 50 unsigned int insns[3]; 51 }; 52 extern struct popc_3insn_patch_entry __popc_3insn_patch, 53 __popc_3insn_patch_end; 54 55 struct popc_6insn_patch_entry { 56 unsigned int addr; 57 unsigned int insns[6]; 58 }; 59 extern struct popc_6insn_patch_entry __popc_6insn_patch, 60 __popc_6insn_patch_end; 61 62 struct pause_patch_entry { 63 unsigned int addr; 64 unsigned int insns[3]; 65 }; 66 extern struct pause_patch_entry __pause_3insn_patch, 67 __pause_3insn_patch_end; 68 69 extern void __init per_cpu_patch(void); 70 extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, 71 struct sun4v_1insn_patch_entry *); 72 extern void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *, 73 struct sun4v_2insn_patch_entry *); 74 extern void __init sun4v_patch(void); 75 extern void __init boot_cpu_id_too_large(int cpu); 76 extern unsigned int dcache_parity_tl1_occurred; 77 extern unsigned int icache_parity_tl1_occurred; 78 79 extern asmlinkage void sparc_breakpoint(struct pt_regs *regs); 80 extern void timer_interrupt(int irq, struct pt_regs *regs); 81 82 extern void do_notify_resume(struct pt_regs *regs, 83 unsigned long orig_i0, 84 unsigned long thread_info_flags); 85 86 extern asmlinkage int syscall_trace_enter(struct pt_regs *regs); 87 extern asmlinkage void syscall_trace_leave(struct pt_regs *regs); 88 89 extern void bad_trap_tl1(struct pt_regs *regs, long lvl); 90 91 extern void do_fpieee(struct pt_regs *regs); 92 extern void do_fpother(struct pt_regs *regs); 93 extern void do_tof(struct pt_regs *regs); 94 extern void do_div0(struct pt_regs *regs); 95 extern void do_illegal_instruction(struct pt_regs *regs); 96 extern void mem_address_unaligned(struct pt_regs *regs, 97 unsigned long sfar, 98 unsigned long sfsr); 99 extern void sun4v_do_mna(struct pt_regs *regs, 100 unsigned long addr, 101 unsigned long type_ctx); 102 extern void do_privop(struct pt_regs *regs); 103 extern void do_privact(struct pt_regs *regs); 104 extern void do_cee(struct pt_regs *regs); 105 extern void do_cee_tl1(struct pt_regs *regs); 106 extern void do_dae_tl1(struct pt_regs *regs); 107 extern void do_iae_tl1(struct pt_regs *regs); 108 extern void do_div0_tl1(struct pt_regs *regs); 109 extern void do_fpdis_tl1(struct pt_regs *regs); 110 extern void do_fpieee_tl1(struct pt_regs *regs); 111 extern void do_fpother_tl1(struct pt_regs *regs); 112 extern void do_ill_tl1(struct pt_regs *regs); 113 extern void do_irq_tl1(struct pt_regs *regs); 114 extern void do_lddfmna_tl1(struct pt_regs *regs); 115 extern void do_stdfmna_tl1(struct pt_regs *regs); 116 extern void do_paw(struct pt_regs *regs); 117 extern void do_paw_tl1(struct pt_regs *regs); 118 extern void do_vaw(struct pt_regs *regs); 119 extern void do_vaw_tl1(struct pt_regs *regs); 120 extern void do_tof_tl1(struct pt_regs *regs); 121 extern void do_getpsr(struct pt_regs *regs); 122 123 extern void spitfire_insn_access_exception(struct pt_regs *regs, 124 unsigned long sfsr, 125 unsigned long sfar); 126 extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs, 127 unsigned long sfsr, 128 unsigned long sfar); 129 extern void spitfire_data_access_exception(struct pt_regs *regs, 130 unsigned long sfsr, 131 unsigned long sfar); 132 extern void spitfire_data_access_exception_tl1(struct pt_regs *regs, 133 unsigned long sfsr, 134 unsigned long sfar); 135 extern void spitfire_access_error(struct pt_regs *regs, 136 unsigned long status_encoded, 137 unsigned long afar); 138 139 extern void cheetah_fecc_handler(struct pt_regs *regs, 140 unsigned long afsr, 141 unsigned long afar); 142 extern void cheetah_cee_handler(struct pt_regs *regs, 143 unsigned long afsr, 144 unsigned long afar); 145 extern void cheetah_deferred_handler(struct pt_regs *regs, 146 unsigned long afsr, 147 unsigned long afar); 148 extern void cheetah_plus_parity_error(int type, struct pt_regs *regs); 149 150 extern void sun4v_insn_access_exception(struct pt_regs *regs, 151 unsigned long addr, 152 unsigned long type_ctx); 153 extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs, 154 unsigned long addr, 155 unsigned long type_ctx); 156 extern void sun4v_data_access_exception(struct pt_regs *regs, 157 unsigned long addr, 158 unsigned long type_ctx); 159 extern void sun4v_data_access_exception_tl1(struct pt_regs *regs, 160 unsigned long addr, 161 unsigned long type_ctx); 162 extern void sun4v_resum_error(struct pt_regs *regs, 163 unsigned long offset); 164 extern void sun4v_resum_overflow(struct pt_regs *regs); 165 extern void sun4v_nonresum_error(struct pt_regs *regs, 166 unsigned long offset); 167 extern void sun4v_nonresum_overflow(struct pt_regs *regs); 168 169 extern unsigned long sun4v_err_itlb_vaddr; 170 extern unsigned long sun4v_err_itlb_ctx; 171 extern unsigned long sun4v_err_itlb_pte; 172 extern unsigned long sun4v_err_itlb_error; 173 174 extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl); 175 176 extern unsigned long sun4v_err_dtlb_vaddr; 177 extern unsigned long sun4v_err_dtlb_ctx; 178 extern unsigned long sun4v_err_dtlb_pte; 179 extern unsigned long sun4v_err_dtlb_error; 180 181 extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl); 182 extern void hypervisor_tlbop_error(unsigned long err, 183 unsigned long op); 184 extern void hypervisor_tlbop_error_xcall(unsigned long err, 185 unsigned long op); 186 187 /* WARNING: The error trap handlers in assembly know the precise 188 * layout of the following structure. 189 * 190 * C-level handlers in traps.c use this information to log the 191 * error and then determine how to recover (if possible). 192 */ 193 struct cheetah_err_info { 194 /*0x00*/u64 afsr; 195 /*0x08*/u64 afar; 196 197 /* D-cache state */ 198 /*0x10*/u64 dcache_data[4]; /* The actual data */ 199 /*0x30*/u64 dcache_index; /* D-cache index */ 200 /*0x38*/u64 dcache_tag; /* D-cache tag/valid */ 201 /*0x40*/u64 dcache_utag; /* D-cache microtag */ 202 /*0x48*/u64 dcache_stag; /* D-cache snooptag */ 203 204 /* I-cache state */ 205 /*0x50*/u64 icache_data[8]; /* The actual insns + predecode */ 206 /*0x90*/u64 icache_index; /* I-cache index */ 207 /*0x98*/u64 icache_tag; /* I-cache phys tag */ 208 /*0xa0*/u64 icache_utag; /* I-cache microtag */ 209 /*0xa8*/u64 icache_stag; /* I-cache snooptag */ 210 /*0xb0*/u64 icache_upper; /* I-cache upper-tag */ 211 /*0xb8*/u64 icache_lower; /* I-cache lower-tag */ 212 213 /* E-cache state */ 214 /*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */ 215 /*0xe0*/u64 ecache_index; /* E-cache index */ 216 /*0xe8*/u64 ecache_tag; /* E-cache tag/state */ 217 218 /*0xf0*/u64 __pad[32 - 30]; 219 }; 220 #define CHAFSR_INVALID ((u64)-1L) 221 222 /* This is allocated at boot time based upon the largest hardware 223 * cpu ID in the system. We allocate two entries per cpu, one for 224 * TL==0 logging and one for TL >= 1 logging. 225 */ 226 extern struct cheetah_err_info *cheetah_error_log; 227 228 /* UPA nodes send interrupt packet to UltraSparc with first data reg 229 * value low 5 (7 on Starfire) bits holding the IRQ identifier being 230 * delivered. We must translate this into a non-vector IRQ so we can 231 * set the softint on this cpu. 232 * 233 * To make processing these packets efficient and race free we use 234 * an array of irq buckets below. The interrupt vector handler in 235 * entry.S feeds incoming packets into per-cpu pil-indexed lists. 236 * 237 * If you make changes to ino_bucket, please update hand coded assembler 238 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S 239 */ 240 struct ino_bucket { 241 /*0x00*/unsigned long __irq_chain_pa; 242 243 /* Interrupt number assigned to this INO. */ 244 /*0x08*/unsigned int __irq; 245 /*0x0c*/unsigned int __pad; 246 }; 247 248 extern struct ino_bucket *ivector_table; 249 extern unsigned long ivector_table_pa; 250 251 extern void init_irqwork_curcpu(void); 252 extern void sun4v_register_mondo_queues(int this_cpu); 253 254 #endif /* CONFIG_SPARC32 */ 255 #endif /* _ENTRY_H */ 256