1 /* cpu.c: Dinky routines to look for the kind of Sparc cpu 2 * we are on. 3 * 4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7 #include <linux/config.h> 8 #include <linux/kernel.h> 9 #include <linux/init.h> 10 #include <linux/smp.h> 11 #include <linux/threads.h> 12 #include <asm/oplib.h> 13 #include <asm/page.h> 14 #include <asm/head.h> 15 #include <asm/psr.h> 16 #include <asm/mbus.h> 17 #include <asm/cpudata.h> 18 19 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; 20 21 struct cpu_iu_info { 22 int psr_impl; 23 int psr_vers; 24 char* cpu_name; /* should be enough I hope... */ 25 }; 26 27 struct cpu_fp_info { 28 int psr_impl; 29 int fp_vers; 30 char* fp_name; 31 }; 32 33 /* In order to get the fpu type correct, you need to take the IDPROM's 34 * machine type value into consideration too. I will fix this. 35 */ 36 struct cpu_fp_info linux_sparc_fpu[] = { 37 { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"}, 38 { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"}, 39 { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"}, 40 /* SparcStation SLC, SparcStation1 */ 41 { 0, 3, "Weitek WTL3170/2"}, 42 /* SPARCstation-5 */ 43 { 0, 4, "Lsi Logic/Meiko L64804 or compatible"}, 44 { 0, 5, "reserved"}, 45 { 0, 6, "reserved"}, 46 { 0, 7, "No FPU"}, 47 { 1, 0, "ROSS HyperSparc combined IU/FPU"}, 48 { 1, 1, "Lsi Logic L64814"}, 49 { 1, 2, "Texas Instruments TMS390-C602A"}, 50 { 1, 3, "Cypress CY7C602 FPU"}, 51 { 1, 4, "reserved"}, 52 { 1, 5, "reserved"}, 53 { 1, 6, "reserved"}, 54 { 1, 7, "No FPU"}, 55 { 2, 0, "BIT B5010 or B5110/20 or B5210"}, 56 { 2, 1, "reserved"}, 57 { 2, 2, "reserved"}, 58 { 2, 3, "reserved"}, 59 { 2, 4, "reserved"}, 60 { 2, 5, "reserved"}, 61 { 2, 6, "reserved"}, 62 { 2, 7, "No FPU"}, 63 /* SuperSparc 50 module */ 64 { 4, 0, "SuperSparc on-chip FPU"}, 65 /* SparcClassic */ 66 { 4, 4, "TI MicroSparc on chip FPU"}, 67 { 5, 0, "Matsushita MN10501"}, 68 { 5, 1, "reserved"}, 69 { 5, 2, "reserved"}, 70 { 5, 3, "reserved"}, 71 { 5, 4, "reserved"}, 72 { 5, 5, "reserved"}, 73 { 5, 6, "reserved"}, 74 { 5, 7, "No FPU"}, 75 { 9, 3, "Fujitsu or Weitek on-chip FPU"}, 76 }; 77 78 #define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu) 79 80 struct cpu_iu_info linux_sparc_chips[] = { 81 /* Sun4/100, 4/200, SLC */ 82 { 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"}, 83 /* borned STP1012PGA */ 84 { 0, 4, "Fujitsu MB86904"}, 85 { 0, 5, "Fujitsu TurboSparc MB86907"}, 86 /* SparcStation2, SparcServer 490 & 690 */ 87 { 1, 0, "LSI Logic Corporation - L64811"}, 88 /* SparcStation2 */ 89 { 1, 1, "Cypress/ROSS CY7C601"}, 90 /* Embedded controller */ 91 { 1, 3, "Cypress/ROSS CY7C611"}, 92 /* Ross Technologies HyperSparc */ 93 { 1, 0xf, "ROSS HyperSparc RT620"}, 94 { 1, 0xe, "ROSS HyperSparc RT625 or RT626"}, 95 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */ 96 /* Someone please write the code to support this beast! ;) */ 97 { 2, 0, "Bipolar Integrated Technology - B5010"}, 98 { 3, 0, "LSI Logic Corporation - unknown-type"}, 99 { 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"}, 100 /* SparcClassic -- borned STP1010TAB-50*/ 101 { 4, 1, "Texas Instruments, Inc. - MicroSparc"}, 102 { 4, 2, "Texas Instruments, Inc. - MicroSparc II"}, 103 { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"}, 104 { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"}, 105 { 4, 5, "Texas Instruments, Inc. - unknown"}, 106 { 5, 0, "Matsushita - MN10501"}, 107 { 6, 0, "Philips Corporation - unknown"}, 108 { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"}, 109 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */ 110 { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"}, 111 { 9, 0, "Fujitsu or Weitek Power-UP"}, 112 { 9, 1, "Fujitsu or Weitek Power-UP"}, 113 { 9, 2, "Fujitsu or Weitek Power-UP"}, 114 { 9, 3, "Fujitsu or Weitek Power-UP"}, 115 { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 116 { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 117 { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 118 { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 119 { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 120 { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 121 }; 122 123 #define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips) 124 125 char *sparc_cpu_type; 126 char *sparc_fpu_type; 127 128 unsigned int fsr_storage; 129 130 void __init cpu_probe(void) 131 { 132 int psr_impl, psr_vers, fpu_vers; 133 int i, psr; 134 135 psr_impl = ((get_psr()>>28)&0xf); 136 psr_vers = ((get_psr()>>24)&0xf); 137 138 psr = get_psr(); 139 put_psr(psr | PSR_EF); 140 fpu_vers = ((get_fsr()>>17)&0x7); 141 put_psr(psr); 142 143 for(i = 0; i<NSPARCCHIPS; i++) { 144 if(linux_sparc_chips[i].psr_impl == psr_impl) 145 if(linux_sparc_chips[i].psr_vers == psr_vers) { 146 sparc_cpu_type = linux_sparc_chips[i].cpu_name; 147 break; 148 } 149 } 150 151 if(i==NSPARCCHIPS) 152 printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl, 153 psr_vers); 154 155 for(i = 0; i<NSPARCFPU; i++) { 156 if(linux_sparc_fpu[i].psr_impl == psr_impl) 157 if(linux_sparc_fpu[i].fp_vers == fpu_vers) { 158 sparc_fpu_type = linux_sparc_fpu[i].fp_name; 159 break; 160 } 161 } 162 163 if(i == NSPARCFPU) { 164 printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl, 165 fpu_vers); 166 sparc_fpu_type = linux_sparc_fpu[31].fp_name; 167 } 168 } 169